2 * linux/arch/mips/txx9/generic/setup.c
4 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
7 * 2003-2005 (c) MontaVista Software, Inc.
8 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/string.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_core.h>
25 #include <linux/mtd/physmap.h>
26 #include <asm/bootinfo.h>
28 #include <asm/reboot.h>
29 #include <asm/r4kcache.h>
30 #include <asm/txx9/generic.h>
31 #include <asm/txx9/pci.h>
32 #include <asm/txx9tmr.h>
33 #ifdef CONFIG_CPU_TX49XX
34 #include <asm/txx9/tx4938.h>
37 /* EBUSC settings of TX4927, etc. */
38 struct resource txx9_ce_res[8];
39 static char txx9_ce_res_name[8][4]; /* "CEn" */
41 /* pcode, internal register */
42 unsigned int txx9_pcode;
43 char txx9_pcode_str[8];
44 static struct resource txx9_reg_res = {
45 .name = txx9_pcode_str,
46 .flags = IORESOURCE_MEM,
49 txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
53 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
54 sprintf(txx9_ce_res_name[i], "CE%d", i);
55 txx9_ce_res[i].flags = IORESOURCE_MEM;
56 txx9_ce_res[i].name = txx9_ce_res_name[i];
60 sprintf(txx9_pcode_str, "TX%x", pcode);
62 txx9_reg_res.start = base & 0xfffffffffULL;
63 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
64 request_resource(&iomem_resource, &txx9_reg_res);
69 unsigned int txx9_master_clock;
70 unsigned int txx9_cpu_clock;
71 unsigned int txx9_gbus_clock;
73 #ifdef CONFIG_CPU_TX39XX
74 /* don't enable by default - see errata */
75 int txx9_ccfg_toeon __initdata;
77 int txx9_ccfg_toeon __initdata = 1;
80 /* Minimum CLK support */
82 struct clk *clk_get(struct device *dev, const char *id)
84 if (!strcmp(id, "spi-baseclk"))
85 return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
86 if (!strcmp(id, "imbus_clk"))
87 return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
88 return ERR_PTR(-ENOENT);
90 EXPORT_SYMBOL(clk_get);
92 int clk_enable(struct clk *clk)
96 EXPORT_SYMBOL(clk_enable);
98 void clk_disable(struct clk *clk)
101 EXPORT_SYMBOL(clk_disable);
103 unsigned long clk_get_rate(struct clk *clk)
105 return (unsigned long)clk;
107 EXPORT_SYMBOL(clk_get_rate);
109 void clk_put(struct clk *clk)
112 EXPORT_SYMBOL(clk_put);
116 #ifdef CONFIG_GENERIC_GPIO
117 int gpio_to_irq(unsigned gpio)
121 EXPORT_SYMBOL(gpio_to_irq);
123 int irq_to_gpio(unsigned irq)
127 EXPORT_SYMBOL(irq_to_gpio);
130 #define BOARD_VEC(board) extern struct txx9_board_vec board;
131 #include <asm/txx9/boards.h>
134 struct txx9_board_vec *txx9_board_vec __initdata;
135 static char txx9_system_type[32];
137 static struct txx9_board_vec *board_vecs[] __initdata = {
138 #define BOARD_VEC(board) &board,
139 #include <asm/txx9/boards.h>
143 static struct txx9_board_vec *__init find_board_byname(const char *name)
147 /* search board_vecs table */
148 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
149 if (strstr(board_vecs[i]->system, name))
150 return board_vecs[i];
155 static void __init prom_init_cmdline(void)
157 int argc = (int)fw_arg0;
158 int *argv32 = (int *)fw_arg1;
159 int i; /* Always ignore the "-c" at argv[0] */
160 char builtin[CL_SIZE];
162 /* ignore all built-in args if any f/w args given */
164 * But if built-in strings was started with '+', append them
165 * to command line args. If built-in was started with '-',
166 * ignore all f/w args.
169 if (arcs_cmdline[0] == '+')
170 strcpy(builtin, arcs_cmdline + 1);
171 else if (arcs_cmdline[0] == '-') {
172 strcpy(builtin, arcs_cmdline + 1);
174 } else if (argc <= 1)
175 strcpy(builtin, arcs_cmdline);
176 arcs_cmdline[0] = '\0';
178 for (i = 1; i < argc; i++) {
179 char *str = (char *)(long)argv32[i];
181 strcat(arcs_cmdline, " ");
182 if (strchr(str, ' ')) {
183 strcat(arcs_cmdline, "\"");
184 strcat(arcs_cmdline, str);
185 strcat(arcs_cmdline, "\"");
187 strcat(arcs_cmdline, str);
189 /* append saved builtin args */
192 strcat(arcs_cmdline, " ");
193 strcat(arcs_cmdline, builtin);
197 static int txx9_ic_disable __initdata;
198 static int txx9_dc_disable __initdata;
200 #if defined(CONFIG_CPU_TX49XX)
201 /* flush all cache on very early stage (before 4k_cache_init) */
202 static void __init early_flush_dcache(void)
204 unsigned int conf = read_c0_config();
205 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
206 unsigned int linesz = 32;
207 unsigned long addr, end;
209 end = INDEX_BASE + dc_size / 4;
211 for (addr = INDEX_BASE; addr < end; addr += linesz) {
212 cache_op(Index_Writeback_Inv_D, addr | 0);
213 cache_op(Index_Writeback_Inv_D, addr | 1);
214 cache_op(Index_Writeback_Inv_D, addr | 2);
215 cache_op(Index_Writeback_Inv_D, addr | 3);
219 static void __init txx9_cache_fixup(void)
223 conf = read_c0_config();
224 /* flush and disable */
225 if (txx9_ic_disable) {
226 conf |= TX49_CONF_IC;
227 write_c0_config(conf);
229 if (txx9_dc_disable) {
230 early_flush_dcache();
231 conf |= TX49_CONF_DC;
232 write_c0_config(conf);
236 conf = read_c0_config();
237 if (!txx9_ic_disable)
238 conf &= ~TX49_CONF_IC;
239 if (!txx9_dc_disable)
240 conf &= ~TX49_CONF_DC;
241 write_c0_config(conf);
243 if (conf & TX49_CONF_IC)
244 pr_info("TX49XX I-Cache disabled.\n");
245 if (conf & TX49_CONF_DC)
246 pr_info("TX49XX D-Cache disabled.\n");
248 #elif defined(CONFIG_CPU_TX39XX)
249 /* flush all cache on very early stage (before tx39_cache_init) */
250 static void __init early_flush_dcache(void)
252 unsigned int conf = read_c0_config();
253 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
254 TX39_CONF_DCS_SHIFT));
255 unsigned int linesz = 16;
256 unsigned long addr, end;
258 end = INDEX_BASE + dc_size / 2;
260 for (addr = INDEX_BASE; addr < end; addr += linesz) {
261 cache_op(Index_Writeback_Inv_D, addr | 0);
262 cache_op(Index_Writeback_Inv_D, addr | 1);
266 static void __init txx9_cache_fixup(void)
270 conf = read_c0_config();
271 /* flush and disable */
272 if (txx9_ic_disable) {
273 conf &= ~TX39_CONF_ICE;
274 write_c0_config(conf);
276 if (txx9_dc_disable) {
277 early_flush_dcache();
278 conf &= ~TX39_CONF_DCE;
279 write_c0_config(conf);
283 conf = read_c0_config();
284 if (!txx9_ic_disable)
285 conf |= TX39_CONF_ICE;
286 if (!txx9_dc_disable)
287 conf |= TX39_CONF_DCE;
288 write_c0_config(conf);
290 if (!(conf & TX39_CONF_ICE))
291 pr_info("TX39XX I-Cache disabled.\n");
292 if (!(conf & TX39_CONF_DCE))
293 pr_info("TX39XX D-Cache disabled.\n");
296 static inline void txx9_cache_fixup(void)
301 static void __init preprocess_cmdline(void)
303 char cmdline[CL_SIZE];
306 strcpy(cmdline, arcs_cmdline);
308 arcs_cmdline[0] = '\0';
310 char *str = strsep(&s, " ");
311 if (strncmp(str, "board=", 6) == 0) {
312 txx9_board_vec = find_board_byname(str + 6);
314 } else if (strncmp(str, "masterclk=", 10) == 0) {
316 if (strict_strtoul(str + 10, 10, &val) == 0)
317 txx9_master_clock = val;
319 } else if (strcmp(str, "icdisable") == 0) {
322 } else if (strcmp(str, "dcdisable") == 0) {
325 } else if (strcmp(str, "toeoff") == 0) {
328 } else if (strcmp(str, "toeon") == 0) {
333 strcat(arcs_cmdline, " ");
334 strcat(arcs_cmdline, str);
340 static void __init select_board(void)
344 /* first, determine by "board=" argument in preprocess_cmdline() */
347 /* next, determine by "board" envvar */
348 envstr = prom_getenv("board");
350 txx9_board_vec = find_board_byname(envstr);
355 /* select "default" board */
356 #ifdef CONFIG_CPU_TX39XX
357 txx9_board_vec = &jmr3927_vec;
359 #ifdef CONFIG_CPU_TX49XX
360 switch (TX4938_REV_PCODE()) {
361 #ifdef CONFIG_TOSHIBA_RBTX4927
363 txx9_board_vec = &rbtx4927_vec;
366 txx9_board_vec = &rbtx4937_vec;
369 #ifdef CONFIG_TOSHIBA_RBTX4938
371 txx9_board_vec = &rbtx4938_vec;
378 void __init prom_init(void)
381 preprocess_cmdline();
384 strcpy(txx9_system_type, txx9_board_vec->system);
386 txx9_board_vec->prom_init();
389 void __init prom_free_prom_memory(void)
393 const char *get_system_type(void)
395 return txx9_system_type;
398 char * __init prom_getcmdline(void)
400 return &(arcs_cmdline[0]);
403 const char *__init prom_getenv(const char *name)
405 const s32 *str = (const s32 *)fw_arg2;
409 /* YAMON style ("name", "value" pairs) */
410 while (str[0] && str[1]) {
411 if (!strcmp((const char *)(unsigned long)str[0], name))
412 return (const char *)(unsigned long)str[1];
418 static void __noreturn txx9_machine_halt(void)
421 clear_c0_status(ST0_IM);
425 if (cpu_has_counter) {
427 * Clear counter interrupt while it
428 * breaks WAIT instruction even if
437 /* Watchdog support */
438 void __init txx9_wdt_init(unsigned long base)
440 struct resource res = {
442 .end = base + 0x100 - 1,
443 .flags = IORESOURCE_MEM,
445 platform_device_register_simple("txx9wdt", -1, &res, 1);
448 void txx9_wdt_now(unsigned long base)
450 struct txx9_tmr_reg __iomem *tmrptr =
451 ioremap(base, sizeof(struct txx9_tmr_reg));
452 /* disable watch dog timer */
453 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
454 __raw_writel(0, &tmrptr->tcr);
456 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
457 __raw_writel(1, &tmrptr->cpra); /* immediate */
458 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
463 void __init txx9_spi_init(int busid, unsigned long base, int irq)
465 struct resource res[] = {
468 .end = base + 0x20 - 1,
469 .flags = IORESOURCE_MEM,
472 .flags = IORESOURCE_IRQ,
475 platform_device_register_simple("spi_txx9", busid,
476 res, ARRAY_SIZE(res));
479 void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
481 struct platform_device *pdev =
482 platform_device_alloc("tc35815-mac", id);
484 platform_device_add_data(pdev, ethaddr, 6) ||
485 platform_device_add(pdev))
486 platform_device_put(pdev);
489 void __init txx9_sio_init(unsigned long baseaddr, int irq,
490 unsigned int line, unsigned int sclk, int nocts)
492 #ifdef CONFIG_SERIAL_TXX9
493 struct uart_port req;
495 memset(&req, 0, sizeof(req));
497 req.iotype = UPIO_MEM;
498 req.membase = ioremap(baseaddr, 0x24);
499 req.mapbase = baseaddr;
502 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
504 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
507 req.uartclk = TXX9_IMCLK;
508 early_serial_txx9_setup(&req);
509 #endif /* CONFIG_SERIAL_TXX9 */
512 #ifdef CONFIG_EARLY_PRINTK
513 static void __init null_prom_putchar(char c)
516 void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
518 void __init prom_putchar(char c)
520 txx9_prom_putchar(c);
523 static void __iomem *early_txx9_sio_port;
525 static void __init early_txx9_sio_putchar(char c)
527 #define TXX9_SICISR 0x0c
528 #define TXX9_SITFIFO 0x1c
529 #define TXX9_SICISR_TXALS 0x00000002
530 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
533 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
536 void __init txx9_sio_putchar_init(unsigned long baseaddr)
538 early_txx9_sio_port = ioremap(baseaddr, 0x24);
539 txx9_prom_putchar = early_txx9_sio_putchar;
541 #endif /* CONFIG_EARLY_PRINTK */
544 void __init plat_mem_setup(void)
546 ioport_resource.start = 0;
547 ioport_resource.end = ~0UL; /* no limit */
548 iomem_resource.start = 0;
549 iomem_resource.end = ~0UL; /* no limit */
551 /* fallback restart/halt routines */
552 _machine_restart = (void (*)(char *))txx9_machine_halt;
553 _machine_halt = txx9_machine_halt;
554 pm_power_off = txx9_machine_halt;
557 pcibios_plat_setup = txx9_pcibios_setup;
559 txx9_board_vec->mem_setup();
562 void __init arch_init_irq(void)
564 txx9_board_vec->irq_setup();
567 void __init plat_time_init(void)
569 #ifdef CONFIG_CPU_TX49XX
570 mips_hpt_frequency = txx9_cpu_clock / 2;
572 txx9_board_vec->time_init();
575 static int __init _txx9_arch_init(void)
577 if (txx9_board_vec->arch_init)
578 txx9_board_vec->arch_init();
581 arch_initcall(_txx9_arch_init);
583 static int __init _txx9_device_init(void)
585 if (txx9_board_vec->device_init)
586 txx9_board_vec->device_init();
589 device_initcall(_txx9_device_init);
591 int (*txx9_irq_dispatch)(int pending);
592 asmlinkage void plat_irq_dispatch(void)
594 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
595 int irq = txx9_irq_dispatch(pending);
597 if (likely(irq >= 0))
600 spurious_interrupt();
603 /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
604 #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
605 static unsigned long __swizzle_addr_none(unsigned long port)
609 unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
610 EXPORT_SYMBOL(__swizzle_addr_b);
613 void __init txx9_physmap_flash_init(int no, unsigned long addr,
615 const struct physmap_flash_data *pdata)
617 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
618 struct resource res = {
620 .end = addr + size - 1,
621 .flags = IORESOURCE_MEM,
623 struct platform_device *pdev;
624 #ifdef CONFIG_MTD_PARTITIONS
625 static struct mtd_partition parts[2];
626 struct physmap_flash_data pdata_part;
628 /* If this area contained boot area, make separate partition */
629 if (pdata->nr_parts == 0 && !pdata->parts &&
630 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
632 parts[0].name = "boot";
633 parts[0].offset = 0x1fc00000 - addr;
634 parts[0].size = addr + size - 0x1fc00000;
635 parts[1].name = "user";
637 parts[1].size = 0x1fc00000 - addr;
639 pdata_part.nr_parts = ARRAY_SIZE(parts);
640 pdata_part.parts = parts;
644 pdev = platform_device_alloc("physmap-flash", no);
646 platform_device_add_resources(pdev, &res, 1) ||
647 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
648 platform_device_add(pdev))
649 platform_device_put(pdev);