arch/mips/mips-boards/malta/malta_setup.c

   1 /*
   2  * Carsten Langgaard, carstenl@mips.com
   3  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
   4  *
   5  *  This program is free software; you can distribute it and/or modify it
   6  *  under the terms of the GNU General Public License (Version 2) as
   7  *  published by the Free Software Foundation.
   8  *
   9  *  This program is distributed in the hope it will be useful, but WITHOUT
  10  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  *  for more details.
  13  *
  14  *  You should have received a copy of the GNU General Public License along
  15  *  with this program; if not, write to the Free Software Foundation, Inc.,
  16  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  17  */
  18 #include <linux/init.h>
  19 #include <linux/sched.h>
  20 #include <linux/ioport.h>
  21 #include <linux/pci.h>
  22 #include <linux/screen_info.h>
  23
  24 #include <asm/cpu.h>
  25 #include <asm/bootinfo.h>
  26 #include <asm/irq.h>
  27 #include <asm/mips-boards/generic.h>
  28 #include <asm/mips-boards/prom.h>
  29 #include <asm/mips-boards/malta.h>
  30 #include <asm/mips-boards/maltaint.h>
  31 #include <asm/dma.h>
  32 #include <asm/time.h>
  33 #include <asm/traps.h>
  34 #ifdef CONFIG_VT
  35 #include <linux/console.h>
  36 #endif
  37
  38 extern void mips_reboot_setup(void);
  39 extern unsigned long mips_rtc_get_time(void);
  40
  41 #ifdef CONFIG_KGDB
  42 extern void kgdb_config(void);
  43 #endif
  44
  45 struct resource standard_io_resources[] = {
  46         {
  47                 .name = "dma1",
  48                 .start = 0x00,
  49                 .end = 0x1f,
  50                 .flags = IORESOURCE_BUSY
  51         },
  52         {
  53                 .name = "timer",
  54                 .start = 0x40,
  55                 .end = 0x5f,
  56                 .flags = IORESOURCE_BUSY
  57         },
  58         {
  59                 .name = "keyboard",
  60                 .start = 0x60,
  61                 .end = 0x6f,
  62                 .flags = IORESOURCE_BUSY
  63         },
  64         {
  65                 .name = "dma page reg",
  66                 .start = 0x80,
  67                 .end = 0x8f,
  68                 .flags = IORESOURCE_BUSY
  69         },
  70         {
  71                 .name = "dma2",
  72                 .start = 0xc0,
  73                 .end = 0xdf,
  74                 .flags = IORESOURCE_BUSY
  75         },
  76 };
  77
  78 const char *get_system_type(void)
  79 {
  80         return "MIPS Malta";
  81 }
  82
  83 #if defined(CONFIG_MIPS_MT_SMTC)
  84 const char display_string[] = "       SMTC LINUX ON MALTA       ";
  85 #else
  86 const char display_string[] = "        LINUX ON MALTA       ";
  87 #endif /* CONFIG_MIPS_MT_SMTC */
  88
  89 #ifdef CONFIG_BLK_DEV_FD
  90 void __init fd_activate(void)
  91 {
  92         /*
  93          * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
  94          * Controller.
  95          * Done by YAMON 2.00 onwards
  96          */
  97         /* Entering config state. */
  98         SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
  99
 100         /* Activate floppy controller. */
 101         SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
 102         SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
 103         SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
 104         SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
 105
 106         /* Exit config state. */
 107         SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
 108 }
 109 #endif
 110
 111 #ifdef CONFIG_BLK_DEV_IDE
 112 static void __init pci_clock_check(void)
 113 {
 114         unsigned int __iomem *jmpr_p =
 115                 (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
 116         int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
 117         static const int pciclocks[] __initdata = {
 118                 33, 20, 25, 30, 12, 16, 37, 10
 119         };
 120         int pciclock = pciclocks[jmpr];
 121         char *argptr = prom_getcmdline();
 122
 123         if (pciclock != 33 && !strstr(argptr, "idebus=")) {
 124                 printk(KERN_WARNING "WARNING: PCI clock is %dMHz, "
 125                                 "setting idebus\n", pciclock);
 126                 argptr += strlen(argptr);
 127                 sprintf(argptr, " idebus=%d", pciclock);
 128                 if (pciclock < 20 || pciclock > 66)
 129                         printk(KERN_WARNING "WARNING: IDE timing "
 130                                         "calculations will be incorrect\n");
 131         }
 132 }
 133 #endif
 134
 135 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
 136 static void __init screen_info_setup(void)
 137 {
 138         screen_info = (struct screen_info) {
 139                 .orig_x = 0,
 140                 .orig_y = 25,
 141                 .ext_mem_k = 0,
 142                 .orig_video_page = 0,
 143                 .orig_video_mode = 0,
 144                 .orig_video_cols = 80,
 145                 .unused2 = 0,
 146                 .orig_video_ega_bx = 0,
 147                 .unused3 = 0,
 148                 .orig_video_lines = 25,
 149                 .orig_video_isVGA = VIDEO_TYPE_VGAC,
 150                 .orig_video_points = 16
 151         };
 152 }
 153 #endif
 154
 155 void __init plat_mem_setup(void)
 156 {
 157         unsigned int i;
 158
 159         mips_pcibios_init();
 160
 161         /* Request I/O space for devices used on the Malta board. */
 162         for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
 163                 request_resource(&ioport_resource, standard_io_resources+i);
 164
 165         /*
 166          * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
 167          */
 168         enable_dma(4);
 169
 170 #ifdef CONFIG_KGDB
 171         kgdb_config();
 172 #endif
 173
 174         if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
 175                 char *argptr;
 176
 177                 argptr = prom_getcmdline();
 178                 if (strstr(argptr, "debug")) {
 179                         BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
 180                         printk("Enabled Bonito debug mode\n");
 181                 }
 182                 else
 183                         BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
 184
 185 #ifdef CONFIG_DMA_COHERENT
 186                 if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
 187                         BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
 188                         printk("Enabled Bonito CPU coherency\n");
 189
 190                         argptr = prom_getcmdline();
 191                         if (strstr(argptr, "iobcuncached")) {
 192                                 BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
 193                                 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
 194                                         ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 195                                           BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 196                                 printk("Disabled Bonito IOBC coherency\n");
 197                         }
 198                         else {
 199                                 BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
 200                                 BONITO_PCIMEMBASECFG |=
 201                                         (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 202                                          BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 203                                 printk("Enabled Bonito IOBC coherency\n");
 204                         }
 205                 }
 206                 else
 207                         panic("Hardware DMA cache coherency not supported");
 208
 209 #endif
 210         }
 211 #ifdef CONFIG_DMA_COHERENT
 212         else {
 213                 panic("Hardware DMA cache coherency not supported");
 214         }
 215 #endif
 216
 217 #ifdef CONFIG_BLK_DEV_IDE
 218         pci_clock_check();
 219 #endif
 220 #ifdef CONFIG_BLK_DEV_FD
 221         fd_activate();
 222 #endif
 223 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
 224         screen_info_setup();
 225 #endif
 226         mips_reboot_setup();
 227 }