arch/mips/include/asm/processor.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 Waldorf GMBH
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
   8  * Copyright (C) 1996 Paul M. Antoine
   9  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  10  */
  11 #ifndef _ASM_PROCESSOR_H
  12 #define _ASM_PROCESSOR_H
  13
  14 #include <linux/cpumask.h>
  15 #include <linux/threads.h>
  16
  17 #include <asm/cachectl.h>
  18 #include <asm/cpu.h>
  19 #include <asm/cpu-info.h>
  20 #include <asm/mipsregs.h>
  21 #include <asm/prefetch.h>
  22 #include <asm/system.h>
  23
  24 /*
  25  * Return current * instruction pointer ("program counter").
  26  */
  27 #define current_text_addr() ({ __label__ _l; _l: &&_l;})
  28
  29 /*
  30  * System setup and hardware flags..
  31  */
  32 extern void (*cpu_wait)(void);
  33
  34 extern unsigned int vced_count, vcei_count;
  35
  36 #ifdef CONFIG_32BIT
  37 /*
  38  * User space process size: 2GB. This is hardcoded into a few places,
  39  * so don't change it unless you know what you are doing.
  40  */
  41 #define TASK_SIZE       0x7fff8000UL
  42 #define STACK_TOP       TASK_SIZE
  43
  44 /*
  45  * This decides where the kernel will search for a free chunk of vm
  46  * space during mmap's.
  47  */
  48 #define TASK_UNMAPPED_BASE      ((TASK_SIZE / 3) & ~(PAGE_SIZE))
  49 #endif
  50
  51 #ifdef CONFIG_64BIT
  52 /*
  53  * User space process size: 1TB. This is hardcoded into a few places,
  54  * so don't change it unless you know what you are doing.  TASK_SIZE
  55  * is limited to 1TB by the R4000 architecture; R10000 and better can
  56  * support 16TB; the architectural reserve for future expansion is
  57  * 8192EB ...
  58  */
  59 #define TASK_SIZE32     0x7fff8000UL
  60 #define TASK_SIZE       0x10000000000UL
  61 #define STACK_TOP       \
  62       (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
  63
  64 /*
  65  * This decides where the kernel will search for a free chunk of vm
  66  * space during mmap's.
  67  */
  68 #define TASK_UNMAPPED_BASE                                              \
  69         (test_thread_flag(TIF_32BIT_ADDR) ?                             \
  70                 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
  71 #define TASK_SIZE_OF(tsk)                                               \
  72         (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE)
  73 #endif
  74
  75 #ifdef __KERNEL__
  76 #define STACK_TOP_MAX   TASK_SIZE
  77 #endif
  78
  79 #define NUM_FPU_REGS    32
  80
  81 typedef __u64 fpureg_t;
  82
  83 /*
  84  * It would be nice to add some more fields for emulator statistics, but there
  85  * are a number of fixed offsets in offset.h and elsewhere that would have to
  86  * be recalculated by hand.  So the additional information will be private to
  87  * the FPU emulator for now.  See asm-mips/fpu_emulator.h.
  88  */
  89
  90 struct mips_fpu_struct {
  91         fpureg_t        fpr[NUM_FPU_REGS];
  92         unsigned int    fcr31;
  93 };
  94
  95 #define NUM_DSP_REGS   6
  96
  97 typedef __u32 dspreg_t;
  98
  99 struct mips_dsp_state {
 100         dspreg_t        dspr[NUM_DSP_REGS];
 101         unsigned int    dspcontrol;
 102 };
 103
 104 #define INIT_CPUMASK { \
 105         {0,} \
 106 }
 107
 108 struct mips3264_watch_reg_state {
 109         /* The width of watchlo is 32 in a 32 bit kernel and 64 in a
 110            64 bit kernel.  We use unsigned long as it has the same
 111            property. */
 112         unsigned long watchlo[NUM_WATCH_REGS];
 113         /* Only the mask and IRW bits from watchhi. */
 114         u16 watchhi[NUM_WATCH_REGS];
 115 };
 116
 117 union mips_watch_reg_state {
 118         struct mips3264_watch_reg_state mips3264;
 119 };
 120
 121 typedef struct {
 122         unsigned long seg;
 123 } mm_segment_t;
 124
 125 #define ARCH_MIN_TASKALIGN      8
 126
 127 struct mips_abi;
 128
 129 /*
 130  * If you change thread_struct remember to change the #defines below too!
 131  */
 132 struct thread_struct {
 133         /* Saved main processor registers. */
 134         unsigned long reg16;
 135         unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
 136         unsigned long reg29, reg30, reg31;
 137
 138         /* Saved cp0 stuff. */
 139         unsigned long cp0_status;
 140
 141         /* Saved fpu/fpu emulator stuff. */
 142         struct mips_fpu_struct fpu;
 143 #ifdef CONFIG_MIPS_MT_FPAFF
 144         /* Emulated instruction count */
 145         unsigned long emulated_fp;
 146         /* Saved per-thread scheduler affinity mask */
 147         cpumask_t user_cpus_allowed;
 148 #endif /* CONFIG_MIPS_MT_FPAFF */
 149
 150         /* Saved state of the DSP ASE, if available. */
 151         struct mips_dsp_state dsp;
 152
 153         /* Saved watch register state, if available. */
 154         union mips_watch_reg_state watch;
 155
 156         /* Other stuff associated with the thread. */
 157         unsigned long cp0_badvaddr;     /* Last user fault */
 158         unsigned long cp0_baduaddr;     /* Last kernel fault accessing USEG */
 159         unsigned long error_code;
 160         unsigned long trap_no;
 161         unsigned long irix_trampoline;  /* Wheee... */
 162         unsigned long irix_oldctx;
 163         struct mips_abi *abi;
 164 };
 165
 166 #ifdef CONFIG_MIPS_MT_FPAFF
 167 #define FPAFF_INIT                                              \
 168         .emulated_fp                    = 0,                    \
 169         .user_cpus_allowed              = INIT_CPUMASK,
 170 #else
 171 #define FPAFF_INIT
 172 #endif /* CONFIG_MIPS_MT_FPAFF */
 173
 174 #define INIT_THREAD  {                                          \
 175         /*                                                      \
 176          * Saved main processor registers                       \
 177          */                                                     \
 178         .reg16                  = 0,                            \
 179         .reg17                  = 0,                            \
 180         .reg18                  = 0,                            \
 181         .reg19                  = 0,                            \
 182         .reg20                  = 0,                            \
 183         .reg21                  = 0,                            \
 184         .reg22                  = 0,                            \
 185         .reg23                  = 0,                            \
 186         .reg29                  = 0,                            \
 187         .reg30                  = 0,                            \
 188         .reg31                  = 0,                            \
 189         /*                                                      \
 190          * Saved cp0 stuff                                      \
 191          */                                                     \
 192         .cp0_status             = 0,                            \
 193         /*                                                      \
 194          * Saved FPU/FPU emulator stuff                         \
 195          */                                                     \
 196         .fpu                    = {                             \
 197                 .fpr            = {0,},                         \
 198                 .fcr31          = 0,                            \
 199         },                                                      \
 200         /*                                                      \
 201          * FPU affinity state (null if not FPAFF)               \
 202          */                                                     \
 203         FPAFF_INIT                                              \
 204         /*                                                      \
 205          * Saved DSP stuff                                      \
 206          */                                                     \
 207         .dsp                    = {                             \
 208                 .dspr           = {0, },                        \
 209                 .dspcontrol     = 0,                            \
 210         },                                                      \
 211         /*                                                      \
 212          * saved watch register stuff                           \
 213          */                                                     \
 214         .watch = {{{0,},},},                                    \
 215         /*                                                      \
 216          * Other stuff associated with the process              \
 217          */                                                     \
 218         .cp0_badvaddr           = 0,                            \
 219         .cp0_baduaddr           = 0,                            \
 220         .error_code             = 0,                            \
 221         .trap_no                = 0,                            \
 222         .irix_trampoline        = 0,                            \
 223         .irix_oldctx            = 0,                            \
 224 }
 225
 226 struct task_struct;
 227
 228 /* Free all resources held by a thread. */
 229 #define release_thread(thread) do { } while(0)
 230
 231 /* Prepare to copy thread state - unlazy all lazy status */
 232 #define prepare_to_copy(tsk)    do { } while (0)
 233
 234 extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 235
 236 extern unsigned long thread_saved_pc(struct task_struct *tsk);
 237
 238 /*
 239  * Do necessary setup to start up a newly executed thread.
 240  */
 241 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
 242
 243 unsigned long get_wchan(struct task_struct *p);
 244
 245 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
 246 #define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
 247 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
 248 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
 249 #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
 250
 251 #define cpu_relax()     barrier()
 252
 253 /*
 254  * Return_address is a replacement for __builtin_return_address(count)
 255  * which on certain architectures cannot reasonably be implemented in GCC
 256  * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
 257  * Note that __builtin_return_address(x>=1) is forbidden because GCC
 258  * aborts compilation on some CPUs.  It's simply not possible to unwind
 259  * some CPU's stackframes.
 260  *
 261  * __builtin_return_address works only for non-leaf functions.  We avoid the
 262  * overhead of a function call by forcing the compiler to save the return
 263  * address register on the stack.
 264  */
 265 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
 266
 267 #ifdef CONFIG_CPU_HAS_PREFETCH
 268
 269 #define ARCH_HAS_PREFETCH
 270
 271 static inline void prefetch(const void *addr)
 272 {
 273         __asm__ __volatile__(
 274         "       .set    mips4           \n"
 275         "       pref    %0, (%1)        \n"
 276         "       .set    mips0           \n"
 277         :
 278         : "i" (Pref_Load), "r" (addr));
 279 }
 280
 281 #endif
 282
 283 #endif /* _ASM_PROCESSOR_H */