2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix = mipsel-linux-
26 64bit-tool-prefix = mips64el-linux-
27 32bit-bfd = elf32-tradlittlemips
28 64bit-bfd = elf64-tradlittlemips
29 32bit-emul = elf32ltsmip
30 64bit-emul = elf64ltsmip
32 32bit-tool-prefix = mips-linux-
33 64bit-tool-prefix = mips64-linux-
34 32bit-bfd = elf32-tradbigmips
35 64bit-bfd = elf64-tradbigmips
36 32bit-emul = elf32btsmip
37 64bit-emul = elf64btsmip
42 tool-prefix = $(32bit-tool-prefix)
47 tool-prefix = $(64bit-tool-prefix)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE := $(tool-prefix)
55 CHECKFLAGS-y += -D__linux__ -D__mips__ \
60 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
63 -D__PTRDIFF_TYPE__=int
64 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
67 -D__PTRDIFF_TYPE__="long int"
68 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
69 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
71 CHECKFLAGS = $(CHECKFLAGS-y)
73 ifdef CONFIG_BUILD_ELF64
75 ld-emul = $(64bit-emul)
76 vmlinux-32 = vmlinux.32
80 ld-emul = $(32bit-emul)
82 vmlinux-64 = vmlinux.64
84 cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
88 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
89 # code since it only slows down the whole thing. At some point we might make
90 # use of global pointer optimizations but their use of $28 conflicts with
91 # the current pointer optimization.
93 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
94 # machines may also. Since BFD is incredibly buggy with respect to
95 # crossformat linking we rely on the elf2ecoff tool for format conversion.
97 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
98 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
99 MODFLAGS += -mlong-calls
102 # We explicitly add the endianness specifier if needed, this allows
103 # to compile kernels with a toolchain for the other endianness. We
104 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
105 # when fed the toolchain default!
107 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
108 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
110 cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer
113 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
115 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
117 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
118 # with up to the oldest supported tools)
119 # <isa2> -- an ISA designation used as an ABI selector for
120 # gcc versions that do not support "-mabi=32"
121 # (depending on the CPU type, either "mips1" or
124 set_gccflags = $(shell \
126 cpu=$(1); isa=-$(2); \
127 for gcc_opt in -march= -mcpu=; do \
128 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
129 -xc /dev/null > /dev/null 2>&1 && \
132 cpu=$(3); isa=-$(4); \
133 for gcc_opt in -march= -mcpu=; do \
134 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
135 -xc /dev/null > /dev/null 2>&1 && \
140 gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
141 if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
144 gcc_abi=; gcc_isa=-$(5); \
146 gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
148 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
149 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
150 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
153 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
156 if test "$(gcc-abi)" != "$(gas-abi)"; then \
157 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
159 if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
160 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
161 -xc /dev/null > /dev/null 2>&1 && \
164 echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
167 # CPU-dependent compiler/assembler options for optimization.
169 cflags-$(CONFIG_CPU_R3000) += \
170 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
171 CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
173 cflags-$(CONFIG_CPU_TX39XX) += \
174 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
175 CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
177 cflags-$(CONFIG_CPU_R6000) += \
178 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
180 CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
182 cflags-$(CONFIG_CPU_R4300) += \
183 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
185 CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
187 cflags-$(CONFIG_CPU_VR41XX) += \
188 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
190 CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
192 cflags-$(CONFIG_CPU_R4X00) += \
193 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
195 CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
197 cflags-$(CONFIG_CPU_TX49XX) += \
198 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
200 CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
202 cflags-$(CONFIG_CPU_MIPS32_R1) += \
203 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
205 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
207 cflags-$(CONFIG_CPU_MIPS32_R2) += \
208 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
210 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
212 cflags-$(CONFIG_CPU_MIPS64_R1) += \
213 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
215 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
217 cflags-$(CONFIG_CPU_MIPS64_R2) += \
218 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
220 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
222 cflags-$(CONFIG_CPU_R5000) += \
223 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
225 CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
227 cflags-$(CONFIG_CPU_R5432) += \
228 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
230 CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
232 cflags-$(CONFIG_CPU_NEVADA) += \
233 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
235 CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
237 cflags-$(CONFIG_CPU_RM7000) += \
238 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
240 CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
242 cflags-$(CONFIG_CPU_RM9000) += \
243 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
245 CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
248 cflags-$(CONFIG_CPU_SB1) += \
249 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
251 CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
253 cflags-$(CONFIG_CPU_R8000) += \
254 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
256 CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
258 cflags-$(CONFIG_CPU_R10000) += \
259 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
261 CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
264 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
265 MODFLAGS += -msb1-pass1-workarounds
272 libs-$(CONFIG_ARC) += arch/mips/arc/
273 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
276 # Board-dependent options and extra files
280 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
282 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
283 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
284 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
287 # Common Alchemy Au1x00 stuff
289 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
290 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
293 # AMD Alchemy Pb1000 eval board
295 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
296 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
297 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
300 # AMD Alchemy Pb1100 eval board
302 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
303 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
304 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
307 # AMD Alchemy Pb1500 eval board
309 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
310 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
311 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
314 # AMD Alchemy Pb1550 eval board
316 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
317 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
318 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
321 # AMD Alchemy Pb1200 eval board
323 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
324 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
325 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
328 # AMD Alchemy Db1000 eval board
330 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
331 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
332 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
335 # AMD Alchemy Db1100 eval board
337 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
338 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
339 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
342 # AMD Alchemy Db1500 eval board
344 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
345 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
346 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
349 # AMD Alchemy Db1550 eval board
351 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
352 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
353 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
356 # AMD Alchemy Db1200 eval board
358 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
359 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
360 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
363 # AMD Alchemy Bosporus eval board
365 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
366 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
367 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
370 # AMD Alchemy Mirage eval board
372 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
373 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
374 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
377 # 4G-Systems eval board
379 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
380 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
385 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
386 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
391 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
392 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
393 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
398 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
399 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
400 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
401 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
402 CLEAN_FILES += drivers/tc/lk201-map.c
405 # Galileo EV64120 Board
407 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
408 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
409 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
410 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
413 # Galileo EV96100 Board
415 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
416 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
417 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
420 # Globespan IVR eval board with QED 5231 CPU
422 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
423 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
424 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
427 # ITE 8172 eval board with QED 5231 CPU
429 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
430 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
433 # For all MIPS, Inc. eval boards
435 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
440 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
441 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
442 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
443 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
448 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
449 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
450 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
455 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
456 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
461 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
462 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
463 load-$(CONFIG_MIPS_SIM) += 0x80100000
466 # Momentum Ocelot board
468 # The Ocelot setup.o must be linked early - it does the ioremap() for the
471 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
472 arch/mips/gt64120/momenco_ocelot/
473 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
474 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
477 # Momentum Ocelot-G board
479 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
482 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
483 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
486 # Momentum Ocelot-C and -CS boards
488 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
490 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
491 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
494 # PMC-Sierra Yosemite
496 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
497 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
498 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
500 # Qemu simulating MIPS32 4Kc
502 core-$(CONFIG_QEMU) += arch/mips/qemu/
503 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
504 load-$(CONFIG_QEMU) += 0xffffffff80010000
509 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
510 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
511 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
514 # Momentum Jaguar ATX
516 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
517 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
518 #ifdef CONFIG_JAGUAR_DMALOW
519 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
521 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
527 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
532 core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
533 load-$(CONFIG_DDB5074) += 0xffffffff80080000
538 core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
539 load-$(CONFIG_DDB5476) += 0xffffffff80080000
544 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
545 load-$(CONFIG_DDB5477) += 0xffffffff80100000
547 core-$(CONFIG_LASAT) += arch/mips/lasat/
548 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
549 load-$(CONFIG_LASAT) += 0xffffffff80000000
554 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
555 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
560 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
561 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
564 # ZAO Networks Capcella (VR4131)
566 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
569 # Victor MP-C303/304 (VR4122)
571 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
574 # IBM WorkPad z50 (VR4121)
576 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
577 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
580 # CASIO CASSIPEIA E-55/65 (VR4111)
582 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
583 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
586 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
588 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
591 # Common Philips PNX8550
593 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
594 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
597 # Philips PNX8550 JBS board
599 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
600 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
601 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
604 # SGI IP22 (Indy/Indigo2)
606 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
607 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
608 # be aligned to a multiple of the kernel stack size or the handling of the
609 # current variable will break so for 64-bit kernels we have to raise the start
612 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
613 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
615 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
618 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
622 # SGI-IP27 (Origin200/2000)
624 # Set the load address to >= 0xc000000000300000 if you want to leave space for
625 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
626 # be 16kb aligned or the handling of the current variable will break.
628 ifdef CONFIG_SGI_IP27
629 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
630 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
631 ifdef CONFIG_BUILD_ELF64
632 ifdef CONFIG_MAPPED_KERNEL
633 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
634 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
635 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
637 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
638 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
641 ifdef CONFIG_MAPPED_KERNEL
642 load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
643 OBJCOPYFLAGS := --change-addresses=0xc000000080000000
644 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
646 load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
647 OBJCOPYFLAGS := --change-addresses=0xa800000080000000
655 # Set the load address to >= 80069000 if you want to leave space for symmon,
656 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
657 # a multiple of the kernel stack size or the handling of the current variable
660 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
661 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
662 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
667 # This is a LIB so that it links at the end, and initcalls are later
668 # the sequence; but it is built as an object so that modules don't get
669 # removed (as happens, even if they have __initcall/module_init)
671 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
672 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
673 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
675 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
676 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
677 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
679 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
680 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
681 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
683 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
684 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
685 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
688 # Sibyte BCM91120x (Carmel) board
689 # Sibyte BCM91120C (CRhine) board
690 # Sibyte BCM91125C (CRhone) board
691 # Sibyte BCM91125E (Rhone) board
693 # Sibyte BCM91x80 (BigSur) board
695 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
696 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
697 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
698 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
699 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
700 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
701 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
702 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
703 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
704 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
705 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
706 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
707 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
708 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
713 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
714 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
715 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
718 # Toshiba JMR-TX3927 board
720 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
721 arch/mips/jmr3927/common/
722 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
723 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
726 # Toshiba RBTX4927 board or
727 # Toshiba RBTX4937 board
729 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
730 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
731 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
734 # Toshiba RBTX4938 board
736 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
737 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
738 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
740 cflags-y += -Iinclude/asm-mips/mach-generic
741 drivers-$(CONFIG_PCI) += arch/mips/pci/
744 ifdef CONFIG_CPU_LITTLE_ENDIAN
747 JIFFIES = jiffies_64 + 4
753 AFLAGS += $(cflags-y)
754 CFLAGS += $(cflags-y)
756 LDFLAGS += -m $(ld-emul)
758 OBJCOPYFLAGS += --remove-section=.reginfo
761 # Choosing incompatible machines durings configuration will result in
762 # error messages during linking. Select a default linkscript if
763 # none has been choosen above.
766 CPPFLAGS_vmlinux.lds := \
768 -D"LOADADDR=$(load-y)" \
769 -D"JIFFIES=$(JIFFIES)" \
770 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
772 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
774 libs-y += arch/mips/lib/
775 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
776 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
778 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
780 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
783 rom.bin rom.sw: vmlinux
784 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
788 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
789 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
790 # convert to ECOFF using elf2ecoff.
793 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
796 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
797 # ELF files from 32-bit files by conversion.
800 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
802 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
804 ifdef CONFIG_BOOT_ELF32
808 ifdef CONFIG_BOOT_ELF64
812 ifdef CONFIG_MIPS_ATLAS
816 ifdef CONFIG_MIPS_MALTA
820 ifdef CONFIG_MIPS_SEAD
828 ifdef CONFIG_SNI_RM200_PCI
832 vmlinux.bin: $(vmlinux-32)
833 +@$(call makeboot,$@)
835 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
836 +@$(call makeboot,$@)
838 vmlinux.srec: $(vmlinux-32)
839 +@$(call makeboot,$@)
841 CLEAN_FILES += vmlinux.ecoff \
847 @$(MAKE) $(clean)=arch/mips/boot
848 @$(MAKE) $(clean)=arch/mips/lasat
850 CLEAN_FILES += vmlinux.32 \