arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * File:         arch/blackfin/mach-bf518/boards/ezbrd.c
   3  * Based on:     arch/blackfin/mach-bf527/boards/ezbrd.c
   4  * Author:       Bryan Wu <cooloney@kernel.org>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2008 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/mtd/physmap.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/irq.h>
  41 #include <linux/interrupt.h>
  42 #include <asm/dma.h>
  43 #include <asm/bfin5xx_spi.h>
  44 #include <asm/reboot.h>
  45 #include <asm/portmux.h>
  46 #include <asm/dpmc.h>
  47 #include <asm/bfin_sdh.h>
  48 #include <linux/spi/ad7877.h>
  49 #include <net/dsa.h>
  50
  51 /*
  52  * Name the Board for the /proc/cpuinfo
  53  */
  54 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  55
  56 /*
  57  *  Driver needs to know address, irq and flag pin.
  58  */
  59
  60 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  61 static struct mtd_partition ezbrd_partitions[] = {
  62         {
  63                 .name       = "bootloader(nor)",
  64                 .size       = 0x40000,
  65                 .offset     = 0,
  66         }, {
  67                 .name       = "linux kernel(nor)",
  68                 .size       = 0x1C0000,
  69                 .offset     = MTDPART_OFS_APPEND,
  70         }, {
  71                 .name       = "file system(nor)",
  72                 .size       = MTDPART_SIZ_FULL,
  73                 .offset     = MTDPART_OFS_APPEND,
  74         }
  75 };
  76
  77 static struct physmap_flash_data ezbrd_flash_data = {
  78         .width      = 2,
  79         .parts      = ezbrd_partitions,
  80         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  81 };
  82
  83 static struct resource ezbrd_flash_resource = {
  84         .start = 0x20000000,
  85         .end   = 0x203fffff,
  86         .flags = IORESOURCE_MEM,
  87 };
  88
  89 static struct platform_device ezbrd_flash_device = {
  90         .name          = "physmap-flash",
  91         .id            = 0,
  92         .dev = {
  93                 .platform_data = &ezbrd_flash_data,
  94         },
  95         .num_resources = 1,
  96         .resource      = &ezbrd_flash_resource,
  97 };
  98 #endif
  99
 100 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 101 static struct platform_device rtc_device = {
 102         .name = "rtc-bfin",
 103         .id   = -1,
 104 };
 105 #endif
 106
 107 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 108 static struct platform_device bfin_mii_bus = {
 109         .name = "bfin_mii_bus",
 110 };
 111
 112 static struct platform_device bfin_mac_device = {
 113         .name = "bfin_mac",
 114         .dev.platform_data = &bfin_mii_bus,
 115 };
 116 #endif
 117
 118 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 119 static struct dsa_platform_data ksz8893m_switch_data = {
 120         .mii_bus = &bfin_mii_bus.dev,
 121         .netdev = &bfin_mac_device.dev,
 122         .port_names[0]  = NULL,
 123         .port_names[1]  = "eth%d",
 124         .port_names[2]  = "eth%d",
 125         .port_names[3]  = "cpu",
 126 };
 127
 128 static struct platform_device ksz8893m_switch_device = {
 129         .name           = "dsa",
 130         .id             = 0,
 131         .num_resources  = 0,
 132         .dev.platform_data = &ksz8893m_switch_data,
 133 };
 134 #endif
 135
 136 #if defined(CONFIG_MTD_M25P80) \
 137         || defined(CONFIG_MTD_M25P80_MODULE)
 138 static struct mtd_partition bfin_spi_flash_partitions[] = {
 139         {
 140                 .name = "bootloader(spi)",
 141                 .size = 0x00040000,
 142                 .offset = 0,
 143                 .mask_flags = MTD_CAP_ROM
 144         }, {
 145                 .name = "linux kernel(spi)",
 146                 .size = MTDPART_SIZ_FULL,
 147                 .offset = MTDPART_OFS_APPEND,
 148         }
 149 };
 150
 151 static struct flash_platform_data bfin_spi_flash_data = {
 152         .name = "m25p80",
 153         .parts = bfin_spi_flash_partitions,
 154         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 155         .type = "m25p16",
 156 };
 157
 158 /* SPI flash chip (m25p64) */
 159 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 160         .enable_dma = 0,         /* use dma transfer with this chip*/
 161         .bits_per_word = 8,
 162 };
 163 #endif
 164
 165 #if defined(CONFIG_SPI_ADC_BF533) \
 166         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 167 /* SPI ADC chip */
 168 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 169         .enable_dma = 1,         /* use dma transfer with this chip*/
 170         .bits_per_word = 16,
 171 };
 172 #endif
 173
 174 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 175         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 176 /* SPI SWITCH CHIP */
 177 static struct bfin5xx_spi_chip spi_switch_info = {
 178         .enable_dma = 0,
 179         .bits_per_word = 8,
 180 };
 181 #endif
 182
 183 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 184 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 185         .enable_dma = 1,
 186         .bits_per_word = 8,
 187 };
 188 #endif
 189
 190 #if defined(CONFIG_PBX)
 191 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 192         .ctl_reg        = 0x4, /* send zero */
 193         .enable_dma     = 0,
 194         .bits_per_word  = 8,
 195         .cs_change_per_word = 1,
 196 };
 197 #endif
 198
 199 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 200 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 201         .enable_dma = 0,
 202         .bits_per_word = 16,
 203 };
 204
 205 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 206         .model                  = 7877,
 207         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 208         .x_plate_ohms           = 419,
 209         .y_plate_ohms           = 486,
 210         .pressure_max           = 1000,
 211         .pressure_min           = 0,
 212         .stopacq_polarity       = 1,
 213         .first_conversion_delay = 3,
 214         .acquisition_time       = 1,
 215         .averaging              = 1,
 216         .pen_down_acc_interval  = 1,
 217 };
 218 #endif
 219
 220 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 221          && defined(CONFIG_SND_SOC_WM8731_SPI)
 222 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 223         .enable_dma = 0,
 224         .bits_per_word = 16,
 225 };
 226 #endif
 227
 228 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 229 static struct bfin5xx_spi_chip spidev_chip_info = {
 230         .enable_dma = 0,
 231         .bits_per_word = 8,
 232 };
 233 #endif
 234
 235 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 236 #if defined(CONFIG_MTD_M25P80) \
 237         || defined(CONFIG_MTD_M25P80_MODULE)
 238         {
 239                 /* the modalias must be the same as spi device driver name */
 240                 .modalias = "m25p80", /* Name of spi_driver for this device */
 241                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 242                 .bus_num = 0, /* Framework bus number */
 243                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 244                 .platform_data = &bfin_spi_flash_data,
 245                 .controller_data = &spi_flash_chip_info,
 246                 .mode = SPI_MODE_3,
 247         },
 248 #endif
 249
 250 #if defined(CONFIG_SPI_ADC_BF533) \
 251         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 252         {
 253                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 254                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 255                 .bus_num = 0, /* Framework bus number */
 256                 .chip_select = 1, /* Framework chip select. */
 257                 .platform_data = NULL, /* No spi_driver specific config */
 258                 .controller_data = &spi_adc_chip_info,
 259         },
 260 #endif
 261
 262 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 263         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 264         {
 265                 .modalias = "ksz8893m",
 266                 .max_speed_hz = 5000000,
 267                 .bus_num = 0,
 268                 .chip_select = 1,
 269                 .platform_data = NULL,
 270                 .controller_data = &spi_switch_info,
 271                 .mode = SPI_MODE_3,
 272         },
 273 #endif
 274
 275 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 276         {
 277                 .modalias = "spi_mmc_dummy",
 278                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 279                 .bus_num = 0,
 280                 .chip_select = 0,
 281                 .platform_data = NULL,
 282                 .controller_data = &spi_mmc_chip_info,
 283                 .mode = SPI_MODE_3,
 284         },
 285         {
 286                 .modalias = "spi_mmc",
 287                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 288                 .bus_num = 0,
 289                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 290                 .platform_data = NULL,
 291                 .controller_data = &spi_mmc_chip_info,
 292                 .mode = SPI_MODE_3,
 293         },
 294 #endif
 295 #if defined(CONFIG_PBX)
 296         {
 297                 .modalias = "fxs-spi",
 298                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 299                 .bus_num = 0,
 300                 .chip_select = 8 - CONFIG_J11_JUMPER,
 301                 .controller_data = &spi_si3xxx_chip_info,
 302                 .mode = SPI_MODE_3,
 303         },
 304         {
 305                 .modalias = "fxo-spi",
 306                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 307                 .bus_num = 0,
 308                 .chip_select = 8 - CONFIG_J19_JUMPER,
 309                 .controller_data = &spi_si3xxx_chip_info,
 310                 .mode = SPI_MODE_3,
 311         },
 312 #endif
 313 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 314         {
 315                 .modalias               = "ad7877",
 316                 .platform_data          = &bfin_ad7877_ts_info,
 317                 .irq                    = IRQ_PF8,
 318                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 319                 .bus_num        = 0,
 320                 .chip_select  = 2,
 321                 .controller_data = &spi_ad7877_chip_info,
 322         },
 323 #endif
 324 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 325          && defined(CONFIG_SND_SOC_WM8731_SPI)
 326         {
 327                 .modalias       = "wm8731",
 328                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 329                 .bus_num        = 0,
 330                 .chip_select    = 5,
 331                 .controller_data = &spi_wm8731_chip_info,
 332                 .mode = SPI_MODE_0,
 333         },
 334 #endif
 335 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 336         {
 337                 .modalias = "spidev",
 338                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 339                 .bus_num = 0,
 340                 .chip_select = 1,
 341                 .controller_data = &spidev_chip_info,
 342         },
 343 #endif
 344 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 345         {
 346                 .modalias = "bfin-lq035q1-spi",
 347                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 348                 .bus_num = 0,
 349                 .chip_select = 1,
 350                 .controller_data = &lq035q1_spi_chip_info,
 351                 .mode = SPI_CPHA | SPI_CPOL,
 352         },
 353 #endif
 354 };
 355
 356 /* SPI controller data */
 357 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 358 /* SPI (0) */
 359 static struct bfin5xx_spi_master bfin_spi0_info = {
 360         .num_chipselect = 5,
 361         .enable_dma = 1,  /* master has the ability to do dma transfer */
 362         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 363 };
 364
 365 static struct resource bfin_spi0_resource[] = {
 366         [0] = {
 367                 .start = SPI0_REGBASE,
 368                 .end   = SPI0_REGBASE + 0xFF,
 369                 .flags = IORESOURCE_MEM,
 370                 },
 371         [1] = {
 372                 .start = CH_SPI0,
 373                 .end   = CH_SPI0,
 374                 .flags = IORESOURCE_IRQ,
 375         },
 376 };
 377
 378 static struct platform_device bfin_spi0_device = {
 379         .name = "bfin-spi",
 380         .id = 0, /* Bus number */
 381         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 382         .resource = bfin_spi0_resource,
 383         .dev = {
 384                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 385         },
 386 };
 387
 388 /* SPI (1) */
 389 static struct bfin5xx_spi_master bfin_spi1_info = {
 390         .num_chipselect = 5,
 391         .enable_dma = 1,  /* master has the ability to do dma transfer */
 392         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 393 };
 394
 395 static struct resource bfin_spi1_resource[] = {
 396         [0] = {
 397                 .start = SPI1_REGBASE,
 398                 .end   = SPI1_REGBASE + 0xFF,
 399                 .flags = IORESOURCE_MEM,
 400                 },
 401         [1] = {
 402                 .start = CH_SPI1,
 403                 .end   = CH_SPI1,
 404                 .flags = IORESOURCE_IRQ,
 405         },
 406 };
 407
 408 static struct platform_device bfin_spi1_device = {
 409         .name = "bfin-spi",
 410         .id = 1, /* Bus number */
 411         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 412         .resource = bfin_spi1_resource,
 413         .dev = {
 414                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 415         },
 416 };
 417 #endif  /* spi master and devices */
 418
 419 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 420 static struct resource bfin_uart_resources[] = {
 421 #ifdef CONFIG_SERIAL_BFIN_UART0
 422         {
 423                 .start = 0xFFC00400,
 424                 .end = 0xFFC004FF,
 425                 .flags = IORESOURCE_MEM,
 426         },
 427 #endif
 428 #ifdef CONFIG_SERIAL_BFIN_UART1
 429         {
 430                 .start = 0xFFC02000,
 431                 .end = 0xFFC020FF,
 432                 .flags = IORESOURCE_MEM,
 433         },
 434 #endif
 435 };
 436
 437 static struct platform_device bfin_uart_device = {
 438         .name = "bfin-uart",
 439         .id = 1,
 440         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 441         .resource = bfin_uart_resources,
 442 };
 443 #endif
 444
 445 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 446 #ifdef CONFIG_BFIN_SIR0
 447 static struct resource bfin_sir0_resources[] = {
 448         {
 449                 .start = 0xFFC00400,
 450                 .end = 0xFFC004FF,
 451                 .flags = IORESOURCE_MEM,
 452         },
 453         {
 454                 .start = IRQ_UART0_RX,
 455                 .end = IRQ_UART0_RX+1,
 456                 .flags = IORESOURCE_IRQ,
 457         },
 458         {
 459                 .start = CH_UART0_RX,
 460                 .end = CH_UART0_RX+1,
 461                 .flags = IORESOURCE_DMA,
 462         },
 463 };
 464
 465 static struct platform_device bfin_sir0_device = {
 466         .name = "bfin_sir",
 467         .id = 0,
 468         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 469         .resource = bfin_sir0_resources,
 470 };
 471 #endif
 472 #ifdef CONFIG_BFIN_SIR1
 473 static struct resource bfin_sir1_resources[] = {
 474         {
 475                 .start = 0xFFC02000,
 476                 .end = 0xFFC020FF,
 477                 .flags = IORESOURCE_MEM,
 478         },
 479         {
 480                 .start = IRQ_UART1_RX,
 481                 .end = IRQ_UART1_RX+1,
 482                 .flags = IORESOURCE_IRQ,
 483         },
 484         {
 485                 .start = CH_UART1_RX,
 486                 .end = CH_UART1_RX+1,
 487                 .flags = IORESOURCE_DMA,
 488         },
 489 };
 490
 491 static struct platform_device bfin_sir1_device = {
 492         .name = "bfin_sir",
 493         .id = 1,
 494         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 495         .resource = bfin_sir1_resources,
 496 };
 497 #endif
 498 #endif
 499
 500 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 501 static struct resource bfin_twi0_resource[] = {
 502         [0] = {
 503                 .start = TWI0_REGBASE,
 504                 .end   = TWI0_REGBASE,
 505                 .flags = IORESOURCE_MEM,
 506         },
 507         [1] = {
 508                 .start = IRQ_TWI,
 509                 .end   = IRQ_TWI,
 510                 .flags = IORESOURCE_IRQ,
 511         },
 512 };
 513
 514 static struct platform_device i2c_bfin_twi_device = {
 515         .name = "i2c-bfin-twi",
 516         .id = 0,
 517         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 518         .resource = bfin_twi0_resource,
 519 };
 520 #endif
 521
 522 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 523 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 524         {
 525                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 526         },
 527 #endif
 528 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 529         {
 530                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 531                 .irq = IRQ_PF8,
 532         },
 533 #endif
 534 };
 535
 536 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 537 static struct platform_device bfin_sport0_uart_device = {
 538         .name = "bfin-sport-uart",
 539         .id = 0,
 540 };
 541
 542 static struct platform_device bfin_sport1_uart_device = {
 543         .name = "bfin-sport-uart",
 544         .id = 1,
 545 };
 546 #endif
 547
 548 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 549 #include <linux/input.h>
 550 #include <linux/gpio_keys.h>
 551
 552 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 553         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 554         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 555 };
 556
 557 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 558         .buttons        = bfin_gpio_keys_table,
 559         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 560 };
 561
 562 static struct platform_device bfin_device_gpiokeys = {
 563         .name      = "gpio-keys",
 564         .dev = {
 565                 .platform_data = &bfin_gpio_keys_data,
 566         },
 567 };
 568 #endif
 569
 570 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 571
 572 static struct bfin_sd_host bfin_sdh_data = {
 573         .dma_chan = CH_RSI,
 574         .irq_int0 = IRQ_RSI_INT0,
 575         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 576 };
 577
 578 static struct platform_device bf51x_sdh_device = {
 579         .name = "bfin-sdh",
 580         .id = 0,
 581         .dev = {
 582                 .platform_data = &bfin_sdh_data,
 583         },
 584 };
 585 #endif
 586
 587 static struct resource bfin_gpios_resources = {
 588         .start = 0,
 589         .end   = MAX_BLACKFIN_GPIOS - 1,
 590         .flags = IORESOURCE_IRQ,
 591 };
 592
 593 static struct platform_device bfin_gpios_device = {
 594         .name = "simple-gpio",
 595         .id = -1,
 596         .num_resources = 1,
 597         .resource = &bfin_gpios_resources,
 598 };
 599
 600 static const unsigned int cclk_vlev_datasheet[] =
 601 {
 602         VRPAIR(VLEV_100, 400000000),
 603         VRPAIR(VLEV_105, 426000000),
 604         VRPAIR(VLEV_110, 500000000),
 605         VRPAIR(VLEV_115, 533000000),
 606         VRPAIR(VLEV_120, 600000000),
 607 };
 608
 609 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 610         .tuple_tab = cclk_vlev_datasheet,
 611         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 612         .vr_settling_time = 25 /* us */,
 613 };
 614
 615 static struct platform_device bfin_dpmc = {
 616         .name = "bfin dpmc",
 617         .dev = {
 618                 .platform_data = &bfin_dmpc_vreg_data,
 619         },
 620 };
 621
 622 static struct platform_device *stamp_devices[] __initdata = {
 623
 624         &bfin_dpmc,
 625
 626 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 627         &rtc_device,
 628 #endif
 629
 630 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 631         &bfin_mii_bus,
 632         &bfin_mac_device,
 633 #endif
 634
 635 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 636         &ksz8893m_switch_device,
 637 #endif
 638
 639 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 640         &bfin_spi0_device,
 641         &bfin_spi1_device,
 642 #endif
 643
 644 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 645         &bfin_uart_device,
 646 #endif
 647
 648 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 649 #ifdef CONFIG_BFIN_SIR0
 650         &bfin_sir0_device,
 651 #endif
 652 #ifdef CONFIG_BFIN_SIR1
 653         &bfin_sir1_device,
 654 #endif
 655 #endif
 656
 657 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 658         &i2c_bfin_twi_device,
 659 #endif
 660
 661 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 662         &bfin_sport0_uart_device,
 663         &bfin_sport1_uart_device,
 664 #endif
 665
 666 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 667         &bfin_device_gpiokeys,
 668 #endif
 669
 670 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 671         &bf51x_sdh_device,
 672 #endif
 673
 674 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 675         &ezbrd_flash_device,
 676 #endif
 677
 678         &bfin_gpios_device,
 679 };
 680
 681 static int __init ezbrd_init(void)
 682 {
 683         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 684         i2c_register_board_info(0, bfin_i2c_board_info,
 685                                 ARRAY_SIZE(bfin_i2c_board_info));
 686         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 687         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 688         return 0;
 689 }
 690
 691 arch_initcall(ezbrd_init);
 692
 693 void native_machine_restart(char *cmd)
 694 {
 695         /* workaround reboot hang when booting from SPI */
 696         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 697                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 698 }
 699
 700 void bfin_get_ether_addr(char *addr)
 701 {
 702         /* the MAC is stored in OTP memory page 0xDF */
 703         u32 ret;
 704         u64 otp_mac;
 705         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 706
 707         ret = otp_read(0xDF, 0x00, &otp_mac);
 708         if (!(ret & 0x1)) {
 709                 char *otp_mac_p = (char *)&otp_mac;
 710                 for (ret = 0; ret < 6; ++ret)
 711                         addr[ret] = otp_mac_p[5 - ret];
 712         }
 713 }
 714 EXPORT_SYMBOL(bfin_get_ether_addr);