arch/blackfin/kernel/setup.c

   1 /*
   2  * arch/blackfin/kernel/setup.c
   3  *
   4  * Copyright 2004-2006 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/console.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/cpu.h>
  16 #include <linux/mm.h>
  17 #include <linux/module.h>
  18 #include <linux/tty.h>
  19 #include <linux/pfn.h>
  20
  21 #include <linux/ext2_fs.h>
  22 #include <linux/cramfs_fs.h>
  23 #include <linux/romfs_fs.h>
  24
  25 #include <asm/cplb.h>
  26 #include <asm/cacheflush.h>
  27 #include <asm/blackfin.h>
  28 #include <asm/cplbinit.h>
  29 #include <asm/div64.h>
  30 #include <asm/cpu.h>
  31 #include <asm/fixed_code.h>
  32 #include <asm/early_printk.h>
  33
  34 u16 _bfin_swrst;
  35 EXPORT_SYMBOL(_bfin_swrst);
  36
  37 unsigned long memory_start, memory_end, physical_mem_end;
  38 unsigned long _rambase, _ramstart, _ramend;
  39 unsigned long reserved_mem_dcache_on;
  40 unsigned long reserved_mem_icache_on;
  41 EXPORT_SYMBOL(memory_start);
  42 EXPORT_SYMBOL(memory_end);
  43 EXPORT_SYMBOL(physical_mem_end);
  44 EXPORT_SYMBOL(_ramend);
  45 EXPORT_SYMBOL(reserved_mem_dcache_on);
  46
  47 #ifdef CONFIG_MTD_UCLINUX
  48 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  49 unsigned long _ebss;
  50 EXPORT_SYMBOL(memory_mtd_end);
  51 EXPORT_SYMBOL(memory_mtd_start);
  52 EXPORT_SYMBOL(mtd_size);
  53 #endif
  54
  55 char __initdata command_line[COMMAND_LINE_SIZE];
  56 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  57         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  58
  59 /* boot memmap, for parsing "memmap=" */
  60 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
  61 #define BFIN_MEMMAP_RAM         1
  62 #define BFIN_MEMMAP_RESERVED    2
  63 struct bfin_memmap {
  64         int nr_map;
  65         struct bfin_memmap_entry {
  66                 unsigned long long addr; /* start of memory segment */
  67                 unsigned long long size;
  68                 unsigned long type;
  69         } map[BFIN_MEMMAP_MAX];
  70 } bfin_memmap __initdata;
  71
  72 /* for memmap sanitization */
  73 struct change_member {
  74         struct bfin_memmap_entry *pentry; /* pointer to original entry */
  75         unsigned long long addr; /* address for this change point */
  76 };
  77 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  78 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  79 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  80 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  81
  82 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  83
  84 static int early_init_clkin_hz(char *buf);
  85
  86 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  87 void __init generate_cplb_tables(void)
  88 {
  89         unsigned int cpu;
  90
  91         /* Generate per-CPU I&D CPLB tables */
  92         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  93                 generate_cplb_tables_cpu(cpu);
  94 }
  95 #endif
  96
  97 void __cpuinit bfin_setup_caches(unsigned int cpu)
  98 {
  99 #ifdef CONFIG_BFIN_ICACHE
 100 #ifdef CONFIG_MPU
 101         bfin_icache_init(icplb_tbl[cpu]);
 102 #else
 103         bfin_icache_init(icplb_tables[cpu]);
 104 #endif
 105 #endif
 106
 107 #ifdef CONFIG_BFIN_DCACHE
 108 #ifdef CONFIG_MPU
 109         bfin_dcache_init(dcplb_tbl[cpu]);
 110 #else
 111         bfin_dcache_init(dcplb_tables[cpu]);
 112 #endif
 113 #endif
 114
 115         /*
 116          * In cache coherence emulation mode, we need to have the
 117          * D-cache enabled before running any atomic operation which
 118          * might invove cache invalidation (i.e. spinlock, rwlock).
 119          * So printk's are deferred until then.
 120          */
 121 #ifdef CONFIG_BFIN_ICACHE
 122         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
 123 #endif
 124 #ifdef CONFIG_BFIN_DCACHE
 125         printk(KERN_INFO "Data Cache Enabled for CPU%u"
 126 # if defined CONFIG_BFIN_WB
 127                 " (write-back)"
 128 # elif defined CONFIG_BFIN_WT
 129                 " (write-through)"
 130 # endif
 131                 "\n", cpu);
 132 #endif
 133 }
 134
 135 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
 136 {
 137         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 138
 139         cpudata->idle = current;
 140         cpudata->loops_per_jiffy = loops_per_jiffy;
 141         cpudata->imemctl = bfin_read_IMEM_CONTROL();
 142         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
 143 }
 144
 145 void __init bfin_cache_init(void)
 146 {
 147 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
 148         generate_cplb_tables();
 149 #endif
 150         bfin_setup_caches(0);
 151 }
 152
 153 void __init bfin_relocate_l1_mem(void)
 154 {
 155         unsigned long l1_code_length;
 156         unsigned long l1_data_a_length;
 157         unsigned long l1_data_b_length;
 158         unsigned long l2_length;
 159
 160         blackfin_dma_early_init();
 161
 162         l1_code_length = _etext_l1 - _stext_l1;
 163         if (l1_code_length > L1_CODE_LENGTH)
 164                 panic("L1 Instruction SRAM Overflow\n");
 165         /* cannot complain as printk is not available as yet.
 166          * But we can continue booting and complain later!
 167          */
 168
 169         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 170         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 171
 172         l1_data_a_length = _sbss_l1 - _sdata_l1;
 173         if (l1_data_a_length > L1_DATA_A_LENGTH)
 174                 panic("L1 Data SRAM Bank A Overflow\n");
 175
 176         /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
 177         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 178
 179         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
 180         if (l1_data_b_length > L1_DATA_B_LENGTH)
 181                 panic("L1 Data SRAM Bank B Overflow\n");
 182
 183         /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
 184         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 185                         l1_data_a_length, l1_data_b_length);
 186
 187         if (L2_LENGTH != 0) {
 188                 l2_length = _sbss_l2 - _stext_l2;
 189                 if (l2_length > L2_LENGTH)
 190                         panic("L2 SRAM Overflow\n");
 191
 192                 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
 193                 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
 194         }
 195 }
 196
 197 /* add_memory_region to memmap */
 198 static void __init add_memory_region(unsigned long long start,
 199                               unsigned long long size, int type)
 200 {
 201         int i;
 202
 203         i = bfin_memmap.nr_map;
 204
 205         if (i == BFIN_MEMMAP_MAX) {
 206                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
 207                 return;
 208         }
 209
 210         bfin_memmap.map[i].addr = start;
 211         bfin_memmap.map[i].size = size;
 212         bfin_memmap.map[i].type = type;
 213         bfin_memmap.nr_map++;
 214 }
 215
 216 /*
 217  * Sanitize the boot memmap, removing overlaps.
 218  */
 219 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
 220 {
 221         struct change_member *change_tmp;
 222         unsigned long current_type, last_type;
 223         unsigned long long last_addr;
 224         int chgidx, still_changing;
 225         int overlap_entries;
 226         int new_entry;
 227         int old_nr, new_nr, chg_nr;
 228         int i;
 229
 230         /*
 231                 Visually we're performing the following (1,2,3,4 = memory types)
 232
 233                 Sample memory map (w/overlaps):
 234                    ____22__________________
 235                    ______________________4_
 236                    ____1111________________
 237                    _44_____________________
 238                    11111111________________
 239                    ____________________33__
 240                    ___________44___________
 241                    __________33333_________
 242                    ______________22________
 243                    ___________________2222_
 244                    _________111111111______
 245                    _____________________11_
 246                    _________________4______
 247
 248                 Sanitized equivalent (no overlap):
 249                    1_______________________
 250                    _44_____________________
 251                    ___1____________________
 252                    ____22__________________
 253                    ______11________________
 254                    _________1______________
 255                    __________3_____________
 256                    ___________44___________
 257                    _____________33_________
 258                    _______________2________
 259                    ________________1_______
 260                    _________________4______
 261                    ___________________2____
 262                    ____________________33__
 263                    ______________________4_
 264         */
 265         /* if there's only one memory region, don't bother */
 266         if (*pnr_map < 2)
 267                 return -1;
 268
 269         old_nr = *pnr_map;
 270
 271         /* bail out if we find any unreasonable addresses in memmap */
 272         for (i = 0; i < old_nr; i++)
 273                 if (map[i].addr + map[i].size < map[i].addr)
 274                         return -1;
 275
 276         /* create pointers for initial change-point information (for sorting) */
 277         for (i = 0; i < 2*old_nr; i++)
 278                 change_point[i] = &change_point_list[i];
 279
 280         /* record all known change-points (starting and ending addresses),
 281            omitting those that are for empty memory regions */
 282         chgidx = 0;
 283         for (i = 0; i < old_nr; i++) {
 284                 if (map[i].size != 0) {
 285                         change_point[chgidx]->addr = map[i].addr;
 286                         change_point[chgidx++]->pentry = &map[i];
 287                         change_point[chgidx]->addr = map[i].addr + map[i].size;
 288                         change_point[chgidx++]->pentry = &map[i];
 289                 }
 290         }
 291         chg_nr = chgidx;        /* true number of change-points */
 292
 293         /* sort change-point list by memory addresses (low -> high) */
 294         still_changing = 1;
 295         while (still_changing) {
 296                 still_changing = 0;
 297                 for (i = 1; i < chg_nr; i++) {
 298                         /* if <current_addr> > <last_addr>, swap */
 299                         /* or, if current=<start_addr> & last=<end_addr>, swap */
 300                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
 301                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
 302                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
 303                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
 304                            ) {
 305                                 change_tmp = change_point[i];
 306                                 change_point[i] = change_point[i-1];
 307                                 change_point[i-1] = change_tmp;
 308                                 still_changing = 1;
 309                         }
 310                 }
 311         }
 312
 313         /* create a new memmap, removing overlaps */
 314         overlap_entries = 0;    /* number of entries in the overlap table */
 315         new_entry = 0;          /* index for creating new memmap entries */
 316         last_type = 0;          /* start with undefined memory type */
 317         last_addr = 0;          /* start with 0 as last starting address */
 318         /* loop through change-points, determining affect on the new memmap */
 319         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
 320                 /* keep track of all overlapping memmap entries */
 321                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
 322                         /* add map entry to overlap list (> 1 entry implies an overlap) */
 323                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
 324                 } else {
 325                         /* remove entry from list (order independent, so swap with last) */
 326                         for (i = 0; i < overlap_entries; i++) {
 327                                 if (overlap_list[i] == change_point[chgidx]->pentry)
 328                                         overlap_list[i] = overlap_list[overlap_entries-1];
 329                         }
 330                         overlap_entries--;
 331                 }
 332                 /* if there are overlapping entries, decide which "type" to use */
 333                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
 334                 current_type = 0;
 335                 for (i = 0; i < overlap_entries; i++)
 336                         if (overlap_list[i]->type > current_type)
 337                                 current_type = overlap_list[i]->type;
 338                 /* continue building up new memmap based on this information */
 339                 if (current_type != last_type) {
 340                         if (last_type != 0) {
 341                                 new_map[new_entry].size =
 342                                         change_point[chgidx]->addr - last_addr;
 343                                 /* move forward only if the new size was non-zero */
 344                                 if (new_map[new_entry].size != 0)
 345                                         if (++new_entry >= BFIN_MEMMAP_MAX)
 346                                                 break;  /* no more space left for new entries */
 347                         }
 348                         if (current_type != 0) {
 349                                 new_map[new_entry].addr = change_point[chgidx]->addr;
 350                                 new_map[new_entry].type = current_type;
 351                                 last_addr = change_point[chgidx]->addr;
 352                         }
 353                         last_type = current_type;
 354                 }
 355         }
 356         new_nr = new_entry;     /* retain count for new entries */
 357
 358         /* copy new mapping into original location */
 359         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
 360         *pnr_map = new_nr;
 361
 362         return 0;
 363 }
 364
 365 static void __init print_memory_map(char *who)
 366 {
 367         int i;
 368
 369         for (i = 0; i < bfin_memmap.nr_map; i++) {
 370                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
 371                         bfin_memmap.map[i].addr,
 372                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
 373                 switch (bfin_memmap.map[i].type) {
 374                 case BFIN_MEMMAP_RAM:
 375                                 printk("(usable)\n");
 376                                 break;
 377                 case BFIN_MEMMAP_RESERVED:
 378                                 printk("(reserved)\n");
 379                                 break;
 380                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
 381                                 break;
 382                 }
 383         }
 384 }
 385
 386 static __init int parse_memmap(char *arg)
 387 {
 388         unsigned long long start_at, mem_size;
 389
 390         if (!arg)
 391                 return -EINVAL;
 392
 393         mem_size = memparse(arg, &arg);
 394         if (*arg == '@') {
 395                 start_at = memparse(arg+1, &arg);
 396                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
 397         } else if (*arg == '$') {
 398                 start_at = memparse(arg+1, &arg);
 399                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
 400         }
 401
 402         return 0;
 403 }
 404
 405 /*
 406  * Initial parsing of the command line.  Currently, we support:
 407  *  - Controlling the linux memory size: mem=xxx[KMG]
 408  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 409  *       $ -> reserved memory is dcacheable
 410  *       # -> reserved memory is icacheable
 411  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
 412  *       @ from <start> to <start>+<mem>, type RAM
 413  *       $ from <start> to <start>+<mem>, type RESERVED
 414  */
 415 static __init void parse_cmdline_early(char *cmdline_p)
 416 {
 417         char c = ' ', *to = cmdline_p;
 418         unsigned int memsize;
 419         for (;;) {
 420                 if (c == ' ') {
 421                         if (!memcmp(to, "mem=", 4)) {
 422                                 to += 4;
 423                                 memsize = memparse(to, &to);
 424                                 if (memsize)
 425                                         _ramend = memsize;
 426
 427                         } else if (!memcmp(to, "max_mem=", 8)) {
 428                                 to += 8;
 429                                 memsize = memparse(to, &to);
 430                                 if (memsize) {
 431                                         physical_mem_end = memsize;
 432                                         if (*to != ' ') {
 433                                                 if (*to == '$'
 434                                                     || *(to + 1) == '$')
 435                                                         reserved_mem_dcache_on = 1;
 436                                                 if (*to == '#'
 437                                                     || *(to + 1) == '#')
 438                                                         reserved_mem_icache_on = 1;
 439                                         }
 440                                 }
 441                         } else if (!memcmp(to, "clkin_hz=", 9)) {
 442                                 to += 9;
 443                                 early_init_clkin_hz(to);
 444                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 445                                 to += 12;
 446                                 setup_early_printk(to);
 447                         } else if (!memcmp(to, "memmap=", 7)) {
 448                                 to += 7;
 449                                 parse_memmap(to);
 450                         }
 451                 }
 452                 c = *(to++);
 453                 if (!c)
 454                         break;
 455         }
 456 }
 457
 458 /*
 459  * Setup memory defaults from user config.
 460  * The physical memory layout looks like:
 461  *
 462  *  [_rambase, _ramstart]:              kernel image
 463  *  [memory_start, memory_end]:         dynamic memory managed by kernel
 464  *  [memory_end, _ramend]:              reserved memory
 465  *      [memory_mtd_start(memory_end),
 466  *              memory_mtd_start + mtd_size]:   rootfs (if any)
 467  *      [_ramend - DMA_UNCACHED_REGION,
 468  *              _ramend]:                       uncached DMA region
 469  *  [_ramend, physical_mem_end]:        memory not managed by kernel
 470  */
 471 static __init void memory_setup(void)
 472 {
 473 #ifdef CONFIG_MTD_UCLINUX
 474         unsigned long mtd_phys = 0;
 475 #endif
 476
 477         _rambase = (unsigned long)_stext;
 478         _ramstart = (unsigned long)_end;
 479
 480         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
 481                 console_init();
 482                 panic("DMA region exceeds memory limit: %lu.\n",
 483                         _ramend - _ramstart);
 484         }
 485         memory_end = _ramend - DMA_UNCACHED_REGION;
 486
 487 #ifdef CONFIG_MPU
 488         /* Round up to multiple of 4MB */
 489         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
 490 #else
 491         memory_start = PAGE_ALIGN(_ramstart);
 492 #endif
 493
 494 #if defined(CONFIG_MTD_UCLINUX)
 495         /* generic memory mapped MTD driver */
 496         memory_mtd_end = memory_end;
 497
 498         mtd_phys = _ramstart;
 499         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 500
 501 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 502         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 503                 mtd_size =
 504                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 505 # endif
 506
 507 # if defined(CONFIG_CRAMFS)
 508         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 509                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 510 # endif
 511
 512 # if defined(CONFIG_ROMFS_FS)
 513         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 514             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 515                 mtd_size =
 516                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 517 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 518         /* Due to a Hardware Anomaly we need to limit the size of usable
 519          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 520          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 521          */
 522 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 523         if (memory_end >= 56 * 1024 * 1024)
 524                 memory_end = 56 * 1024 * 1024;
 525 #   else
 526         if (memory_end >= 60 * 1024 * 1024)
 527                 memory_end = 60 * 1024 * 1024;
 528 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 529 #  endif                                /* ANOMALY_05000263 */
 530 # endif                         /* CONFIG_ROMFS_FS */
 531
 532         memory_end -= mtd_size;
 533
 534         if (mtd_size == 0) {
 535                 console_init();
 536                 panic("Don't boot kernel without rootfs attached.\n");
 537         }
 538
 539         /* Relocate MTD image to the top of memory after the uncached memory area */
 540         dma_memcpy((char *)memory_end, _end, mtd_size);
 541
 542         memory_mtd_start = memory_end;
 543         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 544 #endif                          /* CONFIG_MTD_UCLINUX */
 545
 546 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 547         /* Due to a Hardware Anomaly we need to limit the size of usable
 548          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 549          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 550          */
 551 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 552         if (memory_end >= 56 * 1024 * 1024)
 553                 memory_end = 56 * 1024 * 1024;
 554 #else
 555         if (memory_end >= 60 * 1024 * 1024)
 556                 memory_end = 60 * 1024 * 1024;
 557 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 558         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 559 #endif                          /* ANOMALY_05000263 */
 560
 561 #ifdef CONFIG_MPU
 562         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
 563         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 564 #endif
 565
 566 #if !defined(CONFIG_MTD_UCLINUX)
 567         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 568         memory_end -= SIZE_4K;
 569 #endif
 570
 571         init_mm.start_code = (unsigned long)_stext;
 572         init_mm.end_code = (unsigned long)_etext;
 573         init_mm.end_data = (unsigned long)_edata;
 574         init_mm.brk = (unsigned long)0;
 575
 576         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 577         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 578
 579         printk(KERN_INFO "Memory map:\n"
 580                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
 581                 KERN_INFO "  text      = 0x%p-0x%p\n"
 582                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
 583                 KERN_INFO "  bss       = 0x%p-0x%p\n"
 584                 KERN_INFO "  data      = 0x%p-0x%p\n"
 585                 KERN_INFO "    stack   = 0x%p-0x%p\n"
 586                 KERN_INFO "  init      = 0x%p-0x%p\n"
 587                 KERN_INFO "  available = 0x%p-0x%p\n"
 588 #ifdef CONFIG_MTD_UCLINUX
 589                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 590 #endif
 591 #if DMA_UNCACHED_REGION > 0
 592                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 593 #endif
 594                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
 595                 _stext, _etext,
 596                 __start_rodata, __end_rodata,
 597                 __bss_start, __bss_stop,
 598                 _sdata, _edata,
 599                 (void *)&init_thread_union,
 600                 (void *)((int)(&init_thread_union) + 0x2000),
 601                 __init_begin, __init_end,
 602                 (void *)_ramstart, (void *)memory_end
 603 #ifdef CONFIG_MTD_UCLINUX
 604                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 605 #endif
 606 #if DMA_UNCACHED_REGION > 0
 607                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 608 #endif
 609                 );
 610 }
 611
 612 /*
 613  * Find the lowest, highest page frame number we have available
 614  */
 615 void __init find_min_max_pfn(void)
 616 {
 617         int i;
 618
 619         max_pfn = 0;
 620         min_low_pfn = memory_end;
 621
 622         for (i = 0; i < bfin_memmap.nr_map; i++) {
 623                 unsigned long start, end;
 624                 /* RAM? */
 625                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 626                         continue;
 627                 start = PFN_UP(bfin_memmap.map[i].addr);
 628                 end = PFN_DOWN(bfin_memmap.map[i].addr +
 629                                 bfin_memmap.map[i].size);
 630                 if (start >= end)
 631                         continue;
 632                 if (end > max_pfn)
 633                         max_pfn = end;
 634                 if (start < min_low_pfn)
 635                         min_low_pfn = start;
 636         }
 637 }
 638
 639 static __init void setup_bootmem_allocator(void)
 640 {
 641         int bootmap_size;
 642         int i;
 643         unsigned long start_pfn, end_pfn;
 644         unsigned long curr_pfn, last_pfn, size;
 645
 646         /* mark memory between memory_start and memory_end usable */
 647         add_memory_region(memory_start,
 648                 memory_end - memory_start, BFIN_MEMMAP_RAM);
 649         /* sanity check for overlap */
 650         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
 651         print_memory_map("boot memmap");
 652
 653         /* intialize globals in linux/bootmem.h */
 654         find_min_max_pfn();
 655         /* pfn of the last usable page frame */
 656         if (max_pfn > memory_end >> PAGE_SHIFT)
 657                 max_pfn = memory_end >> PAGE_SHIFT;
 658         /* pfn of last page frame directly mapped by kernel */
 659         max_low_pfn = max_pfn;
 660         /* pfn of the first usable page frame after kernel image*/
 661         if (min_low_pfn < memory_start >> PAGE_SHIFT)
 662                 min_low_pfn = memory_start >> PAGE_SHIFT;
 663
 664         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
 665         end_pfn = memory_end >> PAGE_SHIFT;
 666
 667         /*
 668          * give all the memory to the bootmap allocator, tell it to put the
 669          * boot mem_map at the start of memory.
 670          */
 671         bootmap_size = init_bootmem_node(NODE_DATA(0),
 672                         memory_start >> PAGE_SHIFT,     /* map goes here */
 673                         start_pfn, end_pfn);
 674
 675         /* register the memmap regions with the bootmem allocator */
 676         for (i = 0; i < bfin_memmap.nr_map; i++) {
 677                 /*
 678                  * Reserve usable memory
 679                  */
 680                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 681                         continue;
 682                 /*
 683                  * We are rounding up the start address of usable memory:
 684                  */
 685                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
 686                 if (curr_pfn >= end_pfn)
 687                         continue;
 688                 /*
 689                  * ... and at the end of the usable range downwards:
 690                  */
 691                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
 692                                          bfin_memmap.map[i].size);
 693
 694                 if (last_pfn > end_pfn)
 695                         last_pfn = end_pfn;
 696
 697                 /*
 698                  * .. finally, did all the rounding and playing
 699                  * around just make the area go away?
 700                  */
 701                 if (last_pfn <= curr_pfn)
 702                         continue;
 703
 704                 size = last_pfn - curr_pfn;
 705                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
 706         }
 707
 708         /* reserve memory before memory_start, including bootmap */
 709         reserve_bootmem(PAGE_OFFSET,
 710                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
 711                 BOOTMEM_DEFAULT);
 712 }
 713
 714 #define EBSZ_TO_MEG(ebsz) \
 715 ({ \
 716         int meg = 0; \
 717         switch (ebsz & 0xf) { \
 718                 case 0x1: meg =  16; break; \
 719                 case 0x3: meg =  32; break; \
 720                 case 0x5: meg =  64; break; \
 721                 case 0x7: meg = 128; break; \
 722                 case 0x9: meg = 256; break; \
 723                 case 0xb: meg = 512; break; \
 724         } \
 725         meg; \
 726 })
 727 static inline int __init get_mem_size(void)
 728 {
 729 #if defined(EBIU_SDBCTL)
 730 # if defined(BF561_FAMILY)
 731         int ret = 0;
 732         u32 sdbctl = bfin_read_EBIU_SDBCTL();
 733         ret += EBSZ_TO_MEG(sdbctl >>  0);
 734         ret += EBSZ_TO_MEG(sdbctl >>  8);
 735         ret += EBSZ_TO_MEG(sdbctl >> 16);
 736         ret += EBSZ_TO_MEG(sdbctl >> 24);
 737         return ret;
 738 # else
 739         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
 740 # endif
 741 #elif defined(EBIU_DDRCTL1)
 742         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
 743         int ret = 0;
 744         switch (ddrctl & 0xc0000) {
 745                 case DEVSZ_64:  ret = 64 / 8;
 746                 case DEVSZ_128: ret = 128 / 8;
 747                 case DEVSZ_256: ret = 256 / 8;
 748                 case DEVSZ_512: ret = 512 / 8;
 749         }
 750         switch (ddrctl & 0x30000) {
 751                 case DEVWD_4:  ret *= 2;
 752                 case DEVWD_8:  ret *= 2;
 753                 case DEVWD_16: break;
 754         }
 755         if ((ddrctl & 0xc000) == 0x4000)
 756                 ret *= 2;
 757         return ret;
 758 #endif
 759         BUG();
 760 }
 761
 762 void __init setup_arch(char **cmdline_p)
 763 {
 764         unsigned long sclk, cclk;
 765
 766 #ifdef CONFIG_DUMMY_CONSOLE
 767         conswitchp = &dummy_con;
 768 #endif
 769
 770 #if defined(CONFIG_CMDLINE_BOOL)
 771         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 772         command_line[sizeof(command_line) - 1] = 0;
 773 #endif
 774
 775         /* Keep a copy of command line */
 776         *cmdline_p = &command_line[0];
 777         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 778         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 779
 780         /* setup memory defaults from the user config */
 781         physical_mem_end = 0;
 782         _ramend = get_mem_size() * 1024 * 1024;
 783
 784         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 785
 786         parse_cmdline_early(&command_line[0]);
 787
 788         if (physical_mem_end == 0)
 789                 physical_mem_end = _ramend;
 790
 791         memory_setup();
 792
 793         /* Initialize Async memory banks */
 794         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
 795         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
 796         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
 797 #ifdef CONFIG_EBIU_MBSCTLVAL
 798         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
 799         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
 800         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 801 #endif
 802
 803         cclk = get_cclk();
 804         sclk = get_sclk();
 805
 806 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 807         if (ANOMALY_05000273 && cclk == sclk)
 808                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 809 #endif
 810
 811 #ifdef BF561_FAMILY
 812         if (ANOMALY_05000266) {
 813                 bfin_read_IMDMA_D0_IRQ_STATUS();
 814                 bfin_read_IMDMA_D1_IRQ_STATUS();
 815         }
 816 #endif
 817         printk(KERN_INFO "Hardware Trace ");
 818         if (bfin_read_TBUFCTL() & 0x1)
 819                 printk("Active ");
 820         else
 821                 printk("Off ");
 822         if (bfin_read_TBUFCTL() & 0x2)
 823                 printk("and Enabled\n");
 824         else
 825         printk("and Disabled\n");
 826
 827 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 828         /* we need to initialize the Flashrom device here since we might
 829          * do things with flash early on in the boot
 830          */
 831         flash_probe();
 832 #endif
 833
 834         _bfin_swrst = bfin_read_SWRST();
 835
 836 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
 837         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
 838 #endif
 839 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
 840         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
 841 #endif
 842
 843 #ifdef CONFIG_SMP
 844         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
 845 #else
 846         if (_bfin_swrst & RESET_DOUBLE) {
 847 #endif
 848                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
 849 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 850                 /* We assume the crashing kernel, and the current symbol table match */
 851                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 852                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
 853                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
 854                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
 855 #endif
 856                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 857                         init_retx);
 858         } else if (_bfin_swrst & RESET_WDOG)
 859                 printk(KERN_INFO "Recovering from Watchdog event\n");
 860         else if (_bfin_swrst & RESET_SOFTWARE)
 861                 printk(KERN_NOTICE "Reset caused by Software reset\n");
 862
 863         printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
 864         if (bfin_compiled_revid() == 0xffff)
 865                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 866         else if (bfin_compiled_revid() == -1)
 867                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 868         else
 869                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 870
 871         if (unlikely(CPUID != bfin_cpuid()))
 872                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
 873                         CPU, bfin_cpuid(), bfin_revid());
 874         else {
 875                 if (bfin_revid() != bfin_compiled_revid()) {
 876                         if (bfin_compiled_revid() == -1)
 877                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 878                                        bfin_revid());
 879                         else if (bfin_compiled_revid() != 0xffff)
 880                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 881                                        bfin_compiled_revid(), bfin_revid());
 882                 }
 883                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
 884                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 885                                CPU, bfin_revid());
 886         }
 887
 888         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 889
 890         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 891                cclk / 1000000, sclk / 1000000);
 892
 893         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 894                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 895
 896         setup_bootmem_allocator();
 897
 898         paging_init();
 899
 900         /* Copy atomic sequences to their fixed location, and sanity check that
 901            these locations are the ones that we advertise to userspace.  */
 902         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 903                FIXED_CODE_END - FIXED_CODE_START);
 904         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 905                != SIGRETURN_STUB - FIXED_CODE_START);
 906         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 907                != ATOMIC_XCHG32 - FIXED_CODE_START);
 908         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 909                != ATOMIC_CAS32 - FIXED_CODE_START);
 910         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 911                != ATOMIC_ADD32 - FIXED_CODE_START);
 912         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 913                != ATOMIC_SUB32 - FIXED_CODE_START);
 914         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 915                != ATOMIC_IOR32 - FIXED_CODE_START);
 916         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 917                != ATOMIC_AND32 - FIXED_CODE_START);
 918         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 919                != ATOMIC_XOR32 - FIXED_CODE_START);
 920         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
 921                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
 922
 923 #ifdef CONFIG_SMP
 924         platform_init_cpus();
 925 #endif
 926         init_exception_vectors();
 927         bfin_cache_init();      /* Initialize caches for the boot CPU */
 928 }
 929
 930 static int __init topology_init(void)
 931 {
 932         unsigned int cpu;
 933         /* Record CPU-private information for the boot processor. */
 934         bfin_setup_cpudata(0);
 935
 936         for_each_possible_cpu(cpu) {
 937                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
 938         }
 939
 940         return 0;
 941 }
 942
 943 subsys_initcall(topology_init);
 944
 945 /* Get the input clock frequency */
 946 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
 947 static u_long get_clkin_hz(void)
 948 {
 949         return cached_clkin_hz;
 950 }
 951 static int __init early_init_clkin_hz(char *buf)
 952 {
 953         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
 954         return 1;
 955 }
 956 early_param("clkin_hz=", early_init_clkin_hz);
 957
 958 /* Get the voltage input multiplier */
 959 static u_long cached_vco_pll_ctl, cached_vco;
 960 static u_long get_vco(void)
 961 {
 962         u_long msel;
 963
 964         u_long pll_ctl = bfin_read_PLL_CTL();
 965         if (pll_ctl == cached_vco_pll_ctl)
 966                 return cached_vco;
 967         else
 968                 cached_vco_pll_ctl = pll_ctl;
 969
 970         msel = (pll_ctl >> 9) & 0x3F;
 971         if (0 == msel)
 972                 msel = 64;
 973
 974         cached_vco = get_clkin_hz();
 975         cached_vco >>= (1 & pll_ctl);   /* DF bit */
 976         cached_vco *= msel;
 977         return cached_vco;
 978 }
 979
 980 /* Get the Core clock */
 981 static u_long cached_cclk_pll_div, cached_cclk;
 982 u_long get_cclk(void)
 983 {
 984         u_long csel, ssel;
 985
 986         if (bfin_read_PLL_STAT() & 0x1)
 987                 return get_clkin_hz();
 988
 989         ssel = bfin_read_PLL_DIV();
 990         if (ssel == cached_cclk_pll_div)
 991                 return cached_cclk;
 992         else
 993                 cached_cclk_pll_div = ssel;
 994
 995         csel = ((ssel >> 4) & 0x03);
 996         ssel &= 0xf;
 997         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
 998                 cached_cclk = get_vco() / ssel;
 999         else
1000                 cached_cclk = get_vco() >> csel;
1001         return cached_cclk;
1002 }
1003 EXPORT_SYMBOL(get_cclk);
1004
1005 /* Get the System clock */
1006 static u_long cached_sclk_pll_div, cached_sclk;
1007 u_long get_sclk(void)
1008 {
1009         u_long ssel;
1010
1011         if (bfin_read_PLL_STAT() & 0x1)
1012                 return get_clkin_hz();
1013
1014         ssel = bfin_read_PLL_DIV();
1015         if (ssel == cached_sclk_pll_div)
1016                 return cached_sclk;
1017         else
1018                 cached_sclk_pll_div = ssel;
1019
1020         ssel &= 0xf;
1021         if (0 == ssel) {
1022                 printk(KERN_WARNING "Invalid System Clock\n");
1023                 ssel = 1;
1024         }
1025
1026         cached_sclk = get_vco() / ssel;
1027         return cached_sclk;
1028 }
1029 EXPORT_SYMBOL(get_sclk);
1030
1031 unsigned long sclk_to_usecs(unsigned long sclk)
1032 {
1033         u64 tmp = USEC_PER_SEC * (u64)sclk;
1034         do_div(tmp, get_sclk());
1035         return tmp;
1036 }
1037 EXPORT_SYMBOL(sclk_to_usecs);
1038
1039 unsigned long usecs_to_sclk(unsigned long usecs)
1040 {
1041         u64 tmp = get_sclk() * (u64)usecs;
1042         do_div(tmp, USEC_PER_SEC);
1043         return tmp;
1044 }
1045 EXPORT_SYMBOL(usecs_to_sclk);
1046
1047 /*
1048  *      Get CPU information for use by the procfs.
1049  */
1050 static int show_cpuinfo(struct seq_file *m, void *v)
1051 {
1052         char *cpu, *mmu, *fpu, *vendor, *cache;
1053         uint32_t revid;
1054         int cpu_num = *(unsigned int *)v;
1055         u_long sclk, cclk;
1056         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1057         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1058
1059         cpu = CPU;
1060         mmu = "none";
1061         fpu = "none";
1062         revid = bfin_revid();
1063
1064         sclk = get_sclk();
1065         cclk = get_cclk();
1066
1067         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1068         case 0xca:
1069                 vendor = "Analog Devices";
1070                 break;
1071         default:
1072                 vendor = "unknown";
1073                 break;
1074         }
1075
1076         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1077
1078         if (CPUID == bfin_cpuid())
1079                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1080         else
1081                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1082                         CPUID, bfin_cpuid());
1083
1084         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1085                 "stepping\t: %d\n",
1086                 cpu, cclk/1000000, sclk/1000000,
1087 #ifdef CONFIG_MPU
1088                 "mpu on",
1089 #else
1090                 "mpu off",
1091 #endif
1092                 revid);
1093
1094         seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1095                 cclk/1000000, cclk%1000000,
1096                 sclk/1000000, sclk%1000000);
1097         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1098                 "Calibration\t: %lu loops\n",
1099                 (cpudata->loops_per_jiffy * HZ) / 500000,
1100                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1101                 (cpudata->loops_per_jiffy * HZ));
1102
1103         /* Check Cache configutation */
1104         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1105         case ACACHE_BSRAM:
1106                 cache = "dbank-A/B\t: cache/sram";
1107                 dcache_size = 16;
1108                 dsup_banks = 1;
1109                 break;
1110         case ACACHE_BCACHE:
1111                 cache = "dbank-A/B\t: cache/cache";
1112                 dcache_size = 32;
1113                 dsup_banks = 2;
1114                 break;
1115         case ASRAM_BSRAM:
1116                 cache = "dbank-A/B\t: sram/sram";
1117                 dcache_size = 0;
1118                 dsup_banks = 0;
1119                 break;
1120         default:
1121                 cache = "unknown";
1122                 dcache_size = 0;
1123                 dsup_banks = 0;
1124                 break;
1125         }
1126
1127         /* Is it turned on? */
1128         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1129                 dcache_size = 0;
1130
1131         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1132                 icache_size = 0;
1133
1134         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1135                 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1136                 icache_size, dcache_size,
1137 #if defined CONFIG_BFIN_WB
1138                 "wb"
1139 #elif defined CONFIG_BFIN_WT
1140                 "wt"
1141 #endif
1142                 "", 0);
1143
1144         seq_printf(m, "%s\n", cache);
1145
1146         if (icache_size)
1147                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1148                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1149         else
1150                 seq_printf(m, "icache setup\t: off\n");
1151
1152         seq_printf(m,
1153                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1154                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1155                    BFIN_DLINES);
1156 #ifdef __ARCH_SYNC_CORE_DCACHE
1157         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1158 #endif
1159 #ifdef CONFIG_BFIN_ICACHE_LOCK
1160         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1161         case WAY0_L:
1162                 seq_printf(m, "Way0 Locked-Down\n");
1163                 break;
1164         case WAY1_L:
1165                 seq_printf(m, "Way1 Locked-Down\n");
1166                 break;
1167         case WAY01_L:
1168                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1169                 break;
1170         case WAY2_L:
1171                 seq_printf(m, "Way2 Locked-Down\n");
1172                 break;
1173         case WAY02_L:
1174                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1175                 break;
1176         case WAY12_L:
1177                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1178                 break;
1179         case WAY012_L:
1180                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1181                 break;
1182         case WAY3_L:
1183                 seq_printf(m, "Way3 Locked-Down\n");
1184                 break;
1185         case WAY03_L:
1186                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1187                 break;
1188         case WAY13_L:
1189                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1190                 break;
1191         case WAY013_L:
1192                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1193                 break;
1194         case WAY32_L:
1195                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1196                 break;
1197         case WAY320_L:
1198                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1199                 break;
1200         case WAY321_L:
1201                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1202                 break;
1203         case WAYALL_L:
1204                 seq_printf(m, "All Ways are locked\n");
1205                 break;
1206         default:
1207                 seq_printf(m, "No Ways are locked\n");
1208         }
1209 #endif
1210
1211         if (cpu_num != num_possible_cpus() - 1)
1212                 return 0;
1213
1214         if (L2_LENGTH)
1215                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1216         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1217         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1218                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1219         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1220                 ((int)memory_end - (int)_stext) >> 10,
1221                 _stext,
1222                 (void *)memory_end);
1223         seq_printf(m, "\n");
1224
1225         return 0;
1226 }
1227
1228 static void *c_start(struct seq_file *m, loff_t *pos)
1229 {
1230         if (*pos == 0)
1231                 *pos = first_cpu(cpu_online_map);
1232         if (*pos >= num_online_cpus())
1233                 return NULL;
1234
1235         return pos;
1236 }
1237
1238 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1239 {
1240         *pos = next_cpu(*pos, cpu_online_map);
1241
1242         return c_start(m, pos);
1243 }
1244
1245 static void c_stop(struct seq_file *m, void *v)
1246 {
1247 }
1248
1249 const struct seq_operations cpuinfo_op = {
1250         .start = c_start,
1251         .next = c_next,
1252         .stop = c_stop,
1253         .show = show_cpuinfo,
1254 };
1255
1256 void __init cmdline_init(const char *r0)
1257 {
1258         if (r0)
1259                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1260 }