arch/blackfin/kernel/setup.c

   1 /*
   2  * arch/blackfin/kernel/setup.c
   3  *
   4  * Copyright 2004-2006 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/console.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/cpu.h>
  16 #include <linux/module.h>
  17 #include <linux/tty.h>
  18 #include <linux/pfn.h>
  19
  20 #include <linux/ext2_fs.h>
  21 #include <linux/cramfs_fs.h>
  22 #include <linux/romfs_fs.h>
  23
  24 #include <asm/cplb.h>
  25 #include <asm/cacheflush.h>
  26 #include <asm/blackfin.h>
  27 #include <asm/cplbinit.h>
  28 #include <asm/div64.h>
  29 #include <asm/cpu.h>
  30 #include <asm/fixed_code.h>
  31 #include <asm/early_printk.h>
  32
  33 u16 _bfin_swrst;
  34 EXPORT_SYMBOL(_bfin_swrst);
  35
  36 unsigned long memory_start, memory_end, physical_mem_end;
  37 unsigned long _rambase, _ramstart, _ramend;
  38 unsigned long reserved_mem_dcache_on;
  39 unsigned long reserved_mem_icache_on;
  40 EXPORT_SYMBOL(memory_start);
  41 EXPORT_SYMBOL(memory_end);
  42 EXPORT_SYMBOL(physical_mem_end);
  43 EXPORT_SYMBOL(_ramend);
  44 EXPORT_SYMBOL(reserved_mem_dcache_on);
  45
  46 #ifdef CONFIG_MTD_UCLINUX
  47 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  48 unsigned long _ebss;
  49 EXPORT_SYMBOL(memory_mtd_end);
  50 EXPORT_SYMBOL(memory_mtd_start);
  51 EXPORT_SYMBOL(mtd_size);
  52 #endif
  53
  54 char __initdata command_line[COMMAND_LINE_SIZE];
  55 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  56         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  57
  58 /* boot memmap, for parsing "memmap=" */
  59 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
  60 #define BFIN_MEMMAP_RAM         1
  61 #define BFIN_MEMMAP_RESERVED    2
  62 struct bfin_memmap {
  63         int nr_map;
  64         struct bfin_memmap_entry {
  65                 unsigned long long addr; /* start of memory segment */
  66                 unsigned long long size;
  67                 unsigned long type;
  68         } map[BFIN_MEMMAP_MAX];
  69 } bfin_memmap __initdata;
  70
  71 /* for memmap sanitization */
  72 struct change_member {
  73         struct bfin_memmap_entry *pentry; /* pointer to original entry */
  74         unsigned long long addr; /* address for this change point */
  75 };
  76 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  77 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  78 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  79 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  80
  81 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  82
  83 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  84 void __init generate_cplb_tables(void)
  85 {
  86         unsigned int cpu;
  87
  88         /* Generate per-CPU I&D CPLB tables */
  89         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  90                 generate_cplb_tables_cpu(cpu);
  91 }
  92 #endif
  93
  94 void __cpuinit bfin_setup_caches(unsigned int cpu)
  95 {
  96 #ifdef CONFIG_BFIN_ICACHE
  97 #ifdef CONFIG_MPU
  98         bfin_icache_init(icplb_tbl[cpu]);
  99 #else
 100         bfin_icache_init(icplb_tables[cpu]);
 101 #endif
 102 #endif
 103
 104 #ifdef CONFIG_BFIN_DCACHE
 105 #ifdef CONFIG_MPU
 106         bfin_dcache_init(dcplb_tbl[cpu]);
 107 #else
 108         bfin_dcache_init(dcplb_tables[cpu]);
 109 #endif
 110 #endif
 111
 112         /*
 113          * In cache coherence emulation mode, we need to have the
 114          * D-cache enabled before running any atomic operation which
 115          * might invove cache invalidation (i.e. spinlock, rwlock).
 116          * So printk's are deferred until then.
 117          */
 118 #ifdef CONFIG_BFIN_ICACHE
 119         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
 120 #endif
 121 #ifdef CONFIG_BFIN_DCACHE
 122         printk(KERN_INFO "Data Cache Enabled for CPU%u"
 123 # if defined CONFIG_BFIN_WB
 124                 " (write-back)"
 125 # elif defined CONFIG_BFIN_WT
 126                 " (write-through)"
 127 # endif
 128                 "\n", cpu);
 129 #endif
 130 }
 131
 132 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
 133 {
 134         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 135
 136         cpudata->idle = current;
 137         cpudata->loops_per_jiffy = loops_per_jiffy;
 138         cpudata->imemctl = bfin_read_IMEM_CONTROL();
 139         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
 140 }
 141
 142 void __init bfin_cache_init(void)
 143 {
 144 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
 145         generate_cplb_tables();
 146 #endif
 147         bfin_setup_caches(0);
 148 }
 149
 150 void __init bfin_relocate_l1_mem(void)
 151 {
 152         unsigned long l1_code_length;
 153         unsigned long l1_data_a_length;
 154         unsigned long l1_data_b_length;
 155         unsigned long l2_length;
 156
 157         l1_code_length = _etext_l1 - _stext_l1;
 158         if (l1_code_length > L1_CODE_LENGTH)
 159                 panic("L1 Instruction SRAM Overflow\n");
 160         /* cannot complain as printk is not available as yet.
 161          * But we can continue booting and complain later!
 162          */
 163
 164         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 165         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 166
 167         l1_data_a_length = _sbss_l1 - _sdata_l1;
 168         if (l1_data_a_length > L1_DATA_A_LENGTH)
 169                 panic("L1 Data SRAM Bank A Overflow\n");
 170
 171         /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
 172         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 173
 174         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
 175         if (l1_data_b_length > L1_DATA_B_LENGTH)
 176                 panic("L1 Data SRAM Bank B Overflow\n");
 177
 178         /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
 179         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 180                         l1_data_a_length, l1_data_b_length);
 181
 182         if (L2_LENGTH != 0) {
 183                 l2_length = _sbss_l2 - _stext_l2;
 184                 if (l2_length > L2_LENGTH)
 185                         panic("L2 SRAM Overflow\n");
 186
 187                 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
 188                 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
 189         }
 190 }
 191
 192 /* add_memory_region to memmap */
 193 static void __init add_memory_region(unsigned long long start,
 194                               unsigned long long size, int type)
 195 {
 196         int i;
 197
 198         i = bfin_memmap.nr_map;
 199
 200         if (i == BFIN_MEMMAP_MAX) {
 201                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
 202                 return;
 203         }
 204
 205         bfin_memmap.map[i].addr = start;
 206         bfin_memmap.map[i].size = size;
 207         bfin_memmap.map[i].type = type;
 208         bfin_memmap.nr_map++;
 209 }
 210
 211 /*
 212  * Sanitize the boot memmap, removing overlaps.
 213  */
 214 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
 215 {
 216         struct change_member *change_tmp;
 217         unsigned long current_type, last_type;
 218         unsigned long long last_addr;
 219         int chgidx, still_changing;
 220         int overlap_entries;
 221         int new_entry;
 222         int old_nr, new_nr, chg_nr;
 223         int i;
 224
 225         /*
 226                 Visually we're performing the following (1,2,3,4 = memory types)
 227
 228                 Sample memory map (w/overlaps):
 229                    ____22__________________
 230                    ______________________4_
 231                    ____1111________________
 232                    _44_____________________
 233                    11111111________________
 234                    ____________________33__
 235                    ___________44___________
 236                    __________33333_________
 237                    ______________22________
 238                    ___________________2222_
 239                    _________111111111______
 240                    _____________________11_
 241                    _________________4______
 242
 243                 Sanitized equivalent (no overlap):
 244                    1_______________________
 245                    _44_____________________
 246                    ___1____________________
 247                    ____22__________________
 248                    ______11________________
 249                    _________1______________
 250                    __________3_____________
 251                    ___________44___________
 252                    _____________33_________
 253                    _______________2________
 254                    ________________1_______
 255                    _________________4______
 256                    ___________________2____
 257                    ____________________33__
 258                    ______________________4_
 259         */
 260         /* if there's only one memory region, don't bother */
 261         if (*pnr_map < 2)
 262                 return -1;
 263
 264         old_nr = *pnr_map;
 265
 266         /* bail out if we find any unreasonable addresses in memmap */
 267         for (i = 0; i < old_nr; i++)
 268                 if (map[i].addr + map[i].size < map[i].addr)
 269                         return -1;
 270
 271         /* create pointers for initial change-point information (for sorting) */
 272         for (i = 0; i < 2*old_nr; i++)
 273                 change_point[i] = &change_point_list[i];
 274
 275         /* record all known change-points (starting and ending addresses),
 276            omitting those that are for empty memory regions */
 277         chgidx = 0;
 278         for (i = 0; i < old_nr; i++) {
 279                 if (map[i].size != 0) {
 280                         change_point[chgidx]->addr = map[i].addr;
 281                         change_point[chgidx++]->pentry = &map[i];
 282                         change_point[chgidx]->addr = map[i].addr + map[i].size;
 283                         change_point[chgidx++]->pentry = &map[i];
 284                 }
 285         }
 286         chg_nr = chgidx;        /* true number of change-points */
 287
 288         /* sort change-point list by memory addresses (low -> high) */
 289         still_changing = 1;
 290         while (still_changing) {
 291                 still_changing = 0;
 292                 for (i = 1; i < chg_nr; i++) {
 293                         /* if <current_addr> > <last_addr>, swap */
 294                         /* or, if current=<start_addr> & last=<end_addr>, swap */
 295                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
 296                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
 297                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
 298                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
 299                            ) {
 300                                 change_tmp = change_point[i];
 301                                 change_point[i] = change_point[i-1];
 302                                 change_point[i-1] = change_tmp;
 303                                 still_changing = 1;
 304                         }
 305                 }
 306         }
 307
 308         /* create a new memmap, removing overlaps */
 309         overlap_entries = 0;    /* number of entries in the overlap table */
 310         new_entry = 0;          /* index for creating new memmap entries */
 311         last_type = 0;          /* start with undefined memory type */
 312         last_addr = 0;          /* start with 0 as last starting address */
 313         /* loop through change-points, determining affect on the new memmap */
 314         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
 315                 /* keep track of all overlapping memmap entries */
 316                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
 317                         /* add map entry to overlap list (> 1 entry implies an overlap) */
 318                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
 319                 } else {
 320                         /* remove entry from list (order independent, so swap with last) */
 321                         for (i = 0; i < overlap_entries; i++) {
 322                                 if (overlap_list[i] == change_point[chgidx]->pentry)
 323                                         overlap_list[i] = overlap_list[overlap_entries-1];
 324                         }
 325                         overlap_entries--;
 326                 }
 327                 /* if there are overlapping entries, decide which "type" to use */
 328                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
 329                 current_type = 0;
 330                 for (i = 0; i < overlap_entries; i++)
 331                         if (overlap_list[i]->type > current_type)
 332                                 current_type = overlap_list[i]->type;
 333                 /* continue building up new memmap based on this information */
 334                 if (current_type != last_type) {
 335                         if (last_type != 0) {
 336                                 new_map[new_entry].size =
 337                                         change_point[chgidx]->addr - last_addr;
 338                                 /* move forward only if the new size was non-zero */
 339                                 if (new_map[new_entry].size != 0)
 340                                         if (++new_entry >= BFIN_MEMMAP_MAX)
 341                                                 break;  /* no more space left for new entries */
 342                         }
 343                         if (current_type != 0) {
 344                                 new_map[new_entry].addr = change_point[chgidx]->addr;
 345                                 new_map[new_entry].type = current_type;
 346                                 last_addr = change_point[chgidx]->addr;
 347                         }
 348                         last_type = current_type;
 349                 }
 350         }
 351         new_nr = new_entry;     /* retain count for new entries */
 352
 353         /* copy new mapping into original location */
 354         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
 355         *pnr_map = new_nr;
 356
 357         return 0;
 358 }
 359
 360 static void __init print_memory_map(char *who)
 361 {
 362         int i;
 363
 364         for (i = 0; i < bfin_memmap.nr_map; i++) {
 365                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
 366                         bfin_memmap.map[i].addr,
 367                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
 368                 switch (bfin_memmap.map[i].type) {
 369                 case BFIN_MEMMAP_RAM:
 370                                 printk("(usable)\n");
 371                                 break;
 372                 case BFIN_MEMMAP_RESERVED:
 373                                 printk("(reserved)\n");
 374                                 break;
 375                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
 376                                 break;
 377                 }
 378         }
 379 }
 380
 381 static __init int parse_memmap(char *arg)
 382 {
 383         unsigned long long start_at, mem_size;
 384
 385         if (!arg)
 386                 return -EINVAL;
 387
 388         mem_size = memparse(arg, &arg);
 389         if (*arg == '@') {
 390                 start_at = memparse(arg+1, &arg);
 391                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
 392         } else if (*arg == '$') {
 393                 start_at = memparse(arg+1, &arg);
 394                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
 395         }
 396
 397         return 0;
 398 }
 399
 400 /*
 401  * Initial parsing of the command line.  Currently, we support:
 402  *  - Controlling the linux memory size: mem=xxx[KMG]
 403  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 404  *       $ -> reserved memory is dcacheable
 405  *       # -> reserved memory is icacheable
 406  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
 407  *       @ from <start> to <start>+<mem>, type RAM
 408  *       $ from <start> to <start>+<mem>, type RESERVED
 409  */
 410 static __init void parse_cmdline_early(char *cmdline_p)
 411 {
 412         char c = ' ', *to = cmdline_p;
 413         unsigned int memsize;
 414         for (;;) {
 415                 if (c == ' ') {
 416                         if (!memcmp(to, "mem=", 4)) {
 417                                 to += 4;
 418                                 memsize = memparse(to, &to);
 419                                 if (memsize)
 420                                         _ramend = memsize;
 421
 422                         } else if (!memcmp(to, "max_mem=", 8)) {
 423                                 to += 8;
 424                                 memsize = memparse(to, &to);
 425                                 if (memsize) {
 426                                         physical_mem_end = memsize;
 427                                         if (*to != ' ') {
 428                                                 if (*to == '$'
 429                                                     || *(to + 1) == '$')
 430                                                         reserved_mem_dcache_on = 1;
 431                                                 if (*to == '#'
 432                                                     || *(to + 1) == '#')
 433                                                         reserved_mem_icache_on = 1;
 434                                         }
 435                                 }
 436                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 437                                 to += 12;
 438                                 setup_early_printk(to);
 439                         } else if (!memcmp(to, "memmap=", 7)) {
 440                                 to += 7;
 441                                 parse_memmap(to);
 442                         }
 443                 }
 444                 c = *(to++);
 445                 if (!c)
 446                         break;
 447         }
 448 }
 449
 450 /*
 451  * Setup memory defaults from user config.
 452  * The physical memory layout looks like:
 453  *
 454  *  [_rambase, _ramstart]:              kernel image
 455  *  [memory_start, memory_end]:         dynamic memory managed by kernel
 456  *  [memory_end, _ramend]:              reserved memory
 457  *      [memory_mtd_start(memory_end),
 458  *              memory_mtd_start + mtd_size]:   rootfs (if any)
 459  *      [_ramend - DMA_UNCACHED_REGION,
 460  *              _ramend]:                       uncached DMA region
 461  *  [_ramend, physical_mem_end]:        memory not managed by kernel
 462  */
 463 static __init void memory_setup(void)
 464 {
 465 #ifdef CONFIG_MTD_UCLINUX
 466         unsigned long mtd_phys = 0;
 467 #endif
 468
 469         _rambase = (unsigned long)_stext;
 470         _ramstart = (unsigned long)_end;
 471
 472         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
 473                 console_init();
 474                 panic("DMA region exceeds memory limit: %lu.\n",
 475                         _ramend - _ramstart);
 476         }
 477         memory_end = _ramend - DMA_UNCACHED_REGION;
 478
 479 #ifdef CONFIG_MPU
 480         /* Round up to multiple of 4MB */
 481         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
 482 #else
 483         memory_start = PAGE_ALIGN(_ramstart);
 484 #endif
 485
 486 #if defined(CONFIG_MTD_UCLINUX)
 487         /* generic memory mapped MTD driver */
 488         memory_mtd_end = memory_end;
 489
 490         mtd_phys = _ramstart;
 491         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 492
 493 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 494         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 495                 mtd_size =
 496                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 497 # endif
 498
 499 # if defined(CONFIG_CRAMFS)
 500         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 501                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 502 # endif
 503
 504 # if defined(CONFIG_ROMFS_FS)
 505         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 506             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 507                 mtd_size =
 508                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 509 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 510         /* Due to a Hardware Anomaly we need to limit the size of usable
 511          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 512          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 513          */
 514 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 515         if (memory_end >= 56 * 1024 * 1024)
 516                 memory_end = 56 * 1024 * 1024;
 517 #   else
 518         if (memory_end >= 60 * 1024 * 1024)
 519                 memory_end = 60 * 1024 * 1024;
 520 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 521 #  endif                                /* ANOMALY_05000263 */
 522 # endif                         /* CONFIG_ROMFS_FS */
 523
 524         memory_end -= mtd_size;
 525
 526         if (mtd_size == 0) {
 527                 console_init();
 528                 panic("Don't boot kernel without rootfs attached.\n");
 529         }
 530
 531         /* Relocate MTD image to the top of memory after the uncached memory area */
 532         dma_memcpy((char *)memory_end, _end, mtd_size);
 533
 534         memory_mtd_start = memory_end;
 535         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 536 #endif                          /* CONFIG_MTD_UCLINUX */
 537
 538 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 539         /* Due to a Hardware Anomaly we need to limit the size of usable
 540          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 541          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 542          */
 543 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 544         if (memory_end >= 56 * 1024 * 1024)
 545                 memory_end = 56 * 1024 * 1024;
 546 #else
 547         if (memory_end >= 60 * 1024 * 1024)
 548                 memory_end = 60 * 1024 * 1024;
 549 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 550         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 551 #endif                          /* ANOMALY_05000263 */
 552
 553 #ifdef CONFIG_MPU
 554         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
 555         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 556 #endif
 557
 558 #if !defined(CONFIG_MTD_UCLINUX)
 559         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 560         memory_end -= SIZE_4K;
 561 #endif
 562
 563         init_mm.start_code = (unsigned long)_stext;
 564         init_mm.end_code = (unsigned long)_etext;
 565         init_mm.end_data = (unsigned long)_edata;
 566         init_mm.brk = (unsigned long)0;
 567
 568         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 569         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 570
 571         printk(KERN_INFO "Memory map:\n"
 572                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
 573                 KERN_INFO "  text      = 0x%p-0x%p\n"
 574                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
 575                 KERN_INFO "  bss       = 0x%p-0x%p\n"
 576                 KERN_INFO "  data      = 0x%p-0x%p\n"
 577                 KERN_INFO "    stack   = 0x%p-0x%p\n"
 578                 KERN_INFO "  init      = 0x%p-0x%p\n"
 579                 KERN_INFO "  available = 0x%p-0x%p\n"
 580 #ifdef CONFIG_MTD_UCLINUX
 581                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 582 #endif
 583 #if DMA_UNCACHED_REGION > 0
 584                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 585 #endif
 586                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
 587                 _stext, _etext,
 588                 __start_rodata, __end_rodata,
 589                 __bss_start, __bss_stop,
 590                 _sdata, _edata,
 591                 (void *)&init_thread_union,
 592                 (void *)((int)(&init_thread_union) + 0x2000),
 593                 __init_begin, __init_end,
 594                 (void *)_ramstart, (void *)memory_end
 595 #ifdef CONFIG_MTD_UCLINUX
 596                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 597 #endif
 598 #if DMA_UNCACHED_REGION > 0
 599                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 600 #endif
 601                 );
 602 }
 603
 604 /*
 605  * Find the lowest, highest page frame number we have available
 606  */
 607 void __init find_min_max_pfn(void)
 608 {
 609         int i;
 610
 611         max_pfn = 0;
 612         min_low_pfn = memory_end;
 613
 614         for (i = 0; i < bfin_memmap.nr_map; i++) {
 615                 unsigned long start, end;
 616                 /* RAM? */
 617                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 618                         continue;
 619                 start = PFN_UP(bfin_memmap.map[i].addr);
 620                 end = PFN_DOWN(bfin_memmap.map[i].addr +
 621                                 bfin_memmap.map[i].size);
 622                 if (start >= end)
 623                         continue;
 624                 if (end > max_pfn)
 625                         max_pfn = end;
 626                 if (start < min_low_pfn)
 627                         min_low_pfn = start;
 628         }
 629 }
 630
 631 static __init void setup_bootmem_allocator(void)
 632 {
 633         int bootmap_size;
 634         int i;
 635         unsigned long start_pfn, end_pfn;
 636         unsigned long curr_pfn, last_pfn, size;
 637
 638         /* mark memory between memory_start and memory_end usable */
 639         add_memory_region(memory_start,
 640                 memory_end - memory_start, BFIN_MEMMAP_RAM);
 641         /* sanity check for overlap */
 642         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
 643         print_memory_map("boot memmap");
 644
 645         /* intialize globals in linux/bootmem.h */
 646         find_min_max_pfn();
 647         /* pfn of the last usable page frame */
 648         if (max_pfn > memory_end >> PAGE_SHIFT)
 649                 max_pfn = memory_end >> PAGE_SHIFT;
 650         /* pfn of last page frame directly mapped by kernel */
 651         max_low_pfn = max_pfn;
 652         /* pfn of the first usable page frame after kernel image*/
 653         if (min_low_pfn < memory_start >> PAGE_SHIFT)
 654                 min_low_pfn = memory_start >> PAGE_SHIFT;
 655
 656         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
 657         end_pfn = memory_end >> PAGE_SHIFT;
 658
 659         /*
 660          * give all the memory to the bootmap allocator, tell it to put the
 661          * boot mem_map at the start of memory.
 662          */
 663         bootmap_size = init_bootmem_node(NODE_DATA(0),
 664                         memory_start >> PAGE_SHIFT,     /* map goes here */
 665                         start_pfn, end_pfn);
 666
 667         /* register the memmap regions with the bootmem allocator */
 668         for (i = 0; i < bfin_memmap.nr_map; i++) {
 669                 /*
 670                  * Reserve usable memory
 671                  */
 672                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 673                         continue;
 674                 /*
 675                  * We are rounding up the start address of usable memory:
 676                  */
 677                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
 678                 if (curr_pfn >= end_pfn)
 679                         continue;
 680                 /*
 681                  * ... and at the end of the usable range downwards:
 682                  */
 683                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
 684                                          bfin_memmap.map[i].size);
 685
 686                 if (last_pfn > end_pfn)
 687                         last_pfn = end_pfn;
 688
 689                 /*
 690                  * .. finally, did all the rounding and playing
 691                  * around just make the area go away?
 692                  */
 693                 if (last_pfn <= curr_pfn)
 694                         continue;
 695
 696                 size = last_pfn - curr_pfn;
 697                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
 698         }
 699
 700         /* reserve memory before memory_start, including bootmap */
 701         reserve_bootmem(PAGE_OFFSET,
 702                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
 703                 BOOTMEM_DEFAULT);
 704 }
 705
 706 #define EBSZ_TO_MEG(ebsz) \
 707 ({ \
 708         int meg = 0; \
 709         switch (ebsz & 0xf) { \
 710                 case 0x1: meg =  16; break; \
 711                 case 0x3: meg =  32; break; \
 712                 case 0x5: meg =  64; break; \
 713                 case 0x7: meg = 128; break; \
 714                 case 0x9: meg = 256; break; \
 715                 case 0xb: meg = 512; break; \
 716         } \
 717         meg; \
 718 })
 719 static inline int __init get_mem_size(void)
 720 {
 721 #if defined(EBIU_SDBCTL)
 722 # if defined(BF561_FAMILY)
 723         int ret = 0;
 724         u32 sdbctl = bfin_read_EBIU_SDBCTL();
 725         ret += EBSZ_TO_MEG(sdbctl >>  0);
 726         ret += EBSZ_TO_MEG(sdbctl >>  8);
 727         ret += EBSZ_TO_MEG(sdbctl >> 16);
 728         ret += EBSZ_TO_MEG(sdbctl >> 24);
 729         return ret;
 730 # else
 731         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
 732 # endif
 733 #elif defined(EBIU_DDRCTL1)
 734         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
 735         int ret = 0;
 736         switch (ddrctl & 0xc0000) {
 737                 case DEVSZ_64:  ret = 64 / 8;
 738                 case DEVSZ_128: ret = 128 / 8;
 739                 case DEVSZ_256: ret = 256 / 8;
 740                 case DEVSZ_512: ret = 512 / 8;
 741         }
 742         switch (ddrctl & 0x30000) {
 743                 case DEVWD_4:  ret *= 2;
 744                 case DEVWD_8:  ret *= 2;
 745                 case DEVWD_16: break;
 746         }
 747         if ((ddrctl & 0xc000) == 0x4000)
 748                 ret *= 2;
 749         return ret;
 750 #endif
 751         BUG();
 752 }
 753
 754 void __init setup_arch(char **cmdline_p)
 755 {
 756         unsigned long sclk, cclk;
 757
 758 #ifdef CONFIG_DUMMY_CONSOLE
 759         conswitchp = &dummy_con;
 760 #endif
 761
 762 #if defined(CONFIG_CMDLINE_BOOL)
 763         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 764         command_line[sizeof(command_line) - 1] = 0;
 765 #endif
 766
 767         /* Keep a copy of command line */
 768         *cmdline_p = &command_line[0];
 769         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 770         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 771
 772         /* setup memory defaults from the user config */
 773         physical_mem_end = 0;
 774         _ramend = get_mem_size() * 1024 * 1024;
 775
 776         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 777
 778         parse_cmdline_early(&command_line[0]);
 779
 780         if (physical_mem_end == 0)
 781                 physical_mem_end = _ramend;
 782
 783         memory_setup();
 784
 785         /* Initialize Async memory banks */
 786         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
 787         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
 788         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
 789 #ifdef CONFIG_EBIU_MBSCTLVAL
 790         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
 791         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
 792         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 793 #endif
 794
 795         cclk = get_cclk();
 796         sclk = get_sclk();
 797
 798 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 799         if (ANOMALY_05000273 && cclk == sclk)
 800                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 801 #endif
 802
 803 #ifdef BF561_FAMILY
 804         if (ANOMALY_05000266) {
 805                 bfin_read_IMDMA_D0_IRQ_STATUS();
 806                 bfin_read_IMDMA_D1_IRQ_STATUS();
 807         }
 808 #endif
 809         printk(KERN_INFO "Hardware Trace ");
 810         if (bfin_read_TBUFCTL() & 0x1)
 811                 printk("Active ");
 812         else
 813                 printk("Off ");
 814         if (bfin_read_TBUFCTL() & 0x2)
 815                 printk("and Enabled\n");
 816         else
 817         printk("and Disabled\n");
 818
 819 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 820         /* we need to initialize the Flashrom device here since we might
 821          * do things with flash early on in the boot
 822          */
 823         flash_probe();
 824 #endif
 825
 826         _bfin_swrst = bfin_read_SWRST();
 827
 828 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
 829         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
 830 #endif
 831 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
 832         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
 833 #endif
 834
 835 #ifdef CONFIG_SMP
 836         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
 837 #else
 838         if (_bfin_swrst & RESET_DOUBLE) {
 839 #endif
 840                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
 841 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 842                 /* We assume the crashing kernel, and the current symbol table match */
 843                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 844                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
 845                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
 846                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
 847 #endif
 848                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 849                         init_retx);
 850         } else if (_bfin_swrst & RESET_WDOG)
 851                 printk(KERN_INFO "Recovering from Watchdog event\n");
 852         else if (_bfin_swrst & RESET_SOFTWARE)
 853                 printk(KERN_NOTICE "Reset caused by Software reset\n");
 854
 855         printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
 856         if (bfin_compiled_revid() == 0xffff)
 857                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 858         else if (bfin_compiled_revid() == -1)
 859                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 860         else
 861                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 862
 863         if (unlikely(CPUID != bfin_cpuid()))
 864                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
 865                         CPU, bfin_cpuid(), bfin_revid());
 866         else {
 867                 if (bfin_revid() != bfin_compiled_revid()) {
 868                         if (bfin_compiled_revid() == -1)
 869                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 870                                        bfin_revid());
 871                         else if (bfin_compiled_revid() != 0xffff)
 872                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 873                                        bfin_compiled_revid(), bfin_revid());
 874                 }
 875                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
 876                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 877                                CPU, bfin_revid());
 878         }
 879
 880         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 881
 882         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 883                cclk / 1000000, sclk / 1000000);
 884
 885         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 886                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 887
 888         setup_bootmem_allocator();
 889
 890         paging_init();
 891
 892         /* Copy atomic sequences to their fixed location, and sanity check that
 893            these locations are the ones that we advertise to userspace.  */
 894         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 895                FIXED_CODE_END - FIXED_CODE_START);
 896         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 897                != SIGRETURN_STUB - FIXED_CODE_START);
 898         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 899                != ATOMIC_XCHG32 - FIXED_CODE_START);
 900         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 901                != ATOMIC_CAS32 - FIXED_CODE_START);
 902         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 903                != ATOMIC_ADD32 - FIXED_CODE_START);
 904         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 905                != ATOMIC_SUB32 - FIXED_CODE_START);
 906         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 907                != ATOMIC_IOR32 - FIXED_CODE_START);
 908         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 909                != ATOMIC_AND32 - FIXED_CODE_START);
 910         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 911                != ATOMIC_XOR32 - FIXED_CODE_START);
 912         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
 913                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
 914
 915 #ifdef CONFIG_SMP
 916         platform_init_cpus();
 917 #endif
 918         init_exception_vectors();
 919         bfin_cache_init();      /* Initialize caches for the boot CPU */
 920 }
 921
 922 static int __init topology_init(void)
 923 {
 924         unsigned int cpu;
 925         /* Record CPU-private information for the boot processor. */
 926         bfin_setup_cpudata(0);
 927
 928         for_each_possible_cpu(cpu) {
 929                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
 930         }
 931
 932         return 0;
 933 }
 934
 935 subsys_initcall(topology_init);
 936
 937 /* Get the voltage input multiplier */
 938 static u_long cached_vco_pll_ctl, cached_vco;
 939 static u_long get_vco(void)
 940 {
 941         u_long msel;
 942
 943         u_long pll_ctl = bfin_read_PLL_CTL();
 944         if (pll_ctl == cached_vco_pll_ctl)
 945                 return cached_vco;
 946         else
 947                 cached_vco_pll_ctl = pll_ctl;
 948
 949         msel = (pll_ctl >> 9) & 0x3F;
 950         if (0 == msel)
 951                 msel = 64;
 952
 953         cached_vco = CONFIG_CLKIN_HZ;
 954         cached_vco >>= (1 & pll_ctl);   /* DF bit */
 955         cached_vco *= msel;
 956         return cached_vco;
 957 }
 958
 959 /* Get the Core clock */
 960 static u_long cached_cclk_pll_div, cached_cclk;
 961 u_long get_cclk(void)
 962 {
 963         u_long csel, ssel;
 964
 965         if (bfin_read_PLL_STAT() & 0x1)
 966                 return CONFIG_CLKIN_HZ;
 967
 968         ssel = bfin_read_PLL_DIV();
 969         if (ssel == cached_cclk_pll_div)
 970                 return cached_cclk;
 971         else
 972                 cached_cclk_pll_div = ssel;
 973
 974         csel = ((ssel >> 4) & 0x03);
 975         ssel &= 0xf;
 976         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
 977                 cached_cclk = get_vco() / ssel;
 978         else
 979                 cached_cclk = get_vco() >> csel;
 980         return cached_cclk;
 981 }
 982 EXPORT_SYMBOL(get_cclk);
 983
 984 /* Get the System clock */
 985 static u_long cached_sclk_pll_div, cached_sclk;
 986 u_long get_sclk(void)
 987 {
 988         u_long ssel;
 989
 990         if (bfin_read_PLL_STAT() & 0x1)
 991                 return CONFIG_CLKIN_HZ;
 992
 993         ssel = bfin_read_PLL_DIV();
 994         if (ssel == cached_sclk_pll_div)
 995                 return cached_sclk;
 996         else
 997                 cached_sclk_pll_div = ssel;
 998
 999         ssel &= 0xf;
1000         if (0 == ssel) {
1001                 printk(KERN_WARNING "Invalid System Clock\n");
1002                 ssel = 1;
1003         }
1004
1005         cached_sclk = get_vco() / ssel;
1006         return cached_sclk;
1007 }
1008 EXPORT_SYMBOL(get_sclk);
1009
1010 unsigned long sclk_to_usecs(unsigned long sclk)
1011 {
1012         u64 tmp = USEC_PER_SEC * (u64)sclk;
1013         do_div(tmp, get_sclk());
1014         return tmp;
1015 }
1016 EXPORT_SYMBOL(sclk_to_usecs);
1017
1018 unsigned long usecs_to_sclk(unsigned long usecs)
1019 {
1020         u64 tmp = get_sclk() * (u64)usecs;
1021         do_div(tmp, USEC_PER_SEC);
1022         return tmp;
1023 }
1024 EXPORT_SYMBOL(usecs_to_sclk);
1025
1026 /*
1027  *      Get CPU information for use by the procfs.
1028  */
1029 static int show_cpuinfo(struct seq_file *m, void *v)
1030 {
1031         char *cpu, *mmu, *fpu, *vendor, *cache;
1032         uint32_t revid;
1033
1034         u_long sclk, cclk;
1035         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1036         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, *(unsigned int *)v);
1037
1038         cpu = CPU;
1039         mmu = "none";
1040         fpu = "none";
1041         revid = bfin_revid();
1042
1043         sclk = get_sclk();
1044         cclk = get_cclk();
1045
1046         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1047         case 0xca:
1048                 vendor = "Analog Devices";
1049                 break;
1050         default:
1051                 vendor = "unknown";
1052                 break;
1053         }
1054
1055         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n",
1056                 *(unsigned int *)v, vendor);
1057
1058         if (CPUID == bfin_cpuid())
1059                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1060         else
1061                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1062                         CPUID, bfin_cpuid());
1063
1064         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1065                 "stepping\t: %d\n",
1066                 cpu, cclk/1000000, sclk/1000000,
1067 #ifdef CONFIG_MPU
1068                 "mpu on",
1069 #else
1070                 "mpu off",
1071 #endif
1072                 revid);
1073
1074         seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1075                 cclk/1000000, cclk%1000000,
1076                 sclk/1000000, sclk%1000000);
1077         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1078                 "Calibration\t: %lu loops\n",
1079                 (cpudata->loops_per_jiffy * HZ) / 500000,
1080                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1081                 (cpudata->loops_per_jiffy * HZ));
1082
1083         /* Check Cache configutation */
1084         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1085         case ACACHE_BSRAM:
1086                 cache = "dbank-A/B\t: cache/sram";
1087                 dcache_size = 16;
1088                 dsup_banks = 1;
1089                 break;
1090         case ACACHE_BCACHE:
1091                 cache = "dbank-A/B\t: cache/cache";
1092                 dcache_size = 32;
1093                 dsup_banks = 2;
1094                 break;
1095         case ASRAM_BSRAM:
1096                 cache = "dbank-A/B\t: sram/sram";
1097                 dcache_size = 0;
1098                 dsup_banks = 0;
1099                 break;
1100         default:
1101                 cache = "unknown";
1102                 dcache_size = 0;
1103                 dsup_banks = 0;
1104                 break;
1105         }
1106
1107         /* Is it turned on? */
1108         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1109                 dcache_size = 0;
1110
1111         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1112                 icache_size = 0;
1113
1114         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1115                 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1116                 icache_size, dcache_size,
1117 #if defined CONFIG_BFIN_WB
1118                 "wb"
1119 #elif defined CONFIG_BFIN_WT
1120                 "wt"
1121 #endif
1122                 "", 0);
1123
1124         seq_printf(m, "%s\n", cache);
1125
1126         if (icache_size)
1127                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1128                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1129         else
1130                 seq_printf(m, "icache setup\t: off\n");
1131
1132         seq_printf(m,
1133                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1134                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1135                    BFIN_DLINES);
1136 #ifdef __ARCH_SYNC_CORE_DCACHE
1137         seq_printf(m,
1138                 "SMP Dcache Flushes\t: %lu\n\n",
1139                 per_cpu(cpu_data, *(unsigned int *)v).dcache_invld_count);
1140 #endif
1141 #ifdef CONFIG_BFIN_ICACHE_LOCK
1142         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1143         case WAY0_L:
1144                 seq_printf(m, "Way0 Locked-Down\n");
1145                 break;
1146         case WAY1_L:
1147                 seq_printf(m, "Way1 Locked-Down\n");
1148                 break;
1149         case WAY01_L:
1150                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1151                 break;
1152         case WAY2_L:
1153                 seq_printf(m, "Way2 Locked-Down\n");
1154                 break;
1155         case WAY02_L:
1156                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1157                 break;
1158         case WAY12_L:
1159                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1160                 break;
1161         case WAY012_L:
1162                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1163                 break;
1164         case WAY3_L:
1165                 seq_printf(m, "Way3 Locked-Down\n");
1166                 break;
1167         case WAY03_L:
1168                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1169                 break;
1170         case WAY13_L:
1171                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1172                 break;
1173         case WAY013_L:
1174                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1175                 break;
1176         case WAY32_L:
1177                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1178                 break;
1179         case WAY320_L:
1180                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1181                 break;
1182         case WAY321_L:
1183                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1184                 break;
1185         case WAYALL_L:
1186                 seq_printf(m, "All Ways are locked\n");
1187                 break;
1188         default:
1189                 seq_printf(m, "No Ways are locked\n");
1190         }
1191 #endif
1192         if (*(unsigned int *)v != NR_CPUS-1)
1193                 return 0;
1194
1195 #if L2_LENGTH
1196         seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1197 #endif
1198         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1199         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1200                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1201         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1202                 ((int)memory_end - (int)_stext) >> 10,
1203                 _stext,
1204                 (void *)memory_end);
1205         seq_printf(m, "\n");
1206
1207         return 0;
1208 }
1209
1210 static void *c_start(struct seq_file *m, loff_t *pos)
1211 {
1212         if (*pos == 0)
1213                 *pos = first_cpu(cpu_online_map);
1214         if (*pos >= num_online_cpus())
1215                 return NULL;
1216
1217         return pos;
1218 }
1219
1220 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1221 {
1222         *pos = next_cpu(*pos, cpu_online_map);
1223
1224         return c_start(m, pos);
1225 }
1226
1227 static void c_stop(struct seq_file *m, void *v)
1228 {
1229 }
1230
1231 const struct seq_operations cpuinfo_op = {
1232         .start = c_start,
1233         .next = c_next,
1234         .stop = c_stop,
1235         .show = show_cpuinfo,
1236 };
1237
1238 void __init cmdline_init(const char *r0)
1239 {
1240         if (r0)
1241                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1242 }