arch/blackfin/kernel/setup.c

   1 /*
   2  * arch/blackfin/kernel/setup.c
   3  *
   4  * Copyright 2004-2006 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/console.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/cpu.h>
  16 #include <linux/mm.h>
  17 #include <linux/module.h>
  18 #include <linux/tty.h>
  19 #include <linux/pfn.h>
  20
  21 #include <linux/ext2_fs.h>
  22 #include <linux/cramfs_fs.h>
  23 #include <linux/romfs_fs.h>
  24
  25 #include <asm/cplb.h>
  26 #include <asm/cacheflush.h>
  27 #include <asm/blackfin.h>
  28 #include <asm/cplbinit.h>
  29 #include <asm/div64.h>
  30 #include <asm/cpu.h>
  31 #include <asm/fixed_code.h>
  32 #include <asm/early_printk.h>
  33
  34 u16 _bfin_swrst;
  35 EXPORT_SYMBOL(_bfin_swrst);
  36
  37 unsigned long memory_start, memory_end, physical_mem_end;
  38 unsigned long _rambase, _ramstart, _ramend;
  39 unsigned long reserved_mem_dcache_on;
  40 unsigned long reserved_mem_icache_on;
  41 EXPORT_SYMBOL(memory_start);
  42 EXPORT_SYMBOL(memory_end);
  43 EXPORT_SYMBOL(physical_mem_end);
  44 EXPORT_SYMBOL(_ramend);
  45 EXPORT_SYMBOL(reserved_mem_dcache_on);
  46
  47 #ifdef CONFIG_MTD_UCLINUX
  48 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  49 unsigned long _ebss;
  50 EXPORT_SYMBOL(memory_mtd_end);
  51 EXPORT_SYMBOL(memory_mtd_start);
  52 EXPORT_SYMBOL(mtd_size);
  53 #endif
  54
  55 char __initdata command_line[COMMAND_LINE_SIZE];
  56 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  57         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  58
  59 /* boot memmap, for parsing "memmap=" */
  60 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
  61 #define BFIN_MEMMAP_RAM         1
  62 #define BFIN_MEMMAP_RESERVED    2
  63 struct bfin_memmap {
  64         int nr_map;
  65         struct bfin_memmap_entry {
  66                 unsigned long long addr; /* start of memory segment */
  67                 unsigned long long size;
  68                 unsigned long type;
  69         } map[BFIN_MEMMAP_MAX];
  70 } bfin_memmap __initdata;
  71
  72 /* for memmap sanitization */
  73 struct change_member {
  74         struct bfin_memmap_entry *pentry; /* pointer to original entry */
  75         unsigned long long addr; /* address for this change point */
  76 };
  77 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  78 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  79 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  80 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  81
  82 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  83
  84 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  85 void __init generate_cplb_tables(void)
  86 {
  87         unsigned int cpu;
  88
  89         /* Generate per-CPU I&D CPLB tables */
  90         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  91                 generate_cplb_tables_cpu(cpu);
  92 }
  93 #endif
  94
  95 void __cpuinit bfin_setup_caches(unsigned int cpu)
  96 {
  97 #ifdef CONFIG_BFIN_ICACHE
  98 #ifdef CONFIG_MPU
  99         bfin_icache_init(icplb_tbl[cpu]);
 100 #else
 101         bfin_icache_init(icplb_tables[cpu]);
 102 #endif
 103 #endif
 104
 105 #ifdef CONFIG_BFIN_DCACHE
 106 #ifdef CONFIG_MPU
 107         bfin_dcache_init(dcplb_tbl[cpu]);
 108 #else
 109         bfin_dcache_init(dcplb_tables[cpu]);
 110 #endif
 111 #endif
 112
 113         /*
 114          * In cache coherence emulation mode, we need to have the
 115          * D-cache enabled before running any atomic operation which
 116          * might invove cache invalidation (i.e. spinlock, rwlock).
 117          * So printk's are deferred until then.
 118          */
 119 #ifdef CONFIG_BFIN_ICACHE
 120         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
 121 #endif
 122 #ifdef CONFIG_BFIN_DCACHE
 123         printk(KERN_INFO "Data Cache Enabled for CPU%u"
 124 # if defined CONFIG_BFIN_WB
 125                 " (write-back)"
 126 # elif defined CONFIG_BFIN_WT
 127                 " (write-through)"
 128 # endif
 129                 "\n", cpu);
 130 #endif
 131 }
 132
 133 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
 134 {
 135         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 136
 137         cpudata->idle = current;
 138         cpudata->loops_per_jiffy = loops_per_jiffy;
 139         cpudata->imemctl = bfin_read_IMEM_CONTROL();
 140         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
 141 }
 142
 143 void __init bfin_cache_init(void)
 144 {
 145 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
 146         generate_cplb_tables();
 147 #endif
 148         bfin_setup_caches(0);
 149 }
 150
 151 void __init bfin_relocate_l1_mem(void)
 152 {
 153         unsigned long l1_code_length;
 154         unsigned long l1_data_a_length;
 155         unsigned long l1_data_b_length;
 156         unsigned long l2_length;
 157
 158         blackfin_dma_early_init();
 159
 160         l1_code_length = _etext_l1 - _stext_l1;
 161         if (l1_code_length > L1_CODE_LENGTH)
 162                 panic("L1 Instruction SRAM Overflow\n");
 163         /* cannot complain as printk is not available as yet.
 164          * But we can continue booting and complain later!
 165          */
 166
 167         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 168         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 169
 170         l1_data_a_length = _sbss_l1 - _sdata_l1;
 171         if (l1_data_a_length > L1_DATA_A_LENGTH)
 172                 panic("L1 Data SRAM Bank A Overflow\n");
 173
 174         /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
 175         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 176
 177         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
 178         if (l1_data_b_length > L1_DATA_B_LENGTH)
 179                 panic("L1 Data SRAM Bank B Overflow\n");
 180
 181         /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
 182         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 183                         l1_data_a_length, l1_data_b_length);
 184
 185         if (L2_LENGTH != 0) {
 186                 l2_length = _sbss_l2 - _stext_l2;
 187                 if (l2_length > L2_LENGTH)
 188                         panic("L2 SRAM Overflow\n");
 189
 190                 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
 191                 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
 192         }
 193 }
 194
 195 /* add_memory_region to memmap */
 196 static void __init add_memory_region(unsigned long long start,
 197                               unsigned long long size, int type)
 198 {
 199         int i;
 200
 201         i = bfin_memmap.nr_map;
 202
 203         if (i == BFIN_MEMMAP_MAX) {
 204                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
 205                 return;
 206         }
 207
 208         bfin_memmap.map[i].addr = start;
 209         bfin_memmap.map[i].size = size;
 210         bfin_memmap.map[i].type = type;
 211         bfin_memmap.nr_map++;
 212 }
 213
 214 /*
 215  * Sanitize the boot memmap, removing overlaps.
 216  */
 217 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
 218 {
 219         struct change_member *change_tmp;
 220         unsigned long current_type, last_type;
 221         unsigned long long last_addr;
 222         int chgidx, still_changing;
 223         int overlap_entries;
 224         int new_entry;
 225         int old_nr, new_nr, chg_nr;
 226         int i;
 227
 228         /*
 229                 Visually we're performing the following (1,2,3,4 = memory types)
 230
 231                 Sample memory map (w/overlaps):
 232                    ____22__________________
 233                    ______________________4_
 234                    ____1111________________
 235                    _44_____________________
 236                    11111111________________
 237                    ____________________33__
 238                    ___________44___________
 239                    __________33333_________
 240                    ______________22________
 241                    ___________________2222_
 242                    _________111111111______
 243                    _____________________11_
 244                    _________________4______
 245
 246                 Sanitized equivalent (no overlap):
 247                    1_______________________
 248                    _44_____________________
 249                    ___1____________________
 250                    ____22__________________
 251                    ______11________________
 252                    _________1______________
 253                    __________3_____________
 254                    ___________44___________
 255                    _____________33_________
 256                    _______________2________
 257                    ________________1_______
 258                    _________________4______
 259                    ___________________2____
 260                    ____________________33__
 261                    ______________________4_
 262         */
 263         /* if there's only one memory region, don't bother */
 264         if (*pnr_map < 2)
 265                 return -1;
 266
 267         old_nr = *pnr_map;
 268
 269         /* bail out if we find any unreasonable addresses in memmap */
 270         for (i = 0; i < old_nr; i++)
 271                 if (map[i].addr + map[i].size < map[i].addr)
 272                         return -1;
 273
 274         /* create pointers for initial change-point information (for sorting) */
 275         for (i = 0; i < 2*old_nr; i++)
 276                 change_point[i] = &change_point_list[i];
 277
 278         /* record all known change-points (starting and ending addresses),
 279            omitting those that are for empty memory regions */
 280         chgidx = 0;
 281         for (i = 0; i < old_nr; i++) {
 282                 if (map[i].size != 0) {
 283                         change_point[chgidx]->addr = map[i].addr;
 284                         change_point[chgidx++]->pentry = &map[i];
 285                         change_point[chgidx]->addr = map[i].addr + map[i].size;
 286                         change_point[chgidx++]->pentry = &map[i];
 287                 }
 288         }
 289         chg_nr = chgidx;        /* true number of change-points */
 290
 291         /* sort change-point list by memory addresses (low -> high) */
 292         still_changing = 1;
 293         while (still_changing) {
 294                 still_changing = 0;
 295                 for (i = 1; i < chg_nr; i++) {
 296                         /* if <current_addr> > <last_addr>, swap */
 297                         /* or, if current=<start_addr> & last=<end_addr>, swap */
 298                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
 299                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
 300                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
 301                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
 302                            ) {
 303                                 change_tmp = change_point[i];
 304                                 change_point[i] = change_point[i-1];
 305                                 change_point[i-1] = change_tmp;
 306                                 still_changing = 1;
 307                         }
 308                 }
 309         }
 310
 311         /* create a new memmap, removing overlaps */
 312         overlap_entries = 0;    /* number of entries in the overlap table */
 313         new_entry = 0;          /* index for creating new memmap entries */
 314         last_type = 0;          /* start with undefined memory type */
 315         last_addr = 0;          /* start with 0 as last starting address */
 316         /* loop through change-points, determining affect on the new memmap */
 317         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
 318                 /* keep track of all overlapping memmap entries */
 319                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
 320                         /* add map entry to overlap list (> 1 entry implies an overlap) */
 321                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
 322                 } else {
 323                         /* remove entry from list (order independent, so swap with last) */
 324                         for (i = 0; i < overlap_entries; i++) {
 325                                 if (overlap_list[i] == change_point[chgidx]->pentry)
 326                                         overlap_list[i] = overlap_list[overlap_entries-1];
 327                         }
 328                         overlap_entries--;
 329                 }
 330                 /* if there are overlapping entries, decide which "type" to use */
 331                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
 332                 current_type = 0;
 333                 for (i = 0; i < overlap_entries; i++)
 334                         if (overlap_list[i]->type > current_type)
 335                                 current_type = overlap_list[i]->type;
 336                 /* continue building up new memmap based on this information */
 337                 if (current_type != last_type) {
 338                         if (last_type != 0) {
 339                                 new_map[new_entry].size =
 340                                         change_point[chgidx]->addr - last_addr;
 341                                 /* move forward only if the new size was non-zero */
 342                                 if (new_map[new_entry].size != 0)
 343                                         if (++new_entry >= BFIN_MEMMAP_MAX)
 344                                                 break;  /* no more space left for new entries */
 345                         }
 346                         if (current_type != 0) {
 347                                 new_map[new_entry].addr = change_point[chgidx]->addr;
 348                                 new_map[new_entry].type = current_type;
 349                                 last_addr = change_point[chgidx]->addr;
 350                         }
 351                         last_type = current_type;
 352                 }
 353         }
 354         new_nr = new_entry;     /* retain count for new entries */
 355
 356         /* copy new mapping into original location */
 357         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
 358         *pnr_map = new_nr;
 359
 360         return 0;
 361 }
 362
 363 static void __init print_memory_map(char *who)
 364 {
 365         int i;
 366
 367         for (i = 0; i < bfin_memmap.nr_map; i++) {
 368                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
 369                         bfin_memmap.map[i].addr,
 370                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
 371                 switch (bfin_memmap.map[i].type) {
 372                 case BFIN_MEMMAP_RAM:
 373                                 printk("(usable)\n");
 374                                 break;
 375                 case BFIN_MEMMAP_RESERVED:
 376                                 printk("(reserved)\n");
 377                                 break;
 378                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
 379                                 break;
 380                 }
 381         }
 382 }
 383
 384 static __init int parse_memmap(char *arg)
 385 {
 386         unsigned long long start_at, mem_size;
 387
 388         if (!arg)
 389                 return -EINVAL;
 390
 391         mem_size = memparse(arg, &arg);
 392         if (*arg == '@') {
 393                 start_at = memparse(arg+1, &arg);
 394                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
 395         } else if (*arg == '$') {
 396                 start_at = memparse(arg+1, &arg);
 397                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
 398         }
 399
 400         return 0;
 401 }
 402
 403 /*
 404  * Initial parsing of the command line.  Currently, we support:
 405  *  - Controlling the linux memory size: mem=xxx[KMG]
 406  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 407  *       $ -> reserved memory is dcacheable
 408  *       # -> reserved memory is icacheable
 409  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
 410  *       @ from <start> to <start>+<mem>, type RAM
 411  *       $ from <start> to <start>+<mem>, type RESERVED
 412  */
 413 static __init void parse_cmdline_early(char *cmdline_p)
 414 {
 415         char c = ' ', *to = cmdline_p;
 416         unsigned int memsize;
 417         for (;;) {
 418                 if (c == ' ') {
 419                         if (!memcmp(to, "mem=", 4)) {
 420                                 to += 4;
 421                                 memsize = memparse(to, &to);
 422                                 if (memsize)
 423                                         _ramend = memsize;
 424
 425                         } else if (!memcmp(to, "max_mem=", 8)) {
 426                                 to += 8;
 427                                 memsize = memparse(to, &to);
 428                                 if (memsize) {
 429                                         physical_mem_end = memsize;
 430                                         if (*to != ' ') {
 431                                                 if (*to == '$'
 432                                                     || *(to + 1) == '$')
 433                                                         reserved_mem_dcache_on = 1;
 434                                                 if (*to == '#'
 435                                                     || *(to + 1) == '#')
 436                                                         reserved_mem_icache_on = 1;
 437                                         }
 438                                 }
 439                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 440                                 to += 12;
 441                                 setup_early_printk(to);
 442                         } else if (!memcmp(to, "memmap=", 7)) {
 443                                 to += 7;
 444                                 parse_memmap(to);
 445                         }
 446                 }
 447                 c = *(to++);
 448                 if (!c)
 449                         break;
 450         }
 451 }
 452
 453 /*
 454  * Setup memory defaults from user config.
 455  * The physical memory layout looks like:
 456  *
 457  *  [_rambase, _ramstart]:              kernel image
 458  *  [memory_start, memory_end]:         dynamic memory managed by kernel
 459  *  [memory_end, _ramend]:              reserved memory
 460  *      [memory_mtd_start(memory_end),
 461  *              memory_mtd_start + mtd_size]:   rootfs (if any)
 462  *      [_ramend - DMA_UNCACHED_REGION,
 463  *              _ramend]:                       uncached DMA region
 464  *  [_ramend, physical_mem_end]:        memory not managed by kernel
 465  */
 466 static __init void memory_setup(void)
 467 {
 468 #ifdef CONFIG_MTD_UCLINUX
 469         unsigned long mtd_phys = 0;
 470 #endif
 471
 472         _rambase = (unsigned long)_stext;
 473         _ramstart = (unsigned long)_end;
 474
 475         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
 476                 console_init();
 477                 panic("DMA region exceeds memory limit: %lu.\n",
 478                         _ramend - _ramstart);
 479         }
 480         memory_end = _ramend - DMA_UNCACHED_REGION;
 481
 482 #ifdef CONFIG_MPU
 483         /* Round up to multiple of 4MB */
 484         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
 485 #else
 486         memory_start = PAGE_ALIGN(_ramstart);
 487 #endif
 488
 489 #if defined(CONFIG_MTD_UCLINUX)
 490         /* generic memory mapped MTD driver */
 491         memory_mtd_end = memory_end;
 492
 493         mtd_phys = _ramstart;
 494         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 495
 496 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 497         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 498                 mtd_size =
 499                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 500 # endif
 501
 502 # if defined(CONFIG_CRAMFS)
 503         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 504                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 505 # endif
 506
 507 # if defined(CONFIG_ROMFS_FS)
 508         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 509             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 510                 mtd_size =
 511                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 512 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 513         /* Due to a Hardware Anomaly we need to limit the size of usable
 514          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 515          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 516          */
 517 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 518         if (memory_end >= 56 * 1024 * 1024)
 519                 memory_end = 56 * 1024 * 1024;
 520 #   else
 521         if (memory_end >= 60 * 1024 * 1024)
 522                 memory_end = 60 * 1024 * 1024;
 523 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 524 #  endif                                /* ANOMALY_05000263 */
 525 # endif                         /* CONFIG_ROMFS_FS */
 526
 527         memory_end -= mtd_size;
 528
 529         if (mtd_size == 0) {
 530                 console_init();
 531                 panic("Don't boot kernel without rootfs attached.\n");
 532         }
 533
 534         /* Relocate MTD image to the top of memory after the uncached memory area */
 535         dma_memcpy((char *)memory_end, _end, mtd_size);
 536
 537         memory_mtd_start = memory_end;
 538         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 539 #endif                          /* CONFIG_MTD_UCLINUX */
 540
 541 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 542         /* Due to a Hardware Anomaly we need to limit the size of usable
 543          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 544          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 545          */
 546 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 547         if (memory_end >= 56 * 1024 * 1024)
 548                 memory_end = 56 * 1024 * 1024;
 549 #else
 550         if (memory_end >= 60 * 1024 * 1024)
 551                 memory_end = 60 * 1024 * 1024;
 552 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 553         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 554 #endif                          /* ANOMALY_05000263 */
 555
 556 #ifdef CONFIG_MPU
 557         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
 558         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 559 #endif
 560
 561 #if !defined(CONFIG_MTD_UCLINUX)
 562         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 563         memory_end -= SIZE_4K;
 564 #endif
 565
 566         init_mm.start_code = (unsigned long)_stext;
 567         init_mm.end_code = (unsigned long)_etext;
 568         init_mm.end_data = (unsigned long)_edata;
 569         init_mm.brk = (unsigned long)0;
 570
 571         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 572         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 573
 574         printk(KERN_INFO "Memory map:\n"
 575                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
 576                 KERN_INFO "  text      = 0x%p-0x%p\n"
 577                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
 578                 KERN_INFO "  bss       = 0x%p-0x%p\n"
 579                 KERN_INFO "  data      = 0x%p-0x%p\n"
 580                 KERN_INFO "    stack   = 0x%p-0x%p\n"
 581                 KERN_INFO "  init      = 0x%p-0x%p\n"
 582                 KERN_INFO "  available = 0x%p-0x%p\n"
 583 #ifdef CONFIG_MTD_UCLINUX
 584                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 585 #endif
 586 #if DMA_UNCACHED_REGION > 0
 587                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 588 #endif
 589                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
 590                 _stext, _etext,
 591                 __start_rodata, __end_rodata,
 592                 __bss_start, __bss_stop,
 593                 _sdata, _edata,
 594                 (void *)&init_thread_union,
 595                 (void *)((int)(&init_thread_union) + 0x2000),
 596                 __init_begin, __init_end,
 597                 (void *)_ramstart, (void *)memory_end
 598 #ifdef CONFIG_MTD_UCLINUX
 599                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 600 #endif
 601 #if DMA_UNCACHED_REGION > 0
 602                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 603 #endif
 604                 );
 605 }
 606
 607 /*
 608  * Find the lowest, highest page frame number we have available
 609  */
 610 void __init find_min_max_pfn(void)
 611 {
 612         int i;
 613
 614         max_pfn = 0;
 615         min_low_pfn = memory_end;
 616
 617         for (i = 0; i < bfin_memmap.nr_map; i++) {
 618                 unsigned long start, end;
 619                 /* RAM? */
 620                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 621                         continue;
 622                 start = PFN_UP(bfin_memmap.map[i].addr);
 623                 end = PFN_DOWN(bfin_memmap.map[i].addr +
 624                                 bfin_memmap.map[i].size);
 625                 if (start >= end)
 626                         continue;
 627                 if (end > max_pfn)
 628                         max_pfn = end;
 629                 if (start < min_low_pfn)
 630                         min_low_pfn = start;
 631         }
 632 }
 633
 634 static __init void setup_bootmem_allocator(void)
 635 {
 636         int bootmap_size;
 637         int i;
 638         unsigned long start_pfn, end_pfn;
 639         unsigned long curr_pfn, last_pfn, size;
 640
 641         /* mark memory between memory_start and memory_end usable */
 642         add_memory_region(memory_start,
 643                 memory_end - memory_start, BFIN_MEMMAP_RAM);
 644         /* sanity check for overlap */
 645         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
 646         print_memory_map("boot memmap");
 647
 648         /* intialize globals in linux/bootmem.h */
 649         find_min_max_pfn();
 650         /* pfn of the last usable page frame */
 651         if (max_pfn > memory_end >> PAGE_SHIFT)
 652                 max_pfn = memory_end >> PAGE_SHIFT;
 653         /* pfn of last page frame directly mapped by kernel */
 654         max_low_pfn = max_pfn;
 655         /* pfn of the first usable page frame after kernel image*/
 656         if (min_low_pfn < memory_start >> PAGE_SHIFT)
 657                 min_low_pfn = memory_start >> PAGE_SHIFT;
 658
 659         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
 660         end_pfn = memory_end >> PAGE_SHIFT;
 661
 662         /*
 663          * give all the memory to the bootmap allocator, tell it to put the
 664          * boot mem_map at the start of memory.
 665          */
 666         bootmap_size = init_bootmem_node(NODE_DATA(0),
 667                         memory_start >> PAGE_SHIFT,     /* map goes here */
 668                         start_pfn, end_pfn);
 669
 670         /* register the memmap regions with the bootmem allocator */
 671         for (i = 0; i < bfin_memmap.nr_map; i++) {
 672                 /*
 673                  * Reserve usable memory
 674                  */
 675                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 676                         continue;
 677                 /*
 678                  * We are rounding up the start address of usable memory:
 679                  */
 680                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
 681                 if (curr_pfn >= end_pfn)
 682                         continue;
 683                 /*
 684                  * ... and at the end of the usable range downwards:
 685                  */
 686                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
 687                                          bfin_memmap.map[i].size);
 688
 689                 if (last_pfn > end_pfn)
 690                         last_pfn = end_pfn;
 691
 692                 /*
 693                  * .. finally, did all the rounding and playing
 694                  * around just make the area go away?
 695                  */
 696                 if (last_pfn <= curr_pfn)
 697                         continue;
 698
 699                 size = last_pfn - curr_pfn;
 700                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
 701         }
 702
 703         /* reserve memory before memory_start, including bootmap */
 704         reserve_bootmem(PAGE_OFFSET,
 705                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
 706                 BOOTMEM_DEFAULT);
 707 }
 708
 709 #define EBSZ_TO_MEG(ebsz) \
 710 ({ \
 711         int meg = 0; \
 712         switch (ebsz & 0xf) { \
 713                 case 0x1: meg =  16; break; \
 714                 case 0x3: meg =  32; break; \
 715                 case 0x5: meg =  64; break; \
 716                 case 0x7: meg = 128; break; \
 717                 case 0x9: meg = 256; break; \
 718                 case 0xb: meg = 512; break; \
 719         } \
 720         meg; \
 721 })
 722 static inline int __init get_mem_size(void)
 723 {
 724 #if defined(EBIU_SDBCTL)
 725 # if defined(BF561_FAMILY)
 726         int ret = 0;
 727         u32 sdbctl = bfin_read_EBIU_SDBCTL();
 728         ret += EBSZ_TO_MEG(sdbctl >>  0);
 729         ret += EBSZ_TO_MEG(sdbctl >>  8);
 730         ret += EBSZ_TO_MEG(sdbctl >> 16);
 731         ret += EBSZ_TO_MEG(sdbctl >> 24);
 732         return ret;
 733 # else
 734         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
 735 # endif
 736 #elif defined(EBIU_DDRCTL1)
 737         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
 738         int ret = 0;
 739         switch (ddrctl & 0xc0000) {
 740                 case DEVSZ_64:  ret = 64 / 8;
 741                 case DEVSZ_128: ret = 128 / 8;
 742                 case DEVSZ_256: ret = 256 / 8;
 743                 case DEVSZ_512: ret = 512 / 8;
 744         }
 745         switch (ddrctl & 0x30000) {
 746                 case DEVWD_4:  ret *= 2;
 747                 case DEVWD_8:  ret *= 2;
 748                 case DEVWD_16: break;
 749         }
 750         if ((ddrctl & 0xc000) == 0x4000)
 751                 ret *= 2;
 752         return ret;
 753 #endif
 754         BUG();
 755 }
 756
 757 void __init setup_arch(char **cmdline_p)
 758 {
 759         unsigned long sclk, cclk;
 760
 761 #ifdef CONFIG_DUMMY_CONSOLE
 762         conswitchp = &dummy_con;
 763 #endif
 764
 765 #if defined(CONFIG_CMDLINE_BOOL)
 766         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 767         command_line[sizeof(command_line) - 1] = 0;
 768 #endif
 769
 770         /* Keep a copy of command line */
 771         *cmdline_p = &command_line[0];
 772         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 773         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 774
 775         /* setup memory defaults from the user config */
 776         physical_mem_end = 0;
 777         _ramend = get_mem_size() * 1024 * 1024;
 778
 779         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 780
 781         parse_cmdline_early(&command_line[0]);
 782
 783         if (physical_mem_end == 0)
 784                 physical_mem_end = _ramend;
 785
 786         memory_setup();
 787
 788         /* Initialize Async memory banks */
 789         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
 790         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
 791         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
 792 #ifdef CONFIG_EBIU_MBSCTLVAL
 793         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
 794         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
 795         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 796 #endif
 797
 798         cclk = get_cclk();
 799         sclk = get_sclk();
 800
 801 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 802         if (ANOMALY_05000273 && cclk == sclk)
 803                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 804 #endif
 805
 806 #ifdef BF561_FAMILY
 807         if (ANOMALY_05000266) {
 808                 bfin_read_IMDMA_D0_IRQ_STATUS();
 809                 bfin_read_IMDMA_D1_IRQ_STATUS();
 810         }
 811 #endif
 812         printk(KERN_INFO "Hardware Trace ");
 813         if (bfin_read_TBUFCTL() & 0x1)
 814                 printk("Active ");
 815         else
 816                 printk("Off ");
 817         if (bfin_read_TBUFCTL() & 0x2)
 818                 printk("and Enabled\n");
 819         else
 820         printk("and Disabled\n");
 821
 822 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 823         /* we need to initialize the Flashrom device here since we might
 824          * do things with flash early on in the boot
 825          */
 826         flash_probe();
 827 #endif
 828
 829         _bfin_swrst = bfin_read_SWRST();
 830
 831 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
 832         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
 833 #endif
 834 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
 835         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
 836 #endif
 837
 838 #ifdef CONFIG_SMP
 839         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
 840 #else
 841         if (_bfin_swrst & RESET_DOUBLE) {
 842 #endif
 843                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
 844 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 845                 /* We assume the crashing kernel, and the current symbol table match */
 846                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 847                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
 848                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
 849                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
 850 #endif
 851                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 852                         init_retx);
 853         } else if (_bfin_swrst & RESET_WDOG)
 854                 printk(KERN_INFO "Recovering from Watchdog event\n");
 855         else if (_bfin_swrst & RESET_SOFTWARE)
 856                 printk(KERN_NOTICE "Reset caused by Software reset\n");
 857
 858         printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
 859         if (bfin_compiled_revid() == 0xffff)
 860                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 861         else if (bfin_compiled_revid() == -1)
 862                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 863         else
 864                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 865
 866         if (unlikely(CPUID != bfin_cpuid()))
 867                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
 868                         CPU, bfin_cpuid(), bfin_revid());
 869         else {
 870                 if (bfin_revid() != bfin_compiled_revid()) {
 871                         if (bfin_compiled_revid() == -1)
 872                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 873                                        bfin_revid());
 874                         else if (bfin_compiled_revid() != 0xffff)
 875                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 876                                        bfin_compiled_revid(), bfin_revid());
 877                 }
 878                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
 879                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 880                                CPU, bfin_revid());
 881         }
 882
 883         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 884
 885         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 886                cclk / 1000000, sclk / 1000000);
 887
 888         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 889                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 890
 891         setup_bootmem_allocator();
 892
 893         paging_init();
 894
 895         /* Copy atomic sequences to their fixed location, and sanity check that
 896            these locations are the ones that we advertise to userspace.  */
 897         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 898                FIXED_CODE_END - FIXED_CODE_START);
 899         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 900                != SIGRETURN_STUB - FIXED_CODE_START);
 901         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 902                != ATOMIC_XCHG32 - FIXED_CODE_START);
 903         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 904                != ATOMIC_CAS32 - FIXED_CODE_START);
 905         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 906                != ATOMIC_ADD32 - FIXED_CODE_START);
 907         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 908                != ATOMIC_SUB32 - FIXED_CODE_START);
 909         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 910                != ATOMIC_IOR32 - FIXED_CODE_START);
 911         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 912                != ATOMIC_AND32 - FIXED_CODE_START);
 913         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 914                != ATOMIC_XOR32 - FIXED_CODE_START);
 915         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
 916                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
 917
 918 #ifdef CONFIG_SMP
 919         platform_init_cpus();
 920 #endif
 921         init_exception_vectors();
 922         bfin_cache_init();      /* Initialize caches for the boot CPU */
 923 }
 924
 925 static int __init topology_init(void)
 926 {
 927         unsigned int cpu;
 928         /* Record CPU-private information for the boot processor. */
 929         bfin_setup_cpudata(0);
 930
 931         for_each_possible_cpu(cpu) {
 932                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
 933         }
 934
 935         return 0;
 936 }
 937
 938 subsys_initcall(topology_init);
 939
 940 /* Get the voltage input multiplier */
 941 static u_long cached_vco_pll_ctl, cached_vco;
 942 static u_long get_vco(void)
 943 {
 944         u_long msel;
 945
 946         u_long pll_ctl = bfin_read_PLL_CTL();
 947         if (pll_ctl == cached_vco_pll_ctl)
 948                 return cached_vco;
 949         else
 950                 cached_vco_pll_ctl = pll_ctl;
 951
 952         msel = (pll_ctl >> 9) & 0x3F;
 953         if (0 == msel)
 954                 msel = 64;
 955
 956         cached_vco = CONFIG_CLKIN_HZ;
 957         cached_vco >>= (1 & pll_ctl);   /* DF bit */
 958         cached_vco *= msel;
 959         return cached_vco;
 960 }
 961
 962 /* Get the Core clock */
 963 static u_long cached_cclk_pll_div, cached_cclk;
 964 u_long get_cclk(void)
 965 {
 966         u_long csel, ssel;
 967
 968         if (bfin_read_PLL_STAT() & 0x1)
 969                 return CONFIG_CLKIN_HZ;
 970
 971         ssel = bfin_read_PLL_DIV();
 972         if (ssel == cached_cclk_pll_div)
 973                 return cached_cclk;
 974         else
 975                 cached_cclk_pll_div = ssel;
 976
 977         csel = ((ssel >> 4) & 0x03);
 978         ssel &= 0xf;
 979         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
 980                 cached_cclk = get_vco() / ssel;
 981         else
 982                 cached_cclk = get_vco() >> csel;
 983         return cached_cclk;
 984 }
 985 EXPORT_SYMBOL(get_cclk);
 986
 987 /* Get the System clock */
 988 static u_long cached_sclk_pll_div, cached_sclk;
 989 u_long get_sclk(void)
 990 {
 991         u_long ssel;
 992
 993         if (bfin_read_PLL_STAT() & 0x1)
 994                 return CONFIG_CLKIN_HZ;
 995
 996         ssel = bfin_read_PLL_DIV();
 997         if (ssel == cached_sclk_pll_div)
 998                 return cached_sclk;
 999         else
1000                 cached_sclk_pll_div = ssel;
1001
1002         ssel &= 0xf;
1003         if (0 == ssel) {
1004                 printk(KERN_WARNING "Invalid System Clock\n");
1005                 ssel = 1;
1006         }
1007
1008         cached_sclk = get_vco() / ssel;
1009         return cached_sclk;
1010 }
1011 EXPORT_SYMBOL(get_sclk);
1012
1013 unsigned long sclk_to_usecs(unsigned long sclk)
1014 {
1015         u64 tmp = USEC_PER_SEC * (u64)sclk;
1016         do_div(tmp, get_sclk());
1017         return tmp;
1018 }
1019 EXPORT_SYMBOL(sclk_to_usecs);
1020
1021 unsigned long usecs_to_sclk(unsigned long usecs)
1022 {
1023         u64 tmp = get_sclk() * (u64)usecs;
1024         do_div(tmp, USEC_PER_SEC);
1025         return tmp;
1026 }
1027 EXPORT_SYMBOL(usecs_to_sclk);
1028
1029 /*
1030  *      Get CPU information for use by the procfs.
1031  */
1032 static int show_cpuinfo(struct seq_file *m, void *v)
1033 {
1034         char *cpu, *mmu, *fpu, *vendor, *cache;
1035         uint32_t revid;
1036         int cpu_num = *(unsigned int *)v;
1037         u_long sclk, cclk;
1038         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1039         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1040
1041         cpu = CPU;
1042         mmu = "none";
1043         fpu = "none";
1044         revid = bfin_revid();
1045
1046         sclk = get_sclk();
1047         cclk = get_cclk();
1048
1049         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1050         case 0xca:
1051                 vendor = "Analog Devices";
1052                 break;
1053         default:
1054                 vendor = "unknown";
1055                 break;
1056         }
1057
1058         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1059
1060         if (CPUID == bfin_cpuid())
1061                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1062         else
1063                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1064                         CPUID, bfin_cpuid());
1065
1066         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1067                 "stepping\t: %d\n",
1068                 cpu, cclk/1000000, sclk/1000000,
1069 #ifdef CONFIG_MPU
1070                 "mpu on",
1071 #else
1072                 "mpu off",
1073 #endif
1074                 revid);
1075
1076         seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1077                 cclk/1000000, cclk%1000000,
1078                 sclk/1000000, sclk%1000000);
1079         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1080                 "Calibration\t: %lu loops\n",
1081                 (cpudata->loops_per_jiffy * HZ) / 500000,
1082                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1083                 (cpudata->loops_per_jiffy * HZ));
1084
1085         /* Check Cache configutation */
1086         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1087         case ACACHE_BSRAM:
1088                 cache = "dbank-A/B\t: cache/sram";
1089                 dcache_size = 16;
1090                 dsup_banks = 1;
1091                 break;
1092         case ACACHE_BCACHE:
1093                 cache = "dbank-A/B\t: cache/cache";
1094                 dcache_size = 32;
1095                 dsup_banks = 2;
1096                 break;
1097         case ASRAM_BSRAM:
1098                 cache = "dbank-A/B\t: sram/sram";
1099                 dcache_size = 0;
1100                 dsup_banks = 0;
1101                 break;
1102         default:
1103                 cache = "unknown";
1104                 dcache_size = 0;
1105                 dsup_banks = 0;
1106                 break;
1107         }
1108
1109         /* Is it turned on? */
1110         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1111                 dcache_size = 0;
1112
1113         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1114                 icache_size = 0;
1115
1116         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1117                 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1118                 icache_size, dcache_size,
1119 #if defined CONFIG_BFIN_WB
1120                 "wb"
1121 #elif defined CONFIG_BFIN_WT
1122                 "wt"
1123 #endif
1124                 "", 0);
1125
1126         seq_printf(m, "%s\n", cache);
1127
1128         if (icache_size)
1129                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1130                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1131         else
1132                 seq_printf(m, "icache setup\t: off\n");
1133
1134         seq_printf(m,
1135                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1136                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1137                    BFIN_DLINES);
1138 #ifdef __ARCH_SYNC_CORE_DCACHE
1139         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1140 #endif
1141 #ifdef CONFIG_BFIN_ICACHE_LOCK
1142         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1143         case WAY0_L:
1144                 seq_printf(m, "Way0 Locked-Down\n");
1145                 break;
1146         case WAY1_L:
1147                 seq_printf(m, "Way1 Locked-Down\n");
1148                 break;
1149         case WAY01_L:
1150                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1151                 break;
1152         case WAY2_L:
1153                 seq_printf(m, "Way2 Locked-Down\n");
1154                 break;
1155         case WAY02_L:
1156                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1157                 break;
1158         case WAY12_L:
1159                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1160                 break;
1161         case WAY012_L:
1162                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1163                 break;
1164         case WAY3_L:
1165                 seq_printf(m, "Way3 Locked-Down\n");
1166                 break;
1167         case WAY03_L:
1168                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1169                 break;
1170         case WAY13_L:
1171                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1172                 break;
1173         case WAY013_L:
1174                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1175                 break;
1176         case WAY32_L:
1177                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1178                 break;
1179         case WAY320_L:
1180                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1181                 break;
1182         case WAY321_L:
1183                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1184                 break;
1185         case WAYALL_L:
1186                 seq_printf(m, "All Ways are locked\n");
1187                 break;
1188         default:
1189                 seq_printf(m, "No Ways are locked\n");
1190         }
1191 #endif
1192
1193         if (cpu_num != num_possible_cpus() - 1)
1194                 return 0;
1195
1196         if (L2_LENGTH)
1197                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1198         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1199         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1200                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1201         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1202                 ((int)memory_end - (int)_stext) >> 10,
1203                 _stext,
1204                 (void *)memory_end);
1205         seq_printf(m, "\n");
1206
1207         return 0;
1208 }
1209
1210 static void *c_start(struct seq_file *m, loff_t *pos)
1211 {
1212         if (*pos == 0)
1213                 *pos = first_cpu(cpu_online_map);
1214         if (*pos >= num_online_cpus())
1215                 return NULL;
1216
1217         return pos;
1218 }
1219
1220 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1221 {
1222         *pos = next_cpu(*pos, cpu_online_map);
1223
1224         return c_start(m, pos);
1225 }
1226
1227 static void c_stop(struct seq_file *m, void *v)
1228 {
1229 }
1230
1231 const struct seq_operations cpuinfo_op = {
1232         .start = c_start,
1233         .next = c_next,
1234         .stop = c_stop,
1235         .show = show_cpuinfo,
1236 };
1237
1238 void __init cmdline_init(const char *r0)
1239 {
1240         if (r0)
1241                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1242 }