arch/arm/plat-omap/usb.c

   1 /*
   2  * arch/arm/plat-omap/usb.c -- platform level USB initialization
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #undef  DEBUG
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/usb/otg.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/irq.h>
  33 #include <asm/system.h>
  34 #include <asm/hardware.h>
  35
  36 #include <asm/arch/mux.h>
  37 #include <asm/arch/usb.h>
  38 #include <asm/arch/board.h>
  39
  40 #include "../mach-omap2/control.h"
  41
  42 #ifdef CONFIG_ARCH_OMAP1
  43
  44 #define INT_USB_IRQ_GEN         IH2_BASE + 20
  45 #define INT_USB_IRQ_NISO        IH2_BASE + 30
  46 #define INT_USB_IRQ_ISO         IH2_BASE + 29
  47 #define INT_USB_IRQ_HGEN        INT_USB_HHC_1
  48 #define INT_USB_IRQ_OTG         IH2_BASE + 8
  49
  50 #else
  51
  52 #define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
  53 #define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
  54 #define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
  55 #define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
  56 #define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
  57
  58 #endif
  59
  60
  61 /* These routines should handle the standard chip-specific modes
  62  * for usb0/1/2 ports, covering basic mux and transceiver setup.
  63  *
  64  * Some board-*.c files will need to set up additional mux options,
  65  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  66  */
  67
  68 /* TESTED ON:
  69  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  70  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  71  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
  72  *  - 1510 Innovator UDC with bundled usb0 cable
  73  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
  74  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  75  *  - 1710 custom development board using alternate pin group
  76  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  77  */
  78
  79 /*-------------------------------------------------------------------------*/
  80
  81 #if     defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
  82
  83 static struct otg_transceiver *xceiv;
  84
  85 /**
  86  * otg_get_transceiver - find the (single) OTG transceiver driver
  87  *
  88  * Returns the transceiver driver, after getting a refcount to it; or
  89  * null if there is no such transceiver.  The caller is responsible for
  90  * releasing that count.
  91  */
  92 struct otg_transceiver *otg_get_transceiver(void)
  93 {
  94         if (xceiv)
  95                 get_device(xceiv->dev);
  96         return xceiv;
  97 }
  98 EXPORT_SYMBOL(otg_get_transceiver);
  99
 100 int otg_set_transceiver(struct otg_transceiver *x)
 101 {
 102         if (xceiv && x)
 103                 return -EBUSY;
 104         xceiv = x;
 105         return 0;
 106 }
 107 EXPORT_SYMBOL(otg_set_transceiver);
 108
 109 #endif
 110
 111 /*-------------------------------------------------------------------------*/
 112
 113 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
 114
 115 static void omap2_usb_devconf_clear(u8 port, u32 mask)
 116 {
 117         u32 r;
 118
 119         r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0);
 120         r &= ~USBTXWRMODEI(port, mask);
 121         ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0);
 122 }
 123
 124 static void omap2_usb_devconf_set(u8 port, u32 mask)
 125 {
 126         u32 r;
 127
 128         r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0);
 129         r |= USBTXWRMODEI(port, mask);
 130         ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0);
 131 }
 132
 133 static void omap2_usb2_disable_5pinbitll(void)
 134 {
 135         u32 r;
 136
 137         r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0);
 138         r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
 139         ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0);
 140 }
 141
 142 static void omap2_usb2_enable_5pinunitll(void)
 143 {
 144         u32 r;
 145
 146         r = ctrl_read_reg(OMAP2_CONTROL_DEVCONF0);
 147         r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
 148         ctrl_write_reg(r, OMAP2_CONTROL_DEVCONF0);
 149 }
 150
 151 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 152 {
 153         u32     syscon1 = 0;
 154
 155         if (cpu_is_omap24xx())
 156                 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
 157
 158         if (nwires == 0) {
 159                 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
 160                         /* pulldown D+/D- */
 161                         USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
 162                 }
 163                 return 0;
 164         }
 165
 166         if (is_device) {
 167                 if (cpu_is_omap24xx())
 168                         omap_cfg_reg(J20_24XX_USB0_PUEN);
 169                 else
 170                         omap_cfg_reg(W4_USB_PUEN);
 171         }
 172
 173         /* internal transceiver (unavailable on 17xx, 24xx) */
 174         if (!cpu_class_is_omap2() && nwires == 2) {
 175                 // omap_cfg_reg(P9_USB_DP);
 176                 // omap_cfg_reg(R8_USB_DM);
 177
 178                 if (cpu_is_omap15xx()) {
 179                         /* This works on 1510-Innovator */
 180                         return 0;
 181                 }
 182
 183                 /* NOTES:
 184                  *  - peripheral should configure VBUS detection!
 185                  *  - only peripherals may use the internal D+/D- pulldowns
 186                  *  - OTG support on this port not yet written
 187                  */
 188
 189                 USB_TRANSCEIVER_CTRL_REG &= ~(7 << 4);
 190                 if (!is_device)
 191                         USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
 192
 193                 return 3 << 16;
 194         }
 195
 196         /* alternate pin config, external transceiver */
 197         if (cpu_is_omap15xx()) {
 198                 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
 199                 return 0;
 200         }
 201
 202         if (cpu_is_omap24xx()) {
 203                 omap_cfg_reg(K18_24XX_USB0_DAT);
 204                 omap_cfg_reg(K19_24XX_USB0_TXEN);
 205                 omap_cfg_reg(J14_24XX_USB0_SE0);
 206                 if (nwires != 3)
 207                         omap_cfg_reg(J18_24XX_USB0_RCV);
 208         } else {
 209                 omap_cfg_reg(V6_USB0_TXD);
 210                 omap_cfg_reg(W9_USB0_TXEN);
 211                 omap_cfg_reg(W5_USB0_SE0);
 212                 if (nwires != 3)
 213                         omap_cfg_reg(Y5_USB0_RCV);
 214         }
 215
 216         /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
 217          * may be able to use I2C requests to set those bits along
 218          * with VBUS switching and overcurrent detection.
 219          */
 220
 221         if (cpu_class_is_omap1() && nwires != 6)
 222                 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
 223
 224         switch (nwires) {
 225         case 3:
 226                 syscon1 = 2;
 227                 if (cpu_is_omap24xx())
 228                         omap2_usb_devconf_set(0, USB_BIDIR);
 229                 break;
 230         case 4:
 231                 syscon1 = 1;
 232                 if (cpu_is_omap24xx())
 233                         omap2_usb_devconf_set(0, USB_BIDIR);
 234                 break;
 235         case 6:
 236                 syscon1 = 3;
 237                 if (cpu_is_omap24xx()) {
 238                         omap_cfg_reg(J19_24XX_USB0_VP);
 239                         omap_cfg_reg(K20_24XX_USB0_VM);
 240                         omap2_usb_devconf_set(0, USB_UNIDIR);
 241                 } else {
 242                         omap_cfg_reg(AA9_USB0_VP);
 243                         omap_cfg_reg(R9_USB0_VM);
 244                         USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
 245                 }
 246                 break;
 247         default:
 248                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 249                         0, nwires);
 250         }
 251         return syscon1 << 16;
 252 }
 253
 254 static u32 __init omap_usb1_init(unsigned nwires)
 255 {
 256         u32     syscon1 = 0;
 257
 258         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
 259                 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
 260         if (cpu_is_omap24xx())
 261                 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
 262
 263         if (nwires == 0)
 264                 return 0;
 265
 266         /* external transceiver */
 267         if (cpu_class_is_omap1()) {
 268                 omap_cfg_reg(USB1_TXD);
 269                 omap_cfg_reg(USB1_TXEN);
 270                 if (nwires != 3)
 271                         omap_cfg_reg(USB1_RCV);
 272         }
 273
 274         if (cpu_is_omap15xx()) {
 275                 omap_cfg_reg(USB1_SEO);
 276                 omap_cfg_reg(USB1_SPEED);
 277                 // SUSP
 278         } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
 279                 omap_cfg_reg(W13_1610_USB1_SE0);
 280                 omap_cfg_reg(R13_1610_USB1_SPEED);
 281                 // SUSP
 282         } else if (cpu_is_omap1710()) {
 283                 omap_cfg_reg(R13_1710_USB1_SE0);
 284                 // SUSP
 285         } else if (cpu_is_omap24xx()) {
 286                 /* NOTE:  board-specific code must set up pin muxing for usb1,
 287                  * since each signal could come out on either of two balls.
 288                  */
 289         } else {
 290                 pr_debug("usb%d cpu unrecognized\n", 1);
 291                 return 0;
 292         }
 293
 294         switch (nwires) {
 295         case 2:
 296                 if (!cpu_is_omap24xx())
 297                         goto bad;
 298                 /* NOTE: board-specific code must override this setting if
 299                  * this TLL link is not using DP/DM
 300                  */
 301                 syscon1 = 1;
 302                 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
 303                 break;
 304         case 3:
 305                 syscon1 = 2;
 306                 if (cpu_is_omap24xx())
 307                         omap2_usb_devconf_set(1, USB_BIDIR);
 308                 break;
 309         case 4:
 310                 syscon1 = 1;
 311                 if (cpu_is_omap24xx())
 312                         omap2_usb_devconf_set(1, USB_BIDIR);
 313                 break;
 314         case 6:
 315                 if (cpu_is_omap24xx())
 316                         goto bad;
 317                 syscon1 = 3;
 318                 omap_cfg_reg(USB1_VP);
 319                 omap_cfg_reg(USB1_VM);
 320                 if (!cpu_is_omap15xx())
 321                         USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
 322                 break;
 323         default:
 324 bad:
 325                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 326                         1, nwires);
 327         }
 328         return syscon1 << 20;
 329 }
 330
 331 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 332 {
 333         u32     syscon1 = 0;
 334
 335         if (cpu_is_omap24xx()) {
 336                 omap2_usb2_disable_5pinbitll();
 337                 alt_pingroup = 0;
 338         }
 339
 340         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 341         if (alt_pingroup || nwires == 0)
 342                 return 0;
 343
 344         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
 345                 USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
 346
 347         /* external transceiver */
 348         if (cpu_is_omap15xx()) {
 349                 omap_cfg_reg(USB2_TXD);
 350                 omap_cfg_reg(USB2_TXEN);
 351                 omap_cfg_reg(USB2_SEO);
 352                 if (nwires != 3)
 353                         omap_cfg_reg(USB2_RCV);
 354                 /* there is no USB2_SPEED */
 355         } else if (cpu_is_omap16xx()) {
 356                 omap_cfg_reg(V6_USB2_TXD);
 357                 omap_cfg_reg(W9_USB2_TXEN);
 358                 omap_cfg_reg(W5_USB2_SE0);
 359                 if (nwires != 3)
 360                         omap_cfg_reg(Y5_USB2_RCV);
 361                 // FIXME omap_cfg_reg(USB2_SPEED);
 362         } else if (cpu_is_omap24xx()) {
 363                 omap_cfg_reg(Y11_24XX_USB2_DAT);
 364                 omap_cfg_reg(AA10_24XX_USB2_SE0);
 365                 if (nwires > 2)
 366                         omap_cfg_reg(AA12_24XX_USB2_TXEN);
 367                 if (nwires > 3)
 368                         omap_cfg_reg(AA6_24XX_USB2_RCV);
 369         } else {
 370                 pr_debug("usb%d cpu unrecognized\n", 1);
 371                 return 0;
 372         }
 373         // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
 374
 375         switch (nwires) {
 376         case 2:
 377                 if (!cpu_is_omap24xx())
 378                         goto bad;
 379                 /* NOTE: board-specific code must override this setting if
 380                  * this TLL link is not using DP/DM
 381                  */
 382                 syscon1 = 1;
 383                 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
 384                 break;
 385         case 3:
 386                 syscon1 = 2;
 387                 if (cpu_is_omap24xx())
 388                         omap2_usb_devconf_set(2, USB_BIDIR);
 389                 break;
 390         case 4:
 391                 syscon1 = 1;
 392                 if (cpu_is_omap24xx())
 393                         omap2_usb_devconf_set(2, USB_BIDIR);
 394                 break;
 395         case 5:
 396                 if (!cpu_is_omap24xx())
 397                         goto bad;
 398                 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
 399                 /* NOTE: board-specific code must override this setting if
 400                  * this TLL link is not using DP/DM.  Something must also
 401                  * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
 402                  */
 403                 syscon1 = 3;
 404                 omap2_usb2_enable_5pinunitll();
 405                 break;
 406         case 6:
 407                 if (cpu_is_omap24xx())
 408                         goto bad;
 409                 syscon1 = 3;
 410                 if (cpu_is_omap15xx()) {
 411                         omap_cfg_reg(USB2_VP);
 412                         omap_cfg_reg(USB2_VM);
 413                 } else {
 414                         omap_cfg_reg(AA9_USB2_VP);
 415                         omap_cfg_reg(R9_USB2_VM);
 416                         USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
 417                 }
 418                 break;
 419         default:
 420 bad:
 421                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 422                         2, nwires);
 423         }
 424         return syscon1 << 24;
 425 }
 426
 427 #endif
 428
 429 /*-------------------------------------------------------------------------*/
 430
 431 #if     defined(CONFIG_USB_GADGET_OMAP) || \
 432         defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
 433         (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
 434 static void usb_release(struct device *dev)
 435 {
 436         /* normally not freed */
 437 }
 438 #endif
 439
 440 #ifdef  CONFIG_USB_GADGET_OMAP
 441
 442 static struct resource udc_resources[] = {
 443         /* order is significant! */
 444         {               /* registers */
 445                 .start          = UDC_BASE,
 446                 .end            = UDC_BASE + 0xff,
 447                 .flags          = IORESOURCE_MEM,
 448         }, {            /* general IRQ */
 449                 .start          = INT_USB_IRQ_GEN,
 450                 .flags          = IORESOURCE_IRQ,
 451         }, {            /* PIO IRQ */
 452                 .start          = INT_USB_IRQ_NISO,
 453                 .flags          = IORESOURCE_IRQ,
 454         }, {            /* SOF IRQ */
 455                 .start          = INT_USB_IRQ_ISO,
 456                 .flags          = IORESOURCE_IRQ,
 457         },
 458 };
 459
 460 static u64 udc_dmamask = ~(u32)0;
 461
 462 static struct platform_device udc_device = {
 463         .name           = "omap_udc",
 464         .id             = -1,
 465         .dev = {
 466                 .release                = usb_release,
 467                 .dma_mask               = &udc_dmamask,
 468                 .coherent_dma_mask      = 0xffffffff,
 469         },
 470         .num_resources  = ARRAY_SIZE(udc_resources),
 471         .resource       = udc_resources,
 472 };
 473
 474 #endif
 475
 476 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 477
 478 /* The dmamask must be set for OHCI to work */
 479 static u64 ohci_dmamask = ~(u32)0;
 480
 481 static struct resource ohci_resources[] = {
 482         {
 483                 .start  = OMAP_OHCI_BASE,
 484                 .end    = OMAP_OHCI_BASE + 0xff,
 485                 .flags  = IORESOURCE_MEM,
 486         },
 487         {
 488                 .start  = INT_USB_IRQ_HGEN,
 489                 .flags  = IORESOURCE_IRQ,
 490         },
 491 };
 492
 493 static struct platform_device ohci_device = {
 494         .name                   = "ohci",
 495         .id                     = -1,
 496         .dev = {
 497                 .release                = usb_release,
 498                 .dma_mask               = &ohci_dmamask,
 499                 .coherent_dma_mask      = 0xffffffff,
 500         },
 501         .num_resources  = ARRAY_SIZE(ohci_resources),
 502         .resource               = ohci_resources,
 503 };
 504
 505 #endif
 506
 507 #if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
 508
 509 static struct resource otg_resources[] = {
 510         /* order is significant! */
 511         {
 512                 .start          = OTG_BASE,
 513                 .end            = OTG_BASE + 0xff,
 514                 .flags          = IORESOURCE_MEM,
 515         }, {
 516                 .start          = INT_USB_IRQ_OTG,
 517                 .flags          = IORESOURCE_IRQ,
 518         },
 519 };
 520
 521 static struct platform_device otg_device = {
 522         .name           = "omap_otg",
 523         .id             = -1,
 524         .dev = {
 525                 .release                = usb_release,
 526         },
 527         .num_resources  = ARRAY_SIZE(otg_resources),
 528         .resource       = otg_resources,
 529 };
 530
 531 #endif
 532
 533 /*-------------------------------------------------------------------------*/
 534
 535 #define ULPD_CLOCK_CTRL_REG     __REG16(ULPD_CLOCK_CTRL)
 536 #define ULPD_SOFT_REQ_REG       __REG16(ULPD_SOFT_REQ)
 537
 538
 539 // FIXME correct answer depends on hmc_mode,
 540 // as does (on omap1) any nonzero value for config->otg port number
 541 #ifdef  CONFIG_USB_GADGET_OMAP
 542 #define is_usb0_device(config)  1
 543 #else
 544 #define is_usb0_device(config)  0
 545 #endif
 546
 547 /*-------------------------------------------------------------------------*/
 548
 549 #ifdef  CONFIG_ARCH_OMAP_OTG
 550
 551 void __init
 552 omap_otg_init(struct omap_usb_config *config)
 553 {
 554         u32             syscon = OTG_SYSCON_1_REG & 0xffff;
 555         int             status;
 556         int             alt_pingroup = 0;
 557
 558         /* NOTE:  no bus or clock setup (yet?) */
 559
 560         syscon = OTG_SYSCON_1_REG & 0xffff;
 561         if (!(syscon & OTG_RESET_DONE))
 562                 pr_debug("USB resets not complete?\n");
 563
 564         // OTG_IRQ_EN_REG = 0;
 565
 566         /* pin muxing and transceiver pinouts */
 567         if (config->pins[0] > 2)        /* alt pingroup 2 */
 568                 alt_pingroup = 1;
 569         syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
 570         syscon |= omap_usb1_init(config->pins[1]);
 571         syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
 572         pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
 573         OTG_SYSCON_1_REG = syscon;
 574
 575         syscon = config->hmc_mode;
 576         syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
 577 #ifdef  CONFIG_USB_OTG
 578         if (config->otg)
 579                 syscon |= OTG_EN;
 580 #endif
 581         if (cpu_class_is_omap1())
 582                 pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
 583         pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
 584         OTG_SYSCON_2_REG = syscon;
 585
 586         printk("USB: hmc %d", config->hmc_mode);
 587         if (!alt_pingroup)
 588                 printk(", usb2 alt %d wires", config->pins[2]);
 589         else if (config->pins[0])
 590                 printk(", usb0 %d wires%s", config->pins[0],
 591                         is_usb0_device(config) ? " (dev)" : "");
 592         if (config->pins[1])
 593                 printk(", usb1 %d wires", config->pins[1]);
 594         if (!alt_pingroup && config->pins[2])
 595                 printk(", usb2 %d wires", config->pins[2]);
 596         if (config->otg)
 597                 printk(", Mini-AB on usb%d", config->otg - 1);
 598         printk("\n");
 599
 600         if (cpu_class_is_omap1()) {
 601                 /* leave USB clocks/controllers off until needed */
 602                 ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
 603                 ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
 604                 ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
 605         }
 606         syscon = OTG_SYSCON_1_REG;
 607         syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
 608
 609 #ifdef  CONFIG_USB_GADGET_OMAP
 610         if (config->otg || config->register_dev) {
 611                 syscon &= ~DEV_IDLE_EN;
 612                 udc_device.dev.platform_data = config;
 613                 /* FIXME patch IRQ numbers for omap730 */
 614                 status = platform_device_register(&udc_device);
 615                 if (status)
 616                         pr_debug("can't register UDC device, %d\n", status);
 617         }
 618 #endif
 619
 620 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 621         if (config->otg || config->register_host) {
 622                 syscon &= ~HST_IDLE_EN;
 623                 ohci_device.dev.platform_data = config;
 624                 if (cpu_is_omap730())
 625                         ohci_resources[1].start = INT_730_USB_HHC_1;
 626                 status = platform_device_register(&ohci_device);
 627                 if (status)
 628                         pr_debug("can't register OHCI device, %d\n", status);
 629         }
 630 #endif
 631
 632 #ifdef  CONFIG_USB_OTG
 633         if (config->otg) {
 634                 syscon &= ~OTG_IDLE_EN;
 635                 otg_device.dev.platform_data = config;
 636                 if (cpu_is_omap730())
 637                         otg_resources[1].start = INT_730_USB_OTG;
 638                 status = platform_device_register(&otg_device);
 639                 if (status)
 640                         pr_debug("can't register OTG device, %d\n", status);
 641         }
 642 #endif
 643         pr_debug("OTG_SYSCON_1_REG = %08x\n", syscon);
 644         OTG_SYSCON_1_REG = syscon;
 645
 646         status = 0;
 647 }
 648
 649 #else
 650 static inline void omap_otg_init(struct omap_usb_config *config) {}
 651 #endif
 652
 653 /*-------------------------------------------------------------------------*/
 654
 655 #ifdef  CONFIG_ARCH_OMAP15XX
 656
 657 #define ULPD_DPLL_CTRL_REG      __REG16(ULPD_DPLL_CTRL)
 658 #define DPLL_IOB                (1 << 13)
 659 #define DPLL_PLL_ENABLE         (1 << 4)
 660 #define DPLL_LOCK               (1 << 0)
 661
 662 #define ULPD_APLL_CTRL_REG      __REG16(ULPD_APLL_CTRL)
 663 #define APLL_NDPLL_SWITCH       (1 << 0)
 664
 665
 666 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 667 {
 668         unsigned int val;
 669
 670         omap_usb0_init(config->pins[0], is_usb0_device(config));
 671         omap_usb1_init(config->pins[1]);
 672         omap_usb2_init(config->pins[2], 0);
 673
 674         val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
 675         val |= (config->hmc_mode << 1);
 676         omap_writel(val, MOD_CONF_CTRL_0);
 677
 678         printk("USB: hmc %d", config->hmc_mode);
 679         if (config->pins[0])
 680                 printk(", usb0 %d wires%s", config->pins[0],
 681                         is_usb0_device(config) ? " (dev)" : "");
 682         if (config->pins[1])
 683                 printk(", usb1 %d wires", config->pins[1]);
 684         if (config->pins[2])
 685                 printk(", usb2 %d wires", config->pins[2]);
 686         printk("\n");
 687
 688         /* use DPLL for 48 MHz function clock */
 689         pr_debug("APLL %04x DPLL %04x REQ %04x\n", ULPD_APLL_CTRL_REG,
 690                         ULPD_DPLL_CTRL_REG, ULPD_SOFT_REQ_REG);
 691         ULPD_APLL_CTRL_REG &= ~APLL_NDPLL_SWITCH;
 692         ULPD_DPLL_CTRL_REG |= DPLL_IOB | DPLL_PLL_ENABLE;
 693         ULPD_SOFT_REQ_REG |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
 694         while (!(ULPD_DPLL_CTRL_REG & DPLL_LOCK))
 695                 cpu_relax();
 696
 697 #ifdef  CONFIG_USB_GADGET_OMAP
 698         if (config->register_dev) {
 699                 int status;
 700
 701                 udc_device.dev.platform_data = config;
 702                 status = platform_device_register(&udc_device);
 703                 if (status)
 704                         pr_debug("can't register UDC device, %d\n", status);
 705                 /* udc driver gates 48MHz by D+ pullup */
 706         }
 707 #endif
 708
 709 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 710         if (config->register_host) {
 711                 int status;
 712
 713                 ohci_device.dev.platform_data = config;
 714                 status = platform_device_register(&ohci_device);
 715                 if (status)
 716                         pr_debug("can't register OHCI device, %d\n", status);
 717                 /* hcd explicitly gates 48MHz */
 718         }
 719 #endif
 720 }
 721
 722 #else
 723 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
 724 #endif
 725
 726 /*-------------------------------------------------------------------------*/
 727
 728 static struct omap_usb_config platform_data;
 729
 730 static int __init
 731 omap_usb_init(void)
 732 {
 733         const struct omap_usb_config *config;
 734
 735         config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
 736         if (config == NULL) {
 737                 printk(KERN_ERR "USB: No board-specific "
 738                                 "platform config found\n");
 739                 return -ENODEV;
 740         }
 741         platform_data = *config;
 742
 743         if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
 744                 omap_otg_init(&platform_data);
 745         else if (cpu_is_omap15xx())
 746                 omap_1510_usb_init(&platform_data);
 747         else {
 748                 printk(KERN_ERR "USB: No init for your chip yet\n");
 749                 return -ENODEV;
 750         }
 751         return 0;
 752 }
 753
 754 subsys_initcall(omap_usb_init);