arch/arm/plat-omap/usb.c

   1 /*
   2  * arch/arm/plat-omap/usb.c -- platform level USB initialization
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #undef  DEBUG
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/usb/otg.h>
  30
  31 #include <asm/io.h>
  32 #include <asm/irq.h>
  33 #include <asm/system.h>
  34 #include <asm/hardware.h>
  35
  36 #include <asm/arch/control.h>
  37 #include <asm/arch/mux.h>
  38 #include <asm/arch/usb.h>
  39 #include <asm/arch/board.h>
  40
  41 #ifdef CONFIG_ARCH_OMAP1
  42
  43 #define INT_USB_IRQ_GEN         IH2_BASE + 20
  44 #define INT_USB_IRQ_NISO        IH2_BASE + 30
  45 #define INT_USB_IRQ_ISO         IH2_BASE + 29
  46 #define INT_USB_IRQ_HGEN        INT_USB_HHC_1
  47 #define INT_USB_IRQ_OTG         IH2_BASE + 8
  48
  49 #else
  50
  51 #define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
  52 #define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
  53 #define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
  54 #define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
  55 #define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
  56
  57 #endif
  58
  59
  60 /* These routines should handle the standard chip-specific modes
  61  * for usb0/1/2 ports, covering basic mux and transceiver setup.
  62  *
  63  * Some board-*.c files will need to set up additional mux options,
  64  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  65  */
  66
  67 /* TESTED ON:
  68  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  69  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  70  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
  71  *  - 1510 Innovator UDC with bundled usb0 cable
  72  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
  73  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  74  *  - 1710 custom development board using alternate pin group
  75  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  76  */
  77
  78 /*-------------------------------------------------------------------------*/
  79
  80 #if     defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG)
  81
  82 static struct otg_transceiver *xceiv;
  83
  84 /**
  85  * otg_get_transceiver - find the (single) OTG transceiver driver
  86  *
  87  * Returns the transceiver driver, after getting a refcount to it; or
  88  * null if there is no such transceiver.  The caller is responsible for
  89  * releasing that count.
  90  */
  91 struct otg_transceiver *otg_get_transceiver(void)
  92 {
  93         if (xceiv)
  94                 get_device(xceiv->dev);
  95         return xceiv;
  96 }
  97 EXPORT_SYMBOL(otg_get_transceiver);
  98
  99 int otg_set_transceiver(struct otg_transceiver *x)
 100 {
 101         if (xceiv && x)
 102                 return -EBUSY;
 103         xceiv = x;
 104         return 0;
 105 }
 106 EXPORT_SYMBOL(otg_set_transceiver);
 107
 108 #endif
 109
 110 /*-------------------------------------------------------------------------*/
 111
 112 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
 113
 114 static void omap2_usb_devconf_clear(u8 port, u32 mask)
 115 {
 116         u32 r;
 117
 118         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 119         r &= ~USBTXWRMODEI(port, mask);
 120         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 121 }
 122
 123 static void omap2_usb_devconf_set(u8 port, u32 mask)
 124 {
 125         u32 r;
 126
 127         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 128         r |= USBTXWRMODEI(port, mask);
 129         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 130 }
 131
 132 static void omap2_usb2_disable_5pinbitll(void)
 133 {
 134         u32 r;
 135
 136         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 137         r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
 138         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 139 }
 140
 141 static void omap2_usb2_enable_5pinunitll(void)
 142 {
 143         u32 r;
 144
 145         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 146         r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
 147         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 148 }
 149
 150 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 151 {
 152         u32     syscon1 = 0;
 153
 154         if (cpu_is_omap24xx())
 155                 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
 156
 157         if (nwires == 0) {
 158                 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
 159                         u32 l;
 160
 161                         /* pulldown D+/D- */
 162                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 163                         l &= ~(3 << 1);
 164                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 165                 }
 166                 return 0;
 167         }
 168
 169         if (is_device) {
 170                 if (cpu_is_omap24xx())
 171                         omap_cfg_reg(J20_24XX_USB0_PUEN);
 172                 else
 173                         omap_cfg_reg(W4_USB_PUEN);
 174         }
 175
 176         /* internal transceiver (unavailable on 17xx, 24xx) */
 177         if (!cpu_class_is_omap2() && nwires == 2) {
 178                 u32 l;
 179
 180                 // omap_cfg_reg(P9_USB_DP);
 181                 // omap_cfg_reg(R8_USB_DM);
 182
 183                 if (cpu_is_omap15xx()) {
 184                         /* This works on 1510-Innovator */
 185                         return 0;
 186                 }
 187
 188                 /* NOTES:
 189                  *  - peripheral should configure VBUS detection!
 190                  *  - only peripherals may use the internal D+/D- pulldowns
 191                  *  - OTG support on this port not yet written
 192                  */
 193
 194                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 195                 l &= ~(7 << 4);
 196                 if (!is_device) {
 197                         l |= (3 << 1);
 198                 }
 199                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 200
 201                 return 3 << 16;
 202         }
 203
 204         /* alternate pin config, external transceiver */
 205         if (cpu_is_omap15xx()) {
 206                 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
 207                 return 0;
 208         }
 209
 210         if (cpu_is_omap24xx()) {
 211                 omap_cfg_reg(K18_24XX_USB0_DAT);
 212                 omap_cfg_reg(K19_24XX_USB0_TXEN);
 213                 omap_cfg_reg(J14_24XX_USB0_SE0);
 214                 if (nwires != 3)
 215                         omap_cfg_reg(J18_24XX_USB0_RCV);
 216         } else {
 217                 omap_cfg_reg(V6_USB0_TXD);
 218                 omap_cfg_reg(W9_USB0_TXEN);
 219                 omap_cfg_reg(W5_USB0_SE0);
 220                 if (nwires != 3)
 221                         omap_cfg_reg(Y5_USB0_RCV);
 222         }
 223
 224         /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
 225          * may be able to use I2C requests to set those bits along
 226          * with VBUS switching and overcurrent detection.
 227          */
 228
 229         if (cpu_class_is_omap1() && nwires != 6) {
 230                 u32 l;
 231
 232                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 233                 l &= ~CONF_USB2_UNI_R;
 234                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 235         }
 236
 237         switch (nwires) {
 238         case 3:
 239                 syscon1 = 2;
 240                 if (cpu_is_omap24xx())
 241                         omap2_usb_devconf_set(0, USB_BIDIR);
 242                 break;
 243         case 4:
 244                 syscon1 = 1;
 245                 if (cpu_is_omap24xx())
 246                         omap2_usb_devconf_set(0, USB_BIDIR);
 247                 break;
 248         case 6:
 249                 syscon1 = 3;
 250                 if (cpu_is_omap24xx()) {
 251                         omap_cfg_reg(J19_24XX_USB0_VP);
 252                         omap_cfg_reg(K20_24XX_USB0_VM);
 253                         omap2_usb_devconf_set(0, USB_UNIDIR);
 254                 } else {
 255                         u32 l;
 256
 257                         omap_cfg_reg(AA9_USB0_VP);
 258                         omap_cfg_reg(R9_USB0_VM);
 259                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 260                         l |= CONF_USB2_UNI_R;
 261                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 262                 }
 263                 break;
 264         default:
 265                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 266                         0, nwires);
 267         }
 268         return syscon1 << 16;
 269 }
 270
 271 static u32 __init omap_usb1_init(unsigned nwires)
 272 {
 273         u32     syscon1 = 0;
 274
 275         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 276                 u32 l;
 277
 278                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 279                 l &= ~CONF_USB1_UNI_R;
 280                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 281         }
 282         if (cpu_is_omap24xx())
 283                 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
 284
 285         if (nwires == 0)
 286                 return 0;
 287
 288         /* external transceiver */
 289         if (cpu_class_is_omap1()) {
 290                 omap_cfg_reg(USB1_TXD);
 291                 omap_cfg_reg(USB1_TXEN);
 292                 if (nwires != 3)
 293                         omap_cfg_reg(USB1_RCV);
 294         }
 295
 296         if (cpu_is_omap15xx()) {
 297                 omap_cfg_reg(USB1_SEO);
 298                 omap_cfg_reg(USB1_SPEED);
 299                 // SUSP
 300         } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
 301                 omap_cfg_reg(W13_1610_USB1_SE0);
 302                 omap_cfg_reg(R13_1610_USB1_SPEED);
 303                 // SUSP
 304         } else if (cpu_is_omap1710()) {
 305                 omap_cfg_reg(R13_1710_USB1_SE0);
 306                 // SUSP
 307         } else if (cpu_is_omap24xx()) {
 308                 /* NOTE:  board-specific code must set up pin muxing for usb1,
 309                  * since each signal could come out on either of two balls.
 310                  */
 311         } else {
 312                 pr_debug("usb%d cpu unrecognized\n", 1);
 313                 return 0;
 314         }
 315
 316         switch (nwires) {
 317         case 2:
 318                 if (!cpu_is_omap24xx())
 319                         goto bad;
 320                 /* NOTE: board-specific code must override this setting if
 321                  * this TLL link is not using DP/DM
 322                  */
 323                 syscon1 = 1;
 324                 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
 325                 break;
 326         case 3:
 327                 syscon1 = 2;
 328                 if (cpu_is_omap24xx())
 329                         omap2_usb_devconf_set(1, USB_BIDIR);
 330                 break;
 331         case 4:
 332                 syscon1 = 1;
 333                 if (cpu_is_omap24xx())
 334                         omap2_usb_devconf_set(1, USB_BIDIR);
 335                 break;
 336         case 6:
 337                 if (cpu_is_omap24xx())
 338                         goto bad;
 339                 syscon1 = 3;
 340                 omap_cfg_reg(USB1_VP);
 341                 omap_cfg_reg(USB1_VM);
 342                 if (!cpu_is_omap15xx()) {
 343                         u32 l;
 344
 345                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 346                         l |= CONF_USB1_UNI_R;
 347                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 348                 }
 349                 break;
 350         default:
 351 bad:
 352                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 353                         1, nwires);
 354         }
 355         return syscon1 << 20;
 356 }
 357
 358 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 359 {
 360         u32     syscon1 = 0;
 361
 362         if (cpu_is_omap24xx()) {
 363                 omap2_usb2_disable_5pinbitll();
 364                 alt_pingroup = 0;
 365         }
 366
 367         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 368         if (alt_pingroup || nwires == 0)
 369                 return 0;
 370
 371         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 372                 u32 l;
 373
 374                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 375                 l &= ~CONF_USB2_UNI_R;
 376                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 377         }
 378
 379         /* external transceiver */
 380         if (cpu_is_omap15xx()) {
 381                 omap_cfg_reg(USB2_TXD);
 382                 omap_cfg_reg(USB2_TXEN);
 383                 omap_cfg_reg(USB2_SEO);
 384                 if (nwires != 3)
 385                         omap_cfg_reg(USB2_RCV);
 386                 /* there is no USB2_SPEED */
 387         } else if (cpu_is_omap16xx()) {
 388                 omap_cfg_reg(V6_USB2_TXD);
 389                 omap_cfg_reg(W9_USB2_TXEN);
 390                 omap_cfg_reg(W5_USB2_SE0);
 391                 if (nwires != 3)
 392                         omap_cfg_reg(Y5_USB2_RCV);
 393                 // FIXME omap_cfg_reg(USB2_SPEED);
 394         } else if (cpu_is_omap24xx()) {
 395                 omap_cfg_reg(Y11_24XX_USB2_DAT);
 396                 omap_cfg_reg(AA10_24XX_USB2_SE0);
 397                 if (nwires > 2)
 398                         omap_cfg_reg(AA12_24XX_USB2_TXEN);
 399                 if (nwires > 3)
 400                         omap_cfg_reg(AA6_24XX_USB2_RCV);
 401         } else {
 402                 pr_debug("usb%d cpu unrecognized\n", 1);
 403                 return 0;
 404         }
 405         // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
 406
 407         switch (nwires) {
 408         case 2:
 409                 if (!cpu_is_omap24xx())
 410                         goto bad;
 411                 /* NOTE: board-specific code must override this setting if
 412                  * this TLL link is not using DP/DM
 413                  */
 414                 syscon1 = 1;
 415                 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
 416                 break;
 417         case 3:
 418                 syscon1 = 2;
 419                 if (cpu_is_omap24xx())
 420                         omap2_usb_devconf_set(2, USB_BIDIR);
 421                 break;
 422         case 4:
 423                 syscon1 = 1;
 424                 if (cpu_is_omap24xx())
 425                         omap2_usb_devconf_set(2, USB_BIDIR);
 426                 break;
 427         case 5:
 428                 if (!cpu_is_omap24xx())
 429                         goto bad;
 430                 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
 431                 /* NOTE: board-specific code must override this setting if
 432                  * this TLL link is not using DP/DM.  Something must also
 433                  * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
 434                  */
 435                 syscon1 = 3;
 436                 omap2_usb2_enable_5pinunitll();
 437                 break;
 438         case 6:
 439                 if (cpu_is_omap24xx())
 440                         goto bad;
 441                 syscon1 = 3;
 442                 if (cpu_is_omap15xx()) {
 443                         omap_cfg_reg(USB2_VP);
 444                         omap_cfg_reg(USB2_VM);
 445                 } else {
 446                         u32 l;
 447
 448                         omap_cfg_reg(AA9_USB2_VP);
 449                         omap_cfg_reg(R9_USB2_VM);
 450                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 451                         l |= CONF_USB2_UNI_R;
 452                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 453                 }
 454                 break;
 455         default:
 456 bad:
 457                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 458                         2, nwires);
 459         }
 460         return syscon1 << 24;
 461 }
 462
 463 #endif
 464
 465 /*-------------------------------------------------------------------------*/
 466
 467 #if     defined(CONFIG_USB_GADGET_OMAP) || \
 468         defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) || \
 469         (defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG))
 470 static void usb_release(struct device *dev)
 471 {
 472         /* normally not freed */
 473 }
 474 #endif
 475
 476 #ifdef  CONFIG_USB_GADGET_OMAP
 477
 478 static struct resource udc_resources[] = {
 479         /* order is significant! */
 480         {               /* registers */
 481                 .start          = UDC_BASE,
 482                 .end            = UDC_BASE + 0xff,
 483                 .flags          = IORESOURCE_MEM,
 484         }, {            /* general IRQ */
 485                 .start          = INT_USB_IRQ_GEN,
 486                 .flags          = IORESOURCE_IRQ,
 487         }, {            /* PIO IRQ */
 488                 .start          = INT_USB_IRQ_NISO,
 489                 .flags          = IORESOURCE_IRQ,
 490         }, {            /* SOF IRQ */
 491                 .start          = INT_USB_IRQ_ISO,
 492                 .flags          = IORESOURCE_IRQ,
 493         },
 494 };
 495
 496 static u64 udc_dmamask = ~(u32)0;
 497
 498 static struct platform_device udc_device = {
 499         .name           = "omap_udc",
 500         .id             = -1,
 501         .dev = {
 502                 .release                = usb_release,
 503                 .dma_mask               = &udc_dmamask,
 504                 .coherent_dma_mask      = 0xffffffff,
 505         },
 506         .num_resources  = ARRAY_SIZE(udc_resources),
 507         .resource       = udc_resources,
 508 };
 509
 510 #endif
 511
 512 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 513
 514 /* The dmamask must be set for OHCI to work */
 515 static u64 ohci_dmamask = ~(u32)0;
 516
 517 static struct resource ohci_resources[] = {
 518         {
 519                 .start  = OMAP_OHCI_BASE,
 520                 .end    = OMAP_OHCI_BASE + 0xff,
 521                 .flags  = IORESOURCE_MEM,
 522         },
 523         {
 524                 .start  = INT_USB_IRQ_HGEN,
 525                 .flags  = IORESOURCE_IRQ,
 526         },
 527 };
 528
 529 static struct platform_device ohci_device = {
 530         .name                   = "ohci",
 531         .id                     = -1,
 532         .dev = {
 533                 .release                = usb_release,
 534                 .dma_mask               = &ohci_dmamask,
 535                 .coherent_dma_mask      = 0xffffffff,
 536         },
 537         .num_resources  = ARRAY_SIZE(ohci_resources),
 538         .resource               = ohci_resources,
 539 };
 540
 541 #endif
 542
 543 #if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
 544
 545 static struct resource otg_resources[] = {
 546         /* order is significant! */
 547         {
 548                 .start          = OTG_BASE,
 549                 .end            = OTG_BASE + 0xff,
 550                 .flags          = IORESOURCE_MEM,
 551         }, {
 552                 .start          = INT_USB_IRQ_OTG,
 553                 .flags          = IORESOURCE_IRQ,
 554         },
 555 };
 556
 557 static struct platform_device otg_device = {
 558         .name           = "omap_otg",
 559         .id             = -1,
 560         .dev = {
 561                 .release                = usb_release,
 562         },
 563         .num_resources  = ARRAY_SIZE(otg_resources),
 564         .resource       = otg_resources,
 565 };
 566
 567 #endif
 568
 569 /*-------------------------------------------------------------------------*/
 570
 571 // FIXME correct answer depends on hmc_mode,
 572 // as does (on omap1) any nonzero value for config->otg port number
 573 #ifdef  CONFIG_USB_GADGET_OMAP
 574 #define is_usb0_device(config)  1
 575 #else
 576 #define is_usb0_device(config)  0
 577 #endif
 578
 579 /*-------------------------------------------------------------------------*/
 580
 581 #ifdef  CONFIG_ARCH_OMAP_OTG
 582
 583 void __init
 584 omap_otg_init(struct omap_usb_config *config)
 585 {
 586         u32             syscon;
 587         int             status;
 588         int             alt_pingroup = 0;
 589
 590         /* NOTE:  no bus or clock setup (yet?) */
 591
 592         syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
 593         if (!(syscon & OTG_RESET_DONE))
 594                 pr_debug("USB resets not complete?\n");
 595
 596         //omap_writew(0, OTG_IRQ_EN);
 597
 598         /* pin muxing and transceiver pinouts */
 599         if (config->pins[0] > 2)        /* alt pingroup 2 */
 600                 alt_pingroup = 1;
 601         syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
 602         syscon |= omap_usb1_init(config->pins[1]);
 603         syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
 604         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 605         omap_writel(syscon, OTG_SYSCON_1);
 606
 607         syscon = config->hmc_mode;
 608         syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
 609 #ifdef  CONFIG_USB_OTG
 610         if (config->otg)
 611                 syscon |= OTG_EN;
 612 #endif
 613         if (cpu_class_is_omap1())
 614                 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
 615                          omap_readl(USB_TRANSCEIVER_CTRL));
 616         pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
 617         omap_writel(syscon, OTG_SYSCON_2);
 618
 619         printk("USB: hmc %d", config->hmc_mode);
 620         if (!alt_pingroup)
 621                 printk(", usb2 alt %d wires", config->pins[2]);
 622         else if (config->pins[0])
 623                 printk(", usb0 %d wires%s", config->pins[0],
 624                         is_usb0_device(config) ? " (dev)" : "");
 625         if (config->pins[1])
 626                 printk(", usb1 %d wires", config->pins[1]);
 627         if (!alt_pingroup && config->pins[2])
 628                 printk(", usb2 %d wires", config->pins[2]);
 629         if (config->otg)
 630                 printk(", Mini-AB on usb%d", config->otg - 1);
 631         printk("\n");
 632
 633         if (cpu_class_is_omap1()) {
 634                 u16 w;
 635
 636                 /* leave USB clocks/controllers off until needed */
 637                 w = omap_readw(ULPD_SOFT_REQ);
 638                 w &= ~SOFT_USB_CLK_REQ;
 639                 omap_writew(w, ULPD_SOFT_REQ);
 640
 641                 w = omap_readw(ULPD_CLOCK_CTRL);
 642                 w &= ~USB_MCLK_EN;
 643                 w |= DIS_USB_PVCI_CLK;
 644                 omap_writew(w, ULPD_CLOCK_CTRL);
 645         }
 646         syscon = omap_readl(OTG_SYSCON_1);
 647         syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
 648
 649 #ifdef  CONFIG_USB_GADGET_OMAP
 650         if (config->otg || config->register_dev) {
 651                 syscon &= ~DEV_IDLE_EN;
 652                 udc_device.dev.platform_data = config;
 653                 /* FIXME patch IRQ numbers for omap730 */
 654                 status = platform_device_register(&udc_device);
 655                 if (status)
 656                         pr_debug("can't register UDC device, %d\n", status);
 657         }
 658 #endif
 659
 660 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 661         if (config->otg || config->register_host) {
 662                 syscon &= ~HST_IDLE_EN;
 663                 ohci_device.dev.platform_data = config;
 664                 if (cpu_is_omap730())
 665                         ohci_resources[1].start = INT_730_USB_HHC_1;
 666                 status = platform_device_register(&ohci_device);
 667                 if (status)
 668                         pr_debug("can't register OHCI device, %d\n", status);
 669         }
 670 #endif
 671
 672 #ifdef  CONFIG_USB_OTG
 673         if (config->otg) {
 674                 syscon &= ~OTG_IDLE_EN;
 675                 otg_device.dev.platform_data = config;
 676                 if (cpu_is_omap730())
 677                         otg_resources[1].start = INT_730_USB_OTG;
 678                 status = platform_device_register(&otg_device);
 679                 if (status)
 680                         pr_debug("can't register OTG device, %d\n", status);
 681         }
 682 #endif
 683         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 684         omap_writel(syscon, OTG_SYSCON_1);
 685
 686         status = 0;
 687 }
 688
 689 #else
 690 static inline void omap_otg_init(struct omap_usb_config *config) {}
 691 #endif
 692
 693 /*-------------------------------------------------------------------------*/
 694
 695 #ifdef  CONFIG_ARCH_OMAP15XX
 696
 697 /* ULPD_DPLL_CTRL */
 698 #define DPLL_IOB                (1 << 13)
 699 #define DPLL_PLL_ENABLE         (1 << 4)
 700 #define DPLL_LOCK               (1 << 0)
 701
 702 /* ULPD_APLL_CTRL */
 703 #define APLL_NDPLL_SWITCH       (1 << 0)
 704
 705
 706 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 707 {
 708         unsigned int val;
 709         u16 w;
 710
 711         omap_usb0_init(config->pins[0], is_usb0_device(config));
 712         omap_usb1_init(config->pins[1]);
 713         omap_usb2_init(config->pins[2], 0);
 714
 715         val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
 716         val |= (config->hmc_mode << 1);
 717         omap_writel(val, MOD_CONF_CTRL_0);
 718
 719         printk("USB: hmc %d", config->hmc_mode);
 720         if (config->pins[0])
 721                 printk(", usb0 %d wires%s", config->pins[0],
 722                         is_usb0_device(config) ? " (dev)" : "");
 723         if (config->pins[1])
 724                 printk(", usb1 %d wires", config->pins[1]);
 725         if (config->pins[2])
 726                 printk(", usb2 %d wires", config->pins[2]);
 727         printk("\n");
 728
 729         /* use DPLL for 48 MHz function clock */
 730         pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
 731                         omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
 732
 733         w = omap_readw(ULPD_APLL_CTRL);
 734         w &= ~APLL_NDPLL_SWITCH;
 735         omap_writew(w, ULPD_APLL_CTRL);
 736
 737         w = omap_readw(ULPD_DPLL_CTRL);
 738         w |= DPLL_IOB | DPLL_PLL_ENABLE;
 739         omap_writew(w, ULPD_DPLL_CTRL);
 740
 741         w = omap_readw(ULPD_SOFT_REQ);
 742         w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
 743         omap_writew(w, ULPD_SOFT_REQ);
 744
 745         while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
 746                 cpu_relax();
 747
 748 #ifdef  CONFIG_USB_GADGET_OMAP
 749         if (config->register_dev) {
 750                 int status;
 751
 752                 udc_device.dev.platform_data = config;
 753                 status = platform_device_register(&udc_device);
 754                 if (status)
 755                         pr_debug("can't register UDC device, %d\n", status);
 756                 /* udc driver gates 48MHz by D+ pullup */
 757         }
 758 #endif
 759
 760 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 761         if (config->register_host) {
 762                 int status;
 763
 764                 ohci_device.dev.platform_data = config;
 765                 status = platform_device_register(&ohci_device);
 766                 if (status)
 767                         pr_debug("can't register OHCI device, %d\n", status);
 768                 /* hcd explicitly gates 48MHz */
 769         }
 770 #endif
 771 }
 772
 773 #else
 774 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
 775 #endif
 776
 777 /*-------------------------------------------------------------------------*/
 778
 779 static struct omap_usb_config platform_data;
 780
 781 static int __init
 782 omap_usb_init(void)
 783 {
 784         const struct omap_usb_config *config;
 785
 786         config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
 787         if (config == NULL) {
 788                 printk(KERN_ERR "USB: No board-specific "
 789                                 "platform config found\n");
 790                 return -ENODEV;
 791         }
 792         platform_data = *config;
 793
 794         if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
 795                 omap_otg_init(&platform_data);
 796         else if (cpu_is_omap15xx())
 797                 omap_1510_usb_init(&platform_data);
 798         else {
 799                 printk(KERN_ERR "USB: No init for your chip yet\n");
 800                 return -ENODEV;
 801         }
 802         return 0;
 803 }
 804
 805 subsys_initcall(omap_usb_init);