arch/arm/plat-omap/sram.c

   1 /*
   2  * linux/arch/arm/plat-omap/sram.c
   3  *
   4  * OMAP SRAM detection and management
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/config.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18
  19 #include <asm/tlb.h>
  20 #include <asm/io.h>
  21 #include <asm/cacheflush.h>
  22
  23 #include <asm/mach/map.h>
  24
  25 #include <asm/arch/sram.h>
  26
  27 #define OMAP1_SRAM_PA           0x20000000
  28 #define OMAP1_SRAM_VA           0xd0000000
  29 #define OMAP2_SRAM_PA           0x40200000
  30 #define OMAP2_SRAM_PUB_PA       0x4020f800
  31 #define OMAP2_SRAM_VA           0xd0000000
  32 #define OMAP2_SRAM_PUB_VA       0xd0000800
  33
  34 #if defined(CONFIG_ARCH_OMAP24XX)
  35 #define SRAM_BOOTLOADER_SZ      0x00
  36 #else
  37 #define SRAM_BOOTLOADER_SZ      0x80
  38 #endif
  39
  40 #define VA_REQINFOPERM0         IO_ADDRESS(0x68005048)
  41 #define VA_READPERM0            IO_ADDRESS(0x68005050)
  42 #define VA_WRITEPERM0           IO_ADDRESS(0x68005058)
  43 #define VA_CONTROL_STAT         IO_ADDRESS(0x480002F8)
  44 #define GP_DEVICE               0x300
  45 #define TYPE_MASK               0x700
  46
  47 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  48
  49 static unsigned long omap_sram_base;
  50 static unsigned long omap_sram_size;
  51 static unsigned long omap_sram_ceil;
  52
  53 /* Depending on the target RAMFS firewall setup, the public usable amount of
  54  * SRAM varies.  The default accessable size for all device types is 2k. A GP
  55  * device allows ARM11 but not other initators for full size. This
  56  * functionality seems ok until some nice security API happens.
  57  */
  58 static int is_sram_locked(void)
  59 {
  60         int type = 0;
  61
  62         if (cpu_is_omap242x())
  63                 type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
  64
  65         if (type == GP_DEVICE) {
  66                 /* RAMFW: R/W access to all initators for all qualifier sets */
  67                 if (cpu_is_omap242x()) {
  68                         __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
  69                         __raw_writel(0xCFDE, VA_READPERM0);  /* all i-read */
  70                         __raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
  71                 }
  72                 return 0;
  73         } else
  74                 return 1; /* assume locked with no PPA or security driver */
  75 }
  76
  77 /*
  78  * The amount of SRAM depends on the core type.
  79  * Note that we cannot try to test for SRAM here because writes
  80  * to secure SRAM will hang the system. Also the SRAM is not
  81  * yet mapped at this point.
  82  */
  83 void __init omap_detect_sram(void)
  84 {
  85         if (cpu_is_omap24xx()) {
  86                 if (is_sram_locked()) {
  87                         omap_sram_base = OMAP2_SRAM_PUB_VA;
  88                         omap_sram_size = 0x800; /* 2K */
  89                 } else {
  90                         omap_sram_base = OMAP2_SRAM_VA;
  91                         if (cpu_is_omap242x())
  92                                 omap_sram_size = 0xa0000; /* 640K */
  93                         else if (cpu_is_omap243x())
  94                                 omap_sram_size = 0x10000; /* 64K */
  95                 }
  96         } else {
  97                 omap_sram_base = OMAP1_SRAM_VA;
  98
  99                 if (cpu_is_omap730())
 100                         omap_sram_size = 0x32000;       /* 200K */
 101                 else if (cpu_is_omap15xx())
 102                         omap_sram_size = 0x30000;       /* 192K */
 103                 else if (cpu_is_omap1610() || cpu_is_omap1621() ||
 104                      cpu_is_omap1710())
 105                         omap_sram_size = 0x4000;        /* 16K */
 106                 else if (cpu_is_omap1611())
 107                         omap_sram_size = 0x3e800;       /* 250K */
 108                 else {
 109                         printk(KERN_ERR "Could not detect SRAM size\n");
 110                         omap_sram_size = 0x4000;
 111                 }
 112         }
 113         omap_sram_ceil = omap_sram_base + omap_sram_size;
 114 }
 115
 116 static struct map_desc omap_sram_io_desc[] __initdata = {
 117         {       /* .length gets filled in at runtime */
 118                 .virtual        = OMAP1_SRAM_VA,
 119                 .pfn            = __phys_to_pfn(OMAP1_SRAM_PA),
 120                 .type           = MT_DEVICE
 121         }
 122 };
 123
 124 /*
 125  * In order to use last 2kB of SRAM on 1611b, we must round the size
 126  * up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
 127  * clock init needs SRAM early.
 128  */
 129 void __init omap_map_sram(void)
 130 {
 131         unsigned long base;
 132
 133         if (omap_sram_size == 0)
 134                 return;
 135
 136         if (cpu_is_omap24xx()) {
 137                 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
 138
 139                 if (is_sram_locked())
 140                         base = OMAP2_SRAM_PUB_PA;
 141                 else
 142                         base = OMAP2_SRAM_PA;
 143                 base = ROUND_DOWN(base, PAGE_SIZE);
 144                 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
 145         }
 146
 147         omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
 148         omap_sram_io_desc[0].length *= PAGE_SIZE;
 149         iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
 150
 151         printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
 152         __pfn_to_phys(omap_sram_io_desc[0].pfn),
 153         omap_sram_io_desc[0].virtual,
 154                omap_sram_io_desc[0].length);
 155
 156         /*
 157          * Normally devicemaps_init() would flush caches and tlb after
 158          * mdesc->map_io(), but since we're called from map_io(), we
 159          * must do it here.
 160          */
 161         local_flush_tlb_all();
 162         flush_cache_all();
 163
 164         /*
 165          * Looks like we need to preserve some bootloader code at the
 166          * beginning of SRAM for jumping to flash for reboot to work...
 167          */
 168         memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
 169                omap_sram_size - SRAM_BOOTLOADER_SZ);
 170 }
 171
 172 void * omap_sram_push(void * start, unsigned long size)
 173 {
 174         if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
 175                 printk(KERN_ERR "Not enough space in SRAM\n");
 176                 return NULL;
 177         }
 178
 179         omap_sram_ceil -= size;
 180         omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
 181         memcpy((void *)omap_sram_ceil, start, size);
 182
 183         return (void *)omap_sram_ceil;
 184 }
 185
 186 static void omap_sram_error(void)
 187 {
 188         panic("Uninitialized SRAM function\n");
 189 }
 190
 191 #ifdef CONFIG_ARCH_OMAP1
 192
 193 static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
 194
 195 void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
 196 {
 197         if (!_omap_sram_reprogram_clock)
 198                 omap_sram_error();
 199
 200         return _omap_sram_reprogram_clock(dpllctl, ckctl);
 201 }
 202
 203 int __init omap1_sram_init(void)
 204 {
 205         _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
 206                                                     sram_reprogram_clock_sz);
 207
 208         return 0;
 209 }
 210
 211 #else
 212 #define omap1_sram_init()       do {} while (0)
 213 #endif
 214
 215 #ifdef CONFIG_ARCH_OMAP2
 216
 217 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
 218                               u32 base_cs, u32 force_unlock);
 219
 220 void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
 221                    u32 base_cs, u32 force_unlock)
 222 {
 223         if (!_omap2_sram_ddr_init)
 224                 omap_sram_error();
 225
 226         return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
 227                                     base_cs, force_unlock);
 228 }
 229
 230 static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
 231                                           u32 mem_type);
 232
 233 void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
 234 {
 235         if (!_omap2_sram_reprogram_sdrc)
 236                 omap_sram_error();
 237
 238         return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
 239 }
 240
 241 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
 242
 243 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
 244 {
 245         if (!_omap2_set_prcm)
 246                 omap_sram_error();
 247
 248         return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
 249 }
 250
 251 int __init omap2_sram_init(void)
 252 {
 253         _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
 254
 255         _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
 256                                                     sram_reprogram_sdrc_sz);
 257         _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
 258
 259         return 0;
 260 }
 261 #else
 262 #define omap2_sram_init()       do {} while (0)
 263 #endif
 264
 265 int __init omap_sram_init(void)
 266 {
 267         omap_detect_sram();
 268         omap_map_sram();
 269
 270         if (!cpu_is_omap24xx())
 271                 omap1_sram_init();
 272         else
 273                 omap2_sram_init();
 274
 275         return 0;
 276 }