arch/arm/plat-omap/mux.c

   1 /*
   2  * linux/arch/arm/plat-omap/mux.c
   3  *
   4  * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
   5  *
   6  * Copyright (C) 2003 - 2005 Nokia Corporation
   7  *
   8  * Written by Tony Lindgren <tony.lindgren@nokia.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23  *
  24  */
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/kernel.h>
  28 #include <asm/system.h>
  29 #include <asm/io.h>
  30 #include <linux/spinlock.h>
  31 #include <asm/arch/mux.h>
  32
  33 #ifdef CONFIG_OMAP_MUX
  34
  35 #define OMAP24XX_PULL_ENA       (1 << 3)
  36 #define OMAP24XX_PULL_UP        (1 << 4)
  37
  38 static struct pin_config * pin_table;
  39 static unsigned long pin_table_sz;
  40
  41 extern struct pin_config * omap730_pins;
  42 extern struct pin_config * omap1xxx_pins;
  43 extern struct pin_config * omap24xx_pins;
  44
  45 int __init omap_mux_register(struct pin_config * pins, unsigned long size)
  46 {
  47         pin_table = pins;
  48         pin_table_sz = size;
  49
  50         return 0;
  51 }
  52
  53 /*
  54  * Sets the Omap MUX and PULL_DWN registers based on the table
  55  */
  56 int __init_or_module omap_cfg_reg(const unsigned long index)
  57 {
  58         static DEFINE_SPINLOCK(mux_spin_lock);
  59
  60         unsigned long flags;
  61         struct pin_config *cfg;
  62         unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
  63                 pull_orig = 0, pull = 0;
  64         unsigned int mask, warn = 0;
  65
  66         if (!pin_table)
  67                 BUG();
  68
  69         if (index >= pin_table_sz) {
  70                 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
  71                        index, pin_table_sz);
  72                 dump_stack();
  73                 return -ENODEV;
  74         }
  75
  76         cfg = (struct pin_config *)&pin_table[index];
  77 #ifdef CONFIG_ARCH_OMAP24XX
  78         if (cpu_is_omap24xx()) {
  79                 u8 reg = 0;
  80
  81                 reg |= cfg->mask & 0x7;
  82                 if (cfg->pull_val)
  83                         reg |= OMAP24XX_PULL_ENA;
  84                 if(cfg->pu_pd_val)
  85                         reg |= OMAP24XX_PULL_UP;
  86 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
  87                 {
  88                         u8 orig = omap_readb(OMAP24XX_CTRL_BASE + cfg->mux_reg);
  89                         u8 debug = 0;
  90
  91 #ifdef  CONFIG_OMAP_MUX_DEBUG
  92                         debug = cfg->debug;
  93 #endif
  94                         warn = (orig != reg);
  95                         if (debug || warn)
  96                                 printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n",
  97                                                 cfg->name,
  98                                                 OMAP24XX_CTRL_BASE + cfg->mux_reg,
  99                                                 orig, reg);
 100                 }
 101 #endif
 102                 omap_writeb(reg, OMAP24XX_CTRL_BASE + cfg->mux_reg);
 103
 104                 return 0;
 105         }
 106 #endif /* ARCH_OMAP24XX */
 107
 108         /* Check the mux register in question */
 109         if (cfg->mux_reg) {
 110                 unsigned        tmp1, tmp2;
 111
 112                 spin_lock_irqsave(&mux_spin_lock, flags);
 113                 reg_orig = omap_readl(cfg->mux_reg);
 114
 115                 /* The mux registers always seem to be 3 bits long */
 116                 mask = (0x7 << cfg->mask_offset);
 117                 tmp1 = reg_orig & mask;
 118                 reg = reg_orig & ~mask;
 119
 120                 tmp2 = (cfg->mask << cfg->mask_offset);
 121                 reg |= tmp2;
 122
 123                 if (tmp1 != tmp2)
 124                         warn = 1;
 125
 126                 omap_writel(reg, cfg->mux_reg);
 127                 spin_unlock_irqrestore(&mux_spin_lock, flags);
 128         }
 129
 130         /* Check for pull up or pull down selection on 1610 */
 131         if (!cpu_is_omap15xx()) {
 132                 if (cfg->pu_pd_reg && cfg->pull_val) {
 133                         spin_lock_irqsave(&mux_spin_lock, flags);
 134                         pu_pd_orig = omap_readl(cfg->pu_pd_reg);
 135                         mask = 1 << cfg->pull_bit;
 136
 137                         if (cfg->pu_pd_val) {
 138                                 if (!(pu_pd_orig & mask))
 139                                         warn = 1;
 140                                 /* Use pull up */
 141                                 pu_pd = pu_pd_orig | mask;
 142                         } else {
 143                                 if (pu_pd_orig & mask)
 144                                         warn = 1;
 145                                 /* Use pull down */
 146                                 pu_pd = pu_pd_orig & ~mask;
 147                         }
 148                         omap_writel(pu_pd, cfg->pu_pd_reg);
 149                         spin_unlock_irqrestore(&mux_spin_lock, flags);
 150                 }
 151         }
 152
 153         /* Check for an associated pull down register */
 154         if (cfg->pull_reg) {
 155                 spin_lock_irqsave(&mux_spin_lock, flags);
 156                 pull_orig = omap_readl(cfg->pull_reg);
 157                 mask = 1 << cfg->pull_bit;
 158
 159                 if (cfg->pull_val) {
 160                         if (pull_orig & mask)
 161                                 warn = 1;
 162                         /* Low bit = pull enabled */
 163                         pull = pull_orig & ~mask;
 164                 } else {
 165                         if (!(pull_orig & mask))
 166                                 warn = 1;
 167                         /* High bit = pull disabled */
 168                         pull = pull_orig | mask;
 169                 }
 170
 171                 omap_writel(pull, cfg->pull_reg);
 172                 spin_unlock_irqrestore(&mux_spin_lock, flags);
 173         }
 174
 175         if (warn) {
 176 #ifdef CONFIG_OMAP_MUX_WARNINGS
 177                 printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
 178 #endif
 179         }
 180
 181 #ifdef CONFIG_OMAP_MUX_DEBUG
 182         if (cfg->debug || warn) {
 183                 printk("MUX: Setting register %s\n", cfg->name);
 184                 printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 185                        cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
 186
 187                 if (!cpu_is_omap15xx()) {
 188                         if (cfg->pu_pd_reg && cfg->pull_val) {
 189                                 printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 190                                        cfg->pu_pd_name, cfg->pu_pd_reg,
 191                                        pu_pd_orig, pu_pd);
 192                         }
 193                 }
 194
 195                 if (cfg->pull_reg)
 196                         printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
 197                                cfg->pull_name, cfg->pull_reg, pull_orig, pull);
 198         }
 199 #endif
 200
 201 #ifdef CONFIG_OMAP_MUX_ERRORS
 202         return warn ? -ETXTBSY : 0;
 203 #else
 204         return 0;
 205 #endif
 206 }
 207 EXPORT_SYMBOL(omap_cfg_reg);
 208 #else
 209 #define omap_mux_init() do {} while(0)
 210 #define omap_cfg_reg(x) do {} while(0)
 211 #endif  /* CONFIG_OMAP_MUX */