2 * linux/arch/arm/plat-omap/mcbsp.c
4 * Copyright (C) 2004 Nokia Corporation
5 * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Multichannel mode not supported.
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
28 #include <mach/mcbsp.h>
30 struct omap_mcbsp **mcbsp_ptr;
33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
35 if (cpu_class_is_omap1() || cpu_is_omap2420())
36 __raw_writew((u16)val, io_base + reg);
38 __raw_writel(val, io_base + reg);
41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
43 if (cpu_class_is_omap1() || cpu_is_omap2420())
44 return __raw_readw(io_base + reg);
46 return __raw_readl(io_base + reg);
49 #define OMAP_MCBSP_READ(base, reg) \
50 omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51 #define OMAP_MCBSP_WRITE(base, reg, val) \
52 omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
54 #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
55 #define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
57 static void omap_mcbsp_dump_reg(u8 id)
59 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
61 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
62 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
63 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
64 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
65 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
66 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
67 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
68 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
69 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
70 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
71 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
72 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
73 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
74 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
75 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
76 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
77 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
78 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
79 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
80 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
81 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
82 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
83 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
84 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
85 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
86 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
87 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88 dev_dbg(mcbsp->dev, "***********************\n");
91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
93 struct omap_mcbsp *mcbsp_tx = dev_id;
95 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
96 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
98 complete(&mcbsp_tx->tx_irq_completion);
103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
105 struct omap_mcbsp *mcbsp_rx = dev_id;
107 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
108 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
110 complete(&mcbsp_rx->rx_irq_completion);
115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
117 struct omap_mcbsp *mcbsp_dma_tx = data;
119 dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
120 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
122 /* We can free the channels */
123 omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
124 mcbsp_dma_tx->dma_tx_lch = -1;
126 complete(&mcbsp_dma_tx->tx_dma_completion);
129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
131 struct omap_mcbsp *mcbsp_dma_rx = data;
133 dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
134 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
136 /* We can free the channels */
137 omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
138 mcbsp_dma_rx->dma_rx_lch = -1;
140 complete(&mcbsp_dma_rx->rx_dma_completion);
144 * omap_mcbsp_config simply write a config to the
146 * You either call this function or set the McBSP registers
147 * by yourself before calling omap_mcbsp_start().
149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
151 struct omap_mcbsp *mcbsp;
152 void __iomem *io_base;
154 if (!omap_mcbsp_check_valid_id(id)) {
155 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
158 mcbsp = id_to_mcbsp_ptr(id);
160 io_base = mcbsp->io_base;
161 dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n",
162 mcbsp->id, mcbsp->phys_base);
164 /* We write the given config */
165 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
166 OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
167 OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
168 OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
169 OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
170 OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
171 OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
172 OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
173 OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
174 OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
175 OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
176 if (cpu_is_omap2430() || cpu_is_omap34xx()) {
177 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
178 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
181 EXPORT_SYMBOL(omap_mcbsp_config);
184 * We can choose between IRQ based or polled IO.
185 * This needs to be called before omap_mcbsp_request().
187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
189 struct omap_mcbsp *mcbsp;
191 if (!omap_mcbsp_check_valid_id(id)) {
192 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
195 mcbsp = id_to_mcbsp_ptr(id);
197 spin_lock(&mcbsp->lock);
200 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
202 spin_unlock(&mcbsp->lock);
206 mcbsp->io_type = io_type;
208 spin_unlock(&mcbsp->lock);
212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
214 int omap_mcbsp_request(unsigned int id)
216 struct omap_mcbsp *mcbsp;
219 if (!omap_mcbsp_check_valid_id(id)) {
220 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
223 mcbsp = id_to_mcbsp_ptr(id);
225 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
226 mcbsp->pdata->ops->request(id);
228 clk_enable(mcbsp->clk);
230 spin_lock(&mcbsp->lock);
232 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
234 spin_unlock(&mcbsp->lock);
239 spin_unlock(&mcbsp->lock);
242 * Make sure that transmitter, receiver and sample-rate generator are
243 * not running before activating IRQs.
245 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
246 OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
248 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
249 /* We need to get IRQs here */
250 init_completion(&mcbsp->tx_irq_completion);
251 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
252 0, "McBSP", (void *)mcbsp);
254 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
255 "for McBSP%d\n", mcbsp->tx_irq,
260 init_completion(&mcbsp->rx_irq_completion);
261 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
262 0, "McBSP", (void *)mcbsp);
264 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
265 "for McBSP%d\n", mcbsp->rx_irq,
267 free_irq(mcbsp->tx_irq, (void *)mcbsp);
274 EXPORT_SYMBOL(omap_mcbsp_request);
276 void omap_mcbsp_free(unsigned int id)
278 struct omap_mcbsp *mcbsp;
280 if (!omap_mcbsp_check_valid_id(id)) {
281 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
284 mcbsp = id_to_mcbsp_ptr(id);
286 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
287 mcbsp->pdata->ops->free(id);
289 clk_disable(mcbsp->clk);
291 spin_lock(&mcbsp->lock);
293 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
295 spin_unlock(&mcbsp->lock);
300 spin_unlock(&mcbsp->lock);
302 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
304 free_irq(mcbsp->rx_irq, (void *)mcbsp);
305 free_irq(mcbsp->tx_irq, (void *)mcbsp);
308 EXPORT_SYMBOL(omap_mcbsp_free);
311 * Here we start the McBSP, by enabling the sample
312 * generator, both transmitter and receivers,
313 * and the frame sync.
315 void omap_mcbsp_start(unsigned int id)
317 struct omap_mcbsp *mcbsp;
318 void __iomem *io_base;
321 if (!omap_mcbsp_check_valid_id(id)) {
322 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
325 mcbsp = id_to_mcbsp_ptr(id);
326 io_base = mcbsp->io_base;
328 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
329 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
331 /* Start the sample generator */
332 w = OMAP_MCBSP_READ(io_base, SPCR2);
333 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
335 /* Enable transmitter and receiver */
336 w = OMAP_MCBSP_READ(io_base, SPCR2);
337 OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
339 w = OMAP_MCBSP_READ(io_base, SPCR1);
340 OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
344 /* Start frame sync */
345 w = OMAP_MCBSP_READ(io_base, SPCR2);
346 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
348 /* Dump McBSP Regs */
349 omap_mcbsp_dump_reg(id);
351 EXPORT_SYMBOL(omap_mcbsp_start);
353 void omap_mcbsp_stop(unsigned int id)
355 struct omap_mcbsp *mcbsp;
356 void __iomem *io_base;
359 if (!omap_mcbsp_check_valid_id(id)) {
360 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
364 mcbsp = id_to_mcbsp_ptr(id);
365 io_base = mcbsp->io_base;
367 /* Reset transmitter */
368 w = OMAP_MCBSP_READ(io_base, SPCR2);
369 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
372 w = OMAP_MCBSP_READ(io_base, SPCR1);
373 OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
375 /* Reset the sample rate generator */
376 w = OMAP_MCBSP_READ(io_base, SPCR2);
377 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
379 EXPORT_SYMBOL(omap_mcbsp_stop);
381 /* polled mcbsp i/o operations */
382 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
384 struct omap_mcbsp *mcbsp;
387 if (!omap_mcbsp_check_valid_id(id)) {
388 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
392 mcbsp = id_to_mcbsp_ptr(id);
393 base = mcbsp->io_base;
395 writew(buf, base + OMAP_MCBSP_REG_DXR1);
396 /* if frame sync error - clear the error */
397 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
399 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
400 base + OMAP_MCBSP_REG_SPCR2);
404 /* wait for transmit confirmation */
406 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
407 if (attemps++ > 1000) {
408 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
410 base + OMAP_MCBSP_REG_SPCR2);
412 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
414 base + OMAP_MCBSP_REG_SPCR2);
416 dev_err(mcbsp->dev, "Could not write to"
417 " McBSP%d Register\n", mcbsp->id);
425 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
427 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
429 struct omap_mcbsp *mcbsp;
432 if (!omap_mcbsp_check_valid_id(id)) {
433 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
436 mcbsp = id_to_mcbsp_ptr(id);
438 base = mcbsp->io_base;
439 /* if frame sync error - clear the error */
440 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
442 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
443 base + OMAP_MCBSP_REG_SPCR1);
447 /* wait for recieve confirmation */
449 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
450 if (attemps++ > 1000) {
451 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
453 base + OMAP_MCBSP_REG_SPCR1);
455 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
457 base + OMAP_MCBSP_REG_SPCR1);
459 dev_err(mcbsp->dev, "Could not read from"
460 " McBSP%d Register\n", mcbsp->id);
465 *buf = readw(base + OMAP_MCBSP_REG_DRR1);
469 EXPORT_SYMBOL(omap_mcbsp_pollread);
472 * IRQ based word transmission.
474 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
476 struct omap_mcbsp *mcbsp;
477 void __iomem *io_base;
478 omap_mcbsp_word_length word_length;
480 if (!omap_mcbsp_check_valid_id(id)) {
481 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
485 mcbsp = id_to_mcbsp_ptr(id);
486 io_base = mcbsp->io_base;
487 word_length = mcbsp->tx_word_length;
489 wait_for_completion(&mcbsp->tx_irq_completion);
491 if (word_length > OMAP_MCBSP_WORD_16)
492 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
493 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
495 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
497 u32 omap_mcbsp_recv_word(unsigned int id)
499 struct omap_mcbsp *mcbsp;
500 void __iomem *io_base;
501 u16 word_lsb, word_msb = 0;
502 omap_mcbsp_word_length word_length;
504 if (!omap_mcbsp_check_valid_id(id)) {
505 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
508 mcbsp = id_to_mcbsp_ptr(id);
510 word_length = mcbsp->rx_word_length;
511 io_base = mcbsp->io_base;
513 wait_for_completion(&mcbsp->rx_irq_completion);
515 if (word_length > OMAP_MCBSP_WORD_16)
516 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
517 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
519 return (word_lsb | (word_msb << 16));
521 EXPORT_SYMBOL(omap_mcbsp_recv_word);
523 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
525 struct omap_mcbsp *mcbsp;
526 void __iomem *io_base;
527 omap_mcbsp_word_length tx_word_length;
528 omap_mcbsp_word_length rx_word_length;
529 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
531 if (!omap_mcbsp_check_valid_id(id)) {
532 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
535 mcbsp = id_to_mcbsp_ptr(id);
536 io_base = mcbsp->io_base;
537 tx_word_length = mcbsp->tx_word_length;
538 rx_word_length = mcbsp->rx_word_length;
540 if (tx_word_length != rx_word_length)
543 /* First we wait for the transmitter to be ready */
544 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
545 while (!(spcr2 & XRDY)) {
546 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
547 if (attempts++ > 1000) {
548 /* We must reset the transmitter */
549 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
551 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
553 dev_err(mcbsp->dev, "McBSP%d transmitter not "
554 "ready\n", mcbsp->id);
559 /* Now we can push the data */
560 if (tx_word_length > OMAP_MCBSP_WORD_16)
561 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
562 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
564 /* We wait for the receiver to be ready */
565 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
566 while (!(spcr1 & RRDY)) {
567 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
568 if (attempts++ > 1000) {
569 /* We must reset the receiver */
570 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
572 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
574 dev_err(mcbsp->dev, "McBSP%d receiver not "
575 "ready\n", mcbsp->id);
580 /* Receiver is ready, let's read the dummy data */
581 if (rx_word_length > OMAP_MCBSP_WORD_16)
582 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
583 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
587 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
589 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
591 struct omap_mcbsp *mcbsp;
593 void __iomem *io_base;
594 omap_mcbsp_word_length tx_word_length;
595 omap_mcbsp_word_length rx_word_length;
596 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
598 if (!omap_mcbsp_check_valid_id(id)) {
599 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
603 mcbsp = id_to_mcbsp_ptr(id);
604 io_base = mcbsp->io_base;
606 tx_word_length = mcbsp->tx_word_length;
607 rx_word_length = mcbsp->rx_word_length;
609 if (tx_word_length != rx_word_length)
612 /* First we wait for the transmitter to be ready */
613 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
614 while (!(spcr2 & XRDY)) {
615 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
616 if (attempts++ > 1000) {
617 /* We must reset the transmitter */
618 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
620 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
622 dev_err(mcbsp->dev, "McBSP%d transmitter not "
623 "ready\n", mcbsp->id);
628 /* We first need to enable the bus clock */
629 if (tx_word_length > OMAP_MCBSP_WORD_16)
630 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
631 OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
633 /* We wait for the receiver to be ready */
634 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
635 while (!(spcr1 & RRDY)) {
636 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
637 if (attempts++ > 1000) {
638 /* We must reset the receiver */
639 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
641 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
643 dev_err(mcbsp->dev, "McBSP%d receiver not "
644 "ready\n", mcbsp->id);
649 /* Receiver is ready, there is something for us */
650 if (rx_word_length > OMAP_MCBSP_WORD_16)
651 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
652 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
654 word[0] = (word_lsb | (word_msb << 16));
658 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
661 * Simple DMA based buffer rx/tx routines.
662 * Nothing fancy, just a single buffer tx/rx through DMA.
663 * The DMA resources are released once the transfer is done.
664 * For anything fancier, you should use your own customized DMA
665 * routines and callbacks.
667 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
670 struct omap_mcbsp *mcbsp;
676 if (!omap_mcbsp_check_valid_id(id)) {
677 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
680 mcbsp = id_to_mcbsp_ptr(id);
682 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
683 omap_mcbsp_tx_dma_callback,
686 dev_err(mcbsp->dev, " Unable to request DMA channel for "
687 "McBSP%d TX. Trying IRQ based TX\n",
691 mcbsp->dma_tx_lch = dma_tx_ch;
693 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
696 init_completion(&mcbsp->tx_dma_completion);
698 if (cpu_class_is_omap1()) {
699 src_port = OMAP_DMA_PORT_TIPB;
700 dest_port = OMAP_DMA_PORT_EMIFF;
702 if (cpu_class_is_omap2())
703 sync_dev = mcbsp->dma_tx_sync;
705 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
706 OMAP_DMA_DATA_TYPE_S16,
708 OMAP_DMA_SYNC_ELEMENT,
711 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
713 OMAP_DMA_AMODE_CONSTANT,
714 mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
717 omap_set_dma_src_params(mcbsp->dma_tx_lch,
719 OMAP_DMA_AMODE_POST_INC,
723 omap_start_dma(mcbsp->dma_tx_lch);
724 wait_for_completion(&mcbsp->tx_dma_completion);
728 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
730 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
733 struct omap_mcbsp *mcbsp;
739 if (!omap_mcbsp_check_valid_id(id)) {
740 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
743 mcbsp = id_to_mcbsp_ptr(id);
745 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
746 omap_mcbsp_rx_dma_callback,
749 dev_err(mcbsp->dev, "Unable to request DMA channel for "
750 "McBSP%d RX. Trying IRQ based RX\n",
754 mcbsp->dma_rx_lch = dma_rx_ch;
756 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
759 init_completion(&mcbsp->rx_dma_completion);
761 if (cpu_class_is_omap1()) {
762 src_port = OMAP_DMA_PORT_TIPB;
763 dest_port = OMAP_DMA_PORT_EMIFF;
765 if (cpu_class_is_omap2())
766 sync_dev = mcbsp->dma_rx_sync;
768 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
769 OMAP_DMA_DATA_TYPE_S16,
771 OMAP_DMA_SYNC_ELEMENT,
774 omap_set_dma_src_params(mcbsp->dma_rx_lch,
776 OMAP_DMA_AMODE_CONSTANT,
777 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
780 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
782 OMAP_DMA_AMODE_POST_INC,
786 omap_start_dma(mcbsp->dma_rx_lch);
787 wait_for_completion(&mcbsp->rx_dma_completion);
791 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
795 * Since SPI setup is much simpler than the generic McBSP one,
796 * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
797 * Once this is done, you can call omap_mcbsp_start().
799 void omap_mcbsp_set_spi_mode(unsigned int id,
800 const struct omap_mcbsp_spi_cfg *spi_cfg)
802 struct omap_mcbsp *mcbsp;
803 struct omap_mcbsp_reg_cfg mcbsp_cfg;
805 if (!omap_mcbsp_check_valid_id(id)) {
806 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
809 mcbsp = id_to_mcbsp_ptr(id);
811 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
813 /* SPI has only one frame */
814 mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
815 mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
817 /* Clock stop mode */
818 if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
819 mcbsp_cfg.spcr1 |= (1 << 12);
821 mcbsp_cfg.spcr1 |= (3 << 11);
823 /* Set clock parities */
824 if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
825 mcbsp_cfg.pcr0 |= CLKRP;
827 mcbsp_cfg.pcr0 &= ~CLKRP;
829 if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
830 mcbsp_cfg.pcr0 &= ~CLKXP;
832 mcbsp_cfg.pcr0 |= CLKXP;
834 /* Set SCLKME to 0 and CLKSM to 1 */
835 mcbsp_cfg.pcr0 &= ~SCLKME;
836 mcbsp_cfg.srgr2 |= CLKSM;
839 if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
840 mcbsp_cfg.pcr0 &= ~FSXP;
842 mcbsp_cfg.pcr0 |= FSXP;
844 if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
845 mcbsp_cfg.pcr0 |= CLKXM;
846 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
847 mcbsp_cfg.pcr0 |= FSXM;
848 mcbsp_cfg.srgr2 &= ~FSGM;
849 mcbsp_cfg.xcr2 |= XDATDLY(1);
850 mcbsp_cfg.rcr2 |= RDATDLY(1);
852 mcbsp_cfg.pcr0 &= ~CLKXM;
853 mcbsp_cfg.srgr1 |= CLKGDV(1);
854 mcbsp_cfg.pcr0 &= ~FSXM;
855 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
856 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
859 mcbsp_cfg.xcr2 &= ~XPHASE;
860 mcbsp_cfg.rcr2 &= ~RPHASE;
862 omap_mcbsp_config(id, &mcbsp_cfg);
864 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
867 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
868 * 730 has only 2 McBSP, and both of them are MPU peripherals.
870 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
872 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
873 struct omap_mcbsp *mcbsp;
874 int id = pdev->id - 1;
878 dev_err(&pdev->dev, "McBSP device initialized without"
884 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
886 if (id >= omap_mcbsp_count) {
887 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
892 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
897 mcbsp_ptr[id] = mcbsp;
899 spin_lock_init(&mcbsp->lock);
902 mcbsp->dma_tx_lch = -1;
903 mcbsp->dma_rx_lch = -1;
905 mcbsp->phys_base = pdata->phys_base;
906 mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
907 if (!mcbsp->io_base) {
912 /* Default I/O is IRQ based */
913 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
914 mcbsp->tx_irq = pdata->tx_irq;
915 mcbsp->rx_irq = pdata->rx_irq;
916 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
917 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
920 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
921 if (IS_ERR(mcbsp->clk)) {
923 "Invalid clock configuration for McBSP%d.\n",
925 ret = PTR_ERR(mcbsp->clk);
929 mcbsp->pdata = pdata;
930 mcbsp->dev = &pdev->dev;
931 platform_set_drvdata(pdev, mcbsp);
935 iounmap(mcbsp->io_base);
942 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
944 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
946 platform_set_drvdata(pdev, NULL);
949 if (mcbsp->pdata && mcbsp->pdata->ops &&
950 mcbsp->pdata->ops->free)
951 mcbsp->pdata->ops->free(mcbsp->id);
953 clk_disable(mcbsp->clk);
956 iounmap(mcbsp->io_base);
966 static struct platform_driver omap_mcbsp_driver = {
967 .probe = omap_mcbsp_probe,
968 .remove = __devexit_p(omap_mcbsp_remove),
970 .name = "omap-mcbsp",
974 int __init omap_mcbsp_init(void)
976 /* Register the McBSP driver */
977 return platform_driver_register(&omap_mcbsp_driver);