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Build fixes for McBSP wakeups
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1 /*
2  * linux/arch/arm/plat-omap/mcbsp.c
3  *
4  * Copyright (C) 2004 Nokia Corporation
5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
6  *
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Multichannel mode not supported.
13  */
14
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
25 #include <linux/io.h>
26
27 #include <mach/dma.h>
28 #include <mach/mcbsp.h>
29
30 struct omap_mcbsp **mcbsp_ptr;
31 int omap_mcbsp_count;
32
33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
34 {
35         if (cpu_class_is_omap1() || cpu_is_omap2420())
36                 __raw_writew((u16)val, io_base + reg);
37         else
38                 __raw_writel(val, io_base + reg);
39 }
40
41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
42 {
43         if (cpu_class_is_omap1() || cpu_is_omap2420())
44                 return __raw_readw(io_base + reg);
45         else
46                 return __raw_readl(io_base + reg);
47 }
48
49 #define OMAP_MCBSP_READ(base, reg) \
50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51 #define OMAP_MCBSP_WRITE(base, reg, val) \
52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
53
54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
56
57 static void omap_mcbsp_dump_reg(u8 id)
58 {
59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
60
61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88         dev_dbg(mcbsp->dev, "***********************\n");
89 }
90
91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
92 {
93         struct omap_mcbsp *mcbsp_tx = dev_id;
94
95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
97
98         complete(&mcbsp_tx->tx_irq_completion);
99
100         return IRQ_HANDLED;
101 }
102
103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
104 {
105         struct omap_mcbsp *mcbsp_rx = dev_id;
106
107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
109
110         complete(&mcbsp_rx->rx_irq_completion);
111
112         return IRQ_HANDLED;
113 }
114
115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
116 {
117         struct omap_mcbsp *mcbsp_dma_tx = data;
118
119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
121
122         /* We can free the channels */
123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
124         mcbsp_dma_tx->dma_tx_lch = -1;
125
126         complete(&mcbsp_dma_tx->tx_dma_completion);
127 }
128
129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
130 {
131         struct omap_mcbsp *mcbsp_dma_rx = data;
132
133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
135
136         /* We can free the channels */
137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
138         mcbsp_dma_rx->dma_rx_lch = -1;
139
140         complete(&mcbsp_dma_rx->rx_dma_completion);
141 }
142
143 /*
144  * omap_mcbsp_config simply write a config to the
145  * appropriate McBSP.
146  * You either call this function or set the McBSP registers
147  * by yourself before calling omap_mcbsp_start().
148  */
149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
150 {
151         struct omap_mcbsp *mcbsp;
152         void __iomem *io_base;
153
154         if (!omap_mcbsp_check_valid_id(id)) {
155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
156                 return;
157         }
158         mcbsp = id_to_mcbsp_ptr(id);
159
160         io_base = mcbsp->io_base;
161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
162                         mcbsp->id, mcbsp->phys_base);
163
164         /* We write the given config */
165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
176         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
177                 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
178                 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
179         }
180 }
181 EXPORT_SYMBOL(omap_mcbsp_config);
182
183 /*
184  * We can choose between IRQ based or polled IO.
185  * This needs to be called before omap_mcbsp_request().
186  */
187 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
188 {
189         struct omap_mcbsp *mcbsp;
190
191         if (!omap_mcbsp_check_valid_id(id)) {
192                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
193                 return -ENODEV;
194         }
195         mcbsp = id_to_mcbsp_ptr(id);
196
197         spin_lock(&mcbsp->lock);
198
199         if (!mcbsp->free) {
200                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
201                         mcbsp->id);
202                 spin_unlock(&mcbsp->lock);
203                 return -EINVAL;
204         }
205
206         mcbsp->io_type = io_type;
207
208         spin_unlock(&mcbsp->lock);
209
210         return 0;
211 }
212 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
213
214 int omap_mcbsp_request(unsigned int id)
215 {
216         struct omap_mcbsp *mcbsp;
217         int i;
218         int err;
219
220         if (!omap_mcbsp_check_valid_id(id)) {
221                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
222                 return -ENODEV;
223         }
224         mcbsp = id_to_mcbsp_ptr(id);
225
226         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
227                 mcbsp->pdata->ops->request(id);
228
229         for (i = 0; i < mcbsp->num_clks; i++)
230                 clk_enable(mcbsp->clks[i]);
231
232         spin_lock(&mcbsp->lock);
233         if (!mcbsp->free) {
234                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
235                         mcbsp->id);
236                 spin_unlock(&mcbsp->lock);
237                 return -1;
238         }
239
240         mcbsp->free = 0;
241         spin_unlock(&mcbsp->lock);
242
243         /*
244          * Enable wakup behavior, smart idle and all wakeups
245          * REVISIT: some wakeups may be unnecessary
246          */
247         if (cpu_is_omap34xx()) {
248                 u16 w;
249
250                 w = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
251                 w &= ~(ENAWAKEUP | SIDLEMODE(0x03));
252                 w |= (ENAWAKEUP | SIDLEMODE(0x02));
253                 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, w);
254
255                 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, WAKEUPEN_ALL);
256         }
257
258         /*
259          * Make sure that transmitter, receiver and sample-rate generator are
260          * not running before activating IRQs.
261          */
262         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
263         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
264
265         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
266                 /* We need to get IRQs here */
267                 init_completion(&mcbsp->tx_irq_completion);
268                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
269                                         0, "McBSP", (void *)mcbsp);
270                 if (err != 0) {
271                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
272                                         "for McBSP%d\n", mcbsp->tx_irq,
273                                         mcbsp->id);
274                         return err;
275                 }
276
277                 init_completion(&mcbsp->rx_irq_completion);
278                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
279                                         0, "McBSP", (void *)mcbsp);
280                 if (err != 0) {
281                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
282                                         "for McBSP%d\n", mcbsp->rx_irq,
283                                         mcbsp->id);
284                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
285                         return err;
286                 }
287         }
288
289         return 0;
290 }
291 EXPORT_SYMBOL(omap_mcbsp_request);
292
293 void omap_mcbsp_free(unsigned int id)
294 {
295         struct omap_mcbsp *mcbsp;
296         int i;
297
298         if (!omap_mcbsp_check_valid_id(id)) {
299                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
300                 return;
301         }
302         mcbsp = id_to_mcbsp_ptr(id);
303
304         /*
305          * Disable wakup behavior, smart idle and all wakeups
306          */
307         if (cpu_is_omap34xx()) {
308                 u16 w;
309
310                 w = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
311                 w &= ~(ENAWAKEUP | SIDLEMODE(0x03));
312                 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, w);
313
314                 w = OMAP_MCBSP_READ(mcbsp->io_base, WAKEUPEN);
315                 w &= ~WAKEUPEN_ALL;
316                 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, w);
317         }
318
319         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
320                 mcbsp->pdata->ops->free(id);
321
322         for (i = mcbsp->num_clks - 1; i >= 0; i--)
323                 clk_disable(mcbsp->clks[i]);
324
325         spin_lock(&mcbsp->lock);
326         if (mcbsp->free) {
327                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
328                         mcbsp->id);
329                 spin_unlock(&mcbsp->lock);
330                 return;
331         }
332
333         mcbsp->free = 1;
334         spin_unlock(&mcbsp->lock);
335
336         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
337                 /* Free IRQs */
338                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
339                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
340         }
341 }
342 EXPORT_SYMBOL(omap_mcbsp_free);
343
344 /*
345  * Here we start the McBSP, by enabling the sample
346  * generator, both transmitter and receivers,
347  * and the frame sync.
348  */
349 void omap_mcbsp_start(unsigned int id)
350 {
351         struct omap_mcbsp *mcbsp;
352         void __iomem *io_base;
353         u16 w;
354
355         if (!omap_mcbsp_check_valid_id(id)) {
356                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
357                 return;
358         }
359         mcbsp = id_to_mcbsp_ptr(id);
360         io_base = mcbsp->io_base;
361
362         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
363         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
364
365         /* Start the sample generator */
366         w = OMAP_MCBSP_READ(io_base, SPCR2);
367         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
368
369         /* Enable transmitter and receiver */
370         w = OMAP_MCBSP_READ(io_base, SPCR2);
371         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
372
373         w = OMAP_MCBSP_READ(io_base, SPCR1);
374         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
375
376         udelay(100);
377
378         /* Start frame sync */
379         w = OMAP_MCBSP_READ(io_base, SPCR2);
380         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
381
382         /* Dump McBSP Regs */
383         omap_mcbsp_dump_reg(id);
384 }
385 EXPORT_SYMBOL(omap_mcbsp_start);
386
387 void omap_mcbsp_stop(unsigned int id)
388 {
389         struct omap_mcbsp *mcbsp;
390         void __iomem *io_base;
391         u16 w;
392
393         if (!omap_mcbsp_check_valid_id(id)) {
394                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
395                 return;
396         }
397
398         mcbsp = id_to_mcbsp_ptr(id);
399         io_base = mcbsp->io_base;
400
401         /* Reset transmitter */
402         w = OMAP_MCBSP_READ(io_base, SPCR2);
403         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
404
405         /* Reset receiver */
406         w = OMAP_MCBSP_READ(io_base, SPCR1);
407         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
408
409         /* Reset the sample rate generator */
410         w = OMAP_MCBSP_READ(io_base, SPCR2);
411         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
412 }
413 EXPORT_SYMBOL(omap_mcbsp_stop);
414
415 /* polled mcbsp i/o operations */
416 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
417 {
418         struct omap_mcbsp *mcbsp;
419         void __iomem *base;
420
421         if (!omap_mcbsp_check_valid_id(id)) {
422                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
423                 return -ENODEV;
424         }
425
426         mcbsp = id_to_mcbsp_ptr(id);
427         base = mcbsp->io_base;
428
429         writew(buf, base + OMAP_MCBSP_REG_DXR1);
430         /* if frame sync error - clear the error */
431         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
432                 /* clear error */
433                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
434                        base + OMAP_MCBSP_REG_SPCR2);
435                 /* resend */
436                 return -1;
437         } else {
438                 /* wait for transmit confirmation */
439                 int attemps = 0;
440                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
441                         if (attemps++ > 1000) {
442                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
443                                        (~XRST),
444                                        base + OMAP_MCBSP_REG_SPCR2);
445                                 udelay(10);
446                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
447                                        (XRST),
448                                        base + OMAP_MCBSP_REG_SPCR2);
449                                 udelay(10);
450                                 dev_err(mcbsp->dev, "Could not write to"
451                                         " McBSP%d Register\n", mcbsp->id);
452                                 return -2;
453                         }
454                 }
455         }
456
457         return 0;
458 }
459 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
460
461 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
462 {
463         struct omap_mcbsp *mcbsp;
464         void __iomem *base;
465
466         if (!omap_mcbsp_check_valid_id(id)) {
467                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
468                 return -ENODEV;
469         }
470         mcbsp = id_to_mcbsp_ptr(id);
471
472         base = mcbsp->io_base;
473         /* if frame sync error - clear the error */
474         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
475                 /* clear error */
476                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
477                        base + OMAP_MCBSP_REG_SPCR1);
478                 /* resend */
479                 return -1;
480         } else {
481                 /* wait for recieve confirmation */
482                 int attemps = 0;
483                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
484                         if (attemps++ > 1000) {
485                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
486                                        (~RRST),
487                                        base + OMAP_MCBSP_REG_SPCR1);
488                                 udelay(10);
489                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
490                                        (RRST),
491                                        base + OMAP_MCBSP_REG_SPCR1);
492                                 udelay(10);
493                                 dev_err(mcbsp->dev, "Could not read from"
494                                         " McBSP%d Register\n", mcbsp->id);
495                                 return -2;
496                         }
497                 }
498         }
499         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
500
501         return 0;
502 }
503 EXPORT_SYMBOL(omap_mcbsp_pollread);
504
505 /*
506  * IRQ based word transmission.
507  */
508 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
509 {
510         struct omap_mcbsp *mcbsp;
511         void __iomem *io_base;
512         omap_mcbsp_word_length word_length;
513
514         if (!omap_mcbsp_check_valid_id(id)) {
515                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
516                 return;
517         }
518
519         mcbsp = id_to_mcbsp_ptr(id);
520         io_base = mcbsp->io_base;
521         word_length = mcbsp->tx_word_length;
522
523         wait_for_completion(&mcbsp->tx_irq_completion);
524
525         if (word_length > OMAP_MCBSP_WORD_16)
526                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
527         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
528 }
529 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
530
531 u32 omap_mcbsp_recv_word(unsigned int id)
532 {
533         struct omap_mcbsp *mcbsp;
534         void __iomem *io_base;
535         u16 word_lsb, word_msb = 0;
536         omap_mcbsp_word_length word_length;
537
538         if (!omap_mcbsp_check_valid_id(id)) {
539                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
540                 return -ENODEV;
541         }
542         mcbsp = id_to_mcbsp_ptr(id);
543
544         word_length = mcbsp->rx_word_length;
545         io_base = mcbsp->io_base;
546
547         wait_for_completion(&mcbsp->rx_irq_completion);
548
549         if (word_length > OMAP_MCBSP_WORD_16)
550                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
551         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
552
553         return (word_lsb | (word_msb << 16));
554 }
555 EXPORT_SYMBOL(omap_mcbsp_recv_word);
556
557 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
558 {
559         struct omap_mcbsp *mcbsp;
560         void __iomem *io_base;
561         omap_mcbsp_word_length tx_word_length;
562         omap_mcbsp_word_length rx_word_length;
563         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
564
565         if (!omap_mcbsp_check_valid_id(id)) {
566                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
567                 return -ENODEV;
568         }
569         mcbsp = id_to_mcbsp_ptr(id);
570         io_base = mcbsp->io_base;
571         tx_word_length = mcbsp->tx_word_length;
572         rx_word_length = mcbsp->rx_word_length;
573
574         if (tx_word_length != rx_word_length)
575                 return -EINVAL;
576
577         /* First we wait for the transmitter to be ready */
578         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
579         while (!(spcr2 & XRDY)) {
580                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
581                 if (attempts++ > 1000) {
582                         /* We must reset the transmitter */
583                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
584                         udelay(10);
585                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
586                         udelay(10);
587                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
588                                 "ready\n", mcbsp->id);
589                         return -EAGAIN;
590                 }
591         }
592
593         /* Now we can push the data */
594         if (tx_word_length > OMAP_MCBSP_WORD_16)
595                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
596         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
597
598         /* We wait for the receiver to be ready */
599         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
600         while (!(spcr1 & RRDY)) {
601                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
602                 if (attempts++ > 1000) {
603                         /* We must reset the receiver */
604                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
605                         udelay(10);
606                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
607                         udelay(10);
608                         dev_err(mcbsp->dev, "McBSP%d receiver not "
609                                 "ready\n", mcbsp->id);
610                         return -EAGAIN;
611                 }
612         }
613
614         /* Receiver is ready, let's read the dummy data */
615         if (rx_word_length > OMAP_MCBSP_WORD_16)
616                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
617         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
618
619         return 0;
620 }
621 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
622
623 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
624 {
625         struct omap_mcbsp *mcbsp;
626         u32 clock_word = 0;
627         void __iomem *io_base;
628         omap_mcbsp_word_length tx_word_length;
629         omap_mcbsp_word_length rx_word_length;
630         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
631
632         if (!omap_mcbsp_check_valid_id(id)) {
633                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
634                 return -ENODEV;
635         }
636
637         mcbsp = id_to_mcbsp_ptr(id);
638         io_base = mcbsp->io_base;
639
640         tx_word_length = mcbsp->tx_word_length;
641         rx_word_length = mcbsp->rx_word_length;
642
643         if (tx_word_length != rx_word_length)
644                 return -EINVAL;
645
646         /* First we wait for the transmitter to be ready */
647         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
648         while (!(spcr2 & XRDY)) {
649                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
650                 if (attempts++ > 1000) {
651                         /* We must reset the transmitter */
652                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
653                         udelay(10);
654                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
655                         udelay(10);
656                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
657                                 "ready\n", mcbsp->id);
658                         return -EAGAIN;
659                 }
660         }
661
662         /* We first need to enable the bus clock */
663         if (tx_word_length > OMAP_MCBSP_WORD_16)
664                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
665         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
666
667         /* We wait for the receiver to be ready */
668         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
669         while (!(spcr1 & RRDY)) {
670                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
671                 if (attempts++ > 1000) {
672                         /* We must reset the receiver */
673                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
674                         udelay(10);
675                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
676                         udelay(10);
677                         dev_err(mcbsp->dev, "McBSP%d receiver not "
678                                 "ready\n", mcbsp->id);
679                         return -EAGAIN;
680                 }
681         }
682
683         /* Receiver is ready, there is something for us */
684         if (rx_word_length > OMAP_MCBSP_WORD_16)
685                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
686         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
687
688         word[0] = (word_lsb | (word_msb << 16));
689
690         return 0;
691 }
692 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
693
694 /*
695  * Simple DMA based buffer rx/tx routines.
696  * Nothing fancy, just a single buffer tx/rx through DMA.
697  * The DMA resources are released once the transfer is done.
698  * For anything fancier, you should use your own customized DMA
699  * routines and callbacks.
700  */
701 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
702                                 unsigned int length)
703 {
704         struct omap_mcbsp *mcbsp;
705         int dma_tx_ch;
706         int src_port = 0;
707         int dest_port = 0;
708         int sync_dev = 0;
709
710         if (!omap_mcbsp_check_valid_id(id)) {
711                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
712                 return -ENODEV;
713         }
714         mcbsp = id_to_mcbsp_ptr(id);
715
716         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
717                                 omap_mcbsp_tx_dma_callback,
718                                 mcbsp,
719                                 &dma_tx_ch)) {
720                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
721                                 "McBSP%d TX. Trying IRQ based TX\n",
722                                 mcbsp->id);
723                 return -EAGAIN;
724         }
725         mcbsp->dma_tx_lch = dma_tx_ch;
726
727         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
728                 dma_tx_ch);
729
730         init_completion(&mcbsp->tx_dma_completion);
731
732         if (cpu_class_is_omap1()) {
733                 src_port = OMAP_DMA_PORT_TIPB;
734                 dest_port = OMAP_DMA_PORT_EMIFF;
735         }
736         if (cpu_class_is_omap2())
737                 sync_dev = mcbsp->dma_tx_sync;
738
739         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
740                                      OMAP_DMA_DATA_TYPE_S16,
741                                      length >> 1, 1,
742                                      OMAP_DMA_SYNC_ELEMENT,
743          sync_dev, 0);
744
745         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
746                                  src_port,
747                                  OMAP_DMA_AMODE_CONSTANT,
748                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
749                                  0, 0);
750
751         omap_set_dma_src_params(mcbsp->dma_tx_lch,
752                                 dest_port,
753                                 OMAP_DMA_AMODE_POST_INC,
754                                 buffer,
755                                 0, 0);
756
757         omap_start_dma(mcbsp->dma_tx_lch);
758         wait_for_completion(&mcbsp->tx_dma_completion);
759
760         return 0;
761 }
762 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
763
764 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
765                                 unsigned int length)
766 {
767         struct omap_mcbsp *mcbsp;
768         int dma_rx_ch;
769         int src_port = 0;
770         int dest_port = 0;
771         int sync_dev = 0;
772
773         if (!omap_mcbsp_check_valid_id(id)) {
774                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
775                 return -ENODEV;
776         }
777         mcbsp = id_to_mcbsp_ptr(id);
778
779         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
780                                 omap_mcbsp_rx_dma_callback,
781                                 mcbsp,
782                                 &dma_rx_ch)) {
783                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
784                                 "McBSP%d RX. Trying IRQ based RX\n",
785                                 mcbsp->id);
786                 return -EAGAIN;
787         }
788         mcbsp->dma_rx_lch = dma_rx_ch;
789
790         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
791                 dma_rx_ch);
792
793         init_completion(&mcbsp->rx_dma_completion);
794
795         if (cpu_class_is_omap1()) {
796                 src_port = OMAP_DMA_PORT_TIPB;
797                 dest_port = OMAP_DMA_PORT_EMIFF;
798         }
799         if (cpu_class_is_omap2())
800                 sync_dev = mcbsp->dma_rx_sync;
801
802         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
803                                         OMAP_DMA_DATA_TYPE_S16,
804                                         length >> 1, 1,
805                                         OMAP_DMA_SYNC_ELEMENT,
806                                         sync_dev, 0);
807
808         omap_set_dma_src_params(mcbsp->dma_rx_lch,
809                                 src_port,
810                                 OMAP_DMA_AMODE_CONSTANT,
811                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
812                                 0, 0);
813
814         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
815                                         dest_port,
816                                         OMAP_DMA_AMODE_POST_INC,
817                                         buffer,
818                                         0, 0);
819
820         omap_start_dma(mcbsp->dma_rx_lch);
821         wait_for_completion(&mcbsp->rx_dma_completion);
822
823         return 0;
824 }
825 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
826
827 /*
828  * SPI wrapper.
829  * Since SPI setup is much simpler than the generic McBSP one,
830  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
831  * Once this is done, you can call omap_mcbsp_start().
832  */
833 void omap_mcbsp_set_spi_mode(unsigned int id,
834                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
835 {
836         struct omap_mcbsp *mcbsp;
837         struct omap_mcbsp_reg_cfg mcbsp_cfg;
838
839         if (!omap_mcbsp_check_valid_id(id)) {
840                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
841                 return;
842         }
843         mcbsp = id_to_mcbsp_ptr(id);
844
845         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
846
847         /* SPI has only one frame */
848         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
849         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
850
851         /* Clock stop mode */
852         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
853                 mcbsp_cfg.spcr1 |= (1 << 12);
854         else
855                 mcbsp_cfg.spcr1 |= (3 << 11);
856
857         /* Set clock parities */
858         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
859                 mcbsp_cfg.pcr0 |= CLKRP;
860         else
861                 mcbsp_cfg.pcr0 &= ~CLKRP;
862
863         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
864                 mcbsp_cfg.pcr0 &= ~CLKXP;
865         else
866                 mcbsp_cfg.pcr0 |= CLKXP;
867
868         /* Set SCLKME to 0 and CLKSM to 1 */
869         mcbsp_cfg.pcr0 &= ~SCLKME;
870         mcbsp_cfg.srgr2 |= CLKSM;
871
872         /* Set FSXP */
873         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
874                 mcbsp_cfg.pcr0 &= ~FSXP;
875         else
876                 mcbsp_cfg.pcr0 |= FSXP;
877
878         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
879                 mcbsp_cfg.pcr0 |= CLKXM;
880                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
881                 mcbsp_cfg.pcr0 |= FSXM;
882                 mcbsp_cfg.srgr2 &= ~FSGM;
883                 mcbsp_cfg.xcr2 |= XDATDLY(1);
884                 mcbsp_cfg.rcr2 |= RDATDLY(1);
885         } else {
886                 mcbsp_cfg.pcr0 &= ~CLKXM;
887                 mcbsp_cfg.srgr1 |= CLKGDV(1);
888                 mcbsp_cfg.pcr0 &= ~FSXM;
889                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
890                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
891         }
892
893         mcbsp_cfg.xcr2 &= ~XPHASE;
894         mcbsp_cfg.rcr2 &= ~RPHASE;
895
896         omap_mcbsp_config(id, &mcbsp_cfg);
897 }
898 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
899
900 /*
901  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
902  * 730 has only 2 McBSP, and both of them are MPU peripherals.
903  */
904 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
905 {
906         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
907         struct omap_mcbsp *mcbsp;
908         int id = pdev->id - 1;
909         int i;
910         int ret = 0;
911
912         if (!pdata) {
913                 dev_err(&pdev->dev, "McBSP device initialized without"
914                                 "platform data\n");
915                 ret = -EINVAL;
916                 goto exit;
917         }
918
919         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
920
921         if (id >= omap_mcbsp_count) {
922                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
923                 ret = -EINVAL;
924                 goto exit;
925         }
926
927         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
928         if (!mcbsp) {
929                 ret = -ENOMEM;
930                 goto exit;
931         }
932         mcbsp_ptr[id] = mcbsp;
933
934         spin_lock_init(&mcbsp->lock);
935         mcbsp->id = id + 1;
936         mcbsp->free = 1;
937         mcbsp->dma_tx_lch = -1;
938         mcbsp->dma_rx_lch = -1;
939
940         mcbsp->phys_base = pdata->phys_base;
941         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
942         if (!mcbsp->io_base) {
943                 ret = -ENOMEM;
944                 goto err_ioremap;
945         }
946
947         /* Default I/O is IRQ based */
948         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
949         mcbsp->tx_irq = pdata->tx_irq;
950         mcbsp->rx_irq = pdata->rx_irq;
951         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
952         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
953
954         if (pdata->num_clks) {
955                 mcbsp->num_clks = pdata->num_clks;
956                 mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
957                                         GFP_KERNEL);
958                 if (!mcbsp->clks) {
959                         ret = -ENOMEM;
960                         goto exit;
961                 }
962                 for (i = 0; i < mcbsp->num_clks; i++) {
963                         mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
964                         if (IS_ERR(mcbsp->clks[i])) {
965                                 dev_err(&pdev->dev,
966                                         "Invalid %s configuration for McBSP%d.\n",
967                                         pdata->clk_names[i], mcbsp->id);
968                                 ret = PTR_ERR(mcbsp->clks[i]);
969                                 goto err_clk;
970                         }
971                 }
972
973         }
974
975         mcbsp->pdata = pdata;
976         mcbsp->dev = &pdev->dev;
977         platform_set_drvdata(pdev, mcbsp);
978         return 0;
979
980 err_clk:
981         while (i--)
982                 clk_put(mcbsp->clks[i]);
983         kfree(mcbsp->clks);
984         iounmap(mcbsp->io_base);
985 err_ioremap:
986         mcbsp->free = 0;
987 exit:
988         return ret;
989 }
990
991 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
992 {
993         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
994         int i;
995
996         platform_set_drvdata(pdev, NULL);
997         if (mcbsp) {
998
999                 if (mcbsp->pdata && mcbsp->pdata->ops &&
1000                                 mcbsp->pdata->ops->free)
1001                         mcbsp->pdata->ops->free(mcbsp->id);
1002
1003                 for (i = mcbsp->num_clks - 1; i >= 0; i--) {
1004                         clk_disable(mcbsp->clks[i]);
1005                         clk_put(mcbsp->clks[i]);
1006                 }
1007
1008                 iounmap(mcbsp->io_base);
1009
1010                 if (mcbsp->num_clks) {
1011                         kfree(mcbsp->clks);
1012                         mcbsp->clks = NULL;
1013                         mcbsp->num_clks = 0;
1014                 }
1015                 mcbsp->free = 0;
1016                 mcbsp->dev = NULL;
1017         }
1018
1019         return 0;
1020 }
1021
1022 static struct platform_driver omap_mcbsp_driver = {
1023         .probe          = omap_mcbsp_probe,
1024         .remove         = __devexit_p(omap_mcbsp_remove),
1025         .driver         = {
1026                 .name   = "omap-mcbsp",
1027         },
1028 };
1029
1030 int __init omap_mcbsp_init(void)
1031 {
1032         /* Register the McBSP driver */
1033         return platform_driver_register(&omap_mcbsp_driver);
1034 }
1035