arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26 #include <linux/irq.h>
  27
  28 #include <asm/arch/dma.h>
  29 #include <asm/arch/mcbsp.h>
  30
  31 static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
  32
  33 #define omap_mcbsp_check_valid_id(id)   (mcbsp[id].pdata && \
  34                                         mcbsp[id].pdata->ops && \
  35                                         mcbsp[id].pdata->ops->check && \
  36                                         (mcbsp[id].pdata->ops->check(id) == 0))
  37
  38 static void omap_mcbsp_dump_reg(u8 id)
  39 {
  40         dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id);
  41         dev_dbg(mcbsp[id].dev, "DRR2:  0x%04x\n",
  42                         OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2));
  43         dev_dbg(mcbsp[id].dev, "DRR1:  0x%04x\n",
  44                         OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1));
  45         dev_dbg(mcbsp[id].dev, "DXR2:  0x%04x\n",
  46                         OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2));
  47         dev_dbg(mcbsp[id].dev, "DXR1:  0x%04x\n",
  48                         OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1));
  49         dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n",
  50                         OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2));
  51         dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n",
  52                         OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1));
  53         dev_dbg(mcbsp[id].dev, "RCR2:  0x%04x\n",
  54                         OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2));
  55         dev_dbg(mcbsp[id].dev, "RCR1:  0x%04x\n",
  56                         OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1));
  57         dev_dbg(mcbsp[id].dev, "XCR2:  0x%04x\n",
  58                         OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2));
  59         dev_dbg(mcbsp[id].dev, "XCR1:  0x%04x\n",
  60                         OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1));
  61         dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n",
  62                         OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2));
  63         dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n",
  64                         OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1));
  65         dev_dbg(mcbsp[id].dev, "PCR0:  0x%04x\n",
  66                         OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0));
  67         dev_dbg(mcbsp[id].dev, "***********************\n");
  68 }
  69
  70 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  71 {
  72         struct omap_mcbsp *mcbsp_tx = dev_id;
  73
  74         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
  75                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
  76
  77         complete(&mcbsp_tx->tx_irq_completion);
  78
  79         return IRQ_HANDLED;
  80 }
  81
  82 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
  83 {
  84         struct omap_mcbsp *mcbsp_rx = dev_id;
  85
  86         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
  87                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
  88
  89         complete(&mcbsp_rx->rx_irq_completion);
  90
  91         return IRQ_HANDLED;
  92 }
  93
  94 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
  95 {
  96         struct omap_mcbsp *mcbsp_dma_tx = data;
  97
  98         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
  99                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 100
 101         /* We can free the channels */
 102         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 103         mcbsp_dma_tx->dma_tx_lch = -1;
 104
 105         complete(&mcbsp_dma_tx->tx_dma_completion);
 106 }
 107
 108 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 109 {
 110         struct omap_mcbsp *mcbsp_dma_rx = data;
 111
 112         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 113                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 114
 115         /* We can free the channels */
 116         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 117         mcbsp_dma_rx->dma_rx_lch = -1;
 118
 119         complete(&mcbsp_dma_rx->rx_dma_completion);
 120 }
 121
 122 /*
 123  * omap_mcbsp_config simply write a config to the
 124  * appropriate McBSP.
 125  * You either call this function or set the McBSP registers
 126  * by yourself before calling omap_mcbsp_start().
 127  */
 128 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 129 {
 130         u32 io_base;
 131
 132         if (!omap_mcbsp_check_valid_id(id)) {
 133                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 134                 return;
 135         }
 136
 137         io_base = mcbsp[id].io_base;
 138         dev_dbg(mcbsp[id].dev, "Configuring McBSP%d  io_base: 0x%8x\n",
 139                         mcbsp[id].id, io_base);
 140
 141         /* We write the given config */
 142         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 143         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 144         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 145         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 146         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 147         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 148         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 149         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 150         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 151         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 152         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 153 }
 154 EXPORT_SYMBOL(omap_mcbsp_config);
 155
 156 /*
 157  * We can choose between IRQ based or polled IO.
 158  * This needs to be called before omap_mcbsp_request().
 159  */
 160 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 161 {
 162         if (!omap_mcbsp_check_valid_id(id)) {
 163                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 164                 return -ENODEV;
 165         }
 166
 167         spin_lock(&mcbsp[id].lock);
 168
 169         if (!mcbsp[id].free) {
 170                 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n",
 171                         mcbsp[id].id);
 172                 spin_unlock(&mcbsp[id].lock);
 173                 return -EINVAL;
 174         }
 175
 176         mcbsp[id].io_type = io_type;
 177
 178         spin_unlock(&mcbsp[id].lock);
 179
 180         return 0;
 181 }
 182 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 183
 184 int omap_mcbsp_request(unsigned int id)
 185 {
 186         int err;
 187
 188         if (!omap_mcbsp_check_valid_id(id)) {
 189                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 190                 return -ENODEV;
 191         }
 192
 193         if (mcbsp[id].pdata->ops->request)
 194                 mcbsp[id].pdata->ops->request(id);
 195
 196         clk_enable(mcbsp[id].clk);
 197
 198         spin_lock(&mcbsp[id].lock);
 199         if (!mcbsp[id].free) {
 200                 dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n",
 201                         mcbsp[id].id);
 202                 spin_unlock(&mcbsp[id].lock);
 203                 return -1;
 204         }
 205
 206         mcbsp[id].free = 0;
 207         spin_unlock(&mcbsp[id].lock);
 208
 209         if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) {
 210                 /* We need to get IRQs here */
 211                 err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler,
 212                                         0, "McBSP", (void *) (&mcbsp[id]));
 213                 if (err != 0) {
 214                         dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d "
 215                                         "for McBSP%d\n", mcbsp[id].tx_irq,
 216                                         mcbsp[id].id);
 217                         return err;
 218                 }
 219
 220                 init_completion(&(mcbsp[id].tx_irq_completion));
 221
 222                 err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler,
 223                                         0, "McBSP", (void *) (&mcbsp[id]));
 224                 if (err != 0) {
 225                         dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d "
 226                                         "for McBSP%d\n", mcbsp[id].rx_irq,
 227                                         mcbsp[id].id);
 228                         free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
 229                         return err;
 230                 }
 231
 232                 init_completion(&(mcbsp[id].rx_irq_completion));
 233         }
 234
 235         return 0;
 236 }
 237 EXPORT_SYMBOL(omap_mcbsp_request);
 238
 239 void omap_mcbsp_free(unsigned int id)
 240 {
 241         if (!omap_mcbsp_check_valid_id(id)) {
 242                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 243                 return;
 244         }
 245
 246         if (mcbsp[id].pdata->ops->free)
 247                 mcbsp[id].pdata->ops->free(id);
 248
 249         clk_disable(mcbsp[id].clk);
 250
 251         spin_lock(&mcbsp[id].lock);
 252         if (mcbsp[id].free) {
 253                 dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n",
 254                         mcbsp[id].id);
 255                 spin_unlock(&mcbsp[id].lock);
 256                 return;
 257         }
 258
 259         mcbsp[id].free = 1;
 260         spin_unlock(&mcbsp[id].lock);
 261
 262         if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) {
 263                 /* Free IRQs */
 264                 free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id]));
 265                 free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
 266         }
 267 }
 268 EXPORT_SYMBOL(omap_mcbsp_free);
 269
 270 /*
 271  * Here we start the McBSP, by enabling the sample
 272  * generator, both transmitter and receivers,
 273  * and the frame sync.
 274  */
 275 void omap_mcbsp_start(unsigned int id)
 276 {
 277         u32 io_base;
 278         u16 w;
 279
 280         if (!omap_mcbsp_check_valid_id(id)) {
 281                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 282                 return;
 283         }
 284
 285         io_base = mcbsp[id].io_base;
 286
 287         mcbsp[id].rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 288         mcbsp[id].tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 289
 290         /* Start the sample generator */
 291         w = OMAP_MCBSP_READ(io_base, SPCR2);
 292         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 293
 294         /* Enable transmitter and receiver */
 295         w = OMAP_MCBSP_READ(io_base, SPCR2);
 296         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
 297
 298         w = OMAP_MCBSP_READ(io_base, SPCR1);
 299         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
 300
 301         udelay(100);
 302
 303         /* Start frame sync */
 304         w = OMAP_MCBSP_READ(io_base, SPCR2);
 305         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 306
 307         /* Dump McBSP Regs */
 308         omap_mcbsp_dump_reg(id);
 309 }
 310 EXPORT_SYMBOL(omap_mcbsp_start);
 311
 312 void omap_mcbsp_stop(unsigned int id)
 313 {
 314         u32 io_base;
 315         u16 w;
 316
 317         if (!omap_mcbsp_check_valid_id(id)) {
 318                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 319                 return;
 320         }
 321
 322         io_base = mcbsp[id].io_base;
 323
 324         /* Reset transmitter */
 325         w = OMAP_MCBSP_READ(io_base, SPCR2);
 326         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
 327
 328         /* Reset receiver */
 329         w = OMAP_MCBSP_READ(io_base, SPCR1);
 330         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
 331
 332         /* Reset the sample rate generator */
 333         w = OMAP_MCBSP_READ(io_base, SPCR2);
 334         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 335 }
 336 EXPORT_SYMBOL(omap_mcbsp_stop);
 337
 338 /* polled mcbsp i/o operations */
 339 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 340 {
 341         u32 base;
 342
 343         if (!omap_mcbsp_check_valid_id(id)) {
 344                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 345                 return -ENODEV;
 346         }
 347
 348         base = mcbsp[id].io_base;
 349         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 350         /* if frame sync error - clear the error */
 351         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 352                 /* clear error */
 353                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 354                        base + OMAP_MCBSP_REG_SPCR2);
 355                 /* resend */
 356                 return -1;
 357         } else {
 358                 /* wait for transmit confirmation */
 359                 int attemps = 0;
 360                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 361                         if (attemps++ > 1000) {
 362                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 363                                        (~XRST),
 364                                        base + OMAP_MCBSP_REG_SPCR2);
 365                                 udelay(10);
 366                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 367                                        (XRST),
 368                                        base + OMAP_MCBSP_REG_SPCR2);
 369                                 udelay(10);
 370                                 dev_err(mcbsp[id].dev, "Could not write to"
 371                                         " McBSP%d Register\n", mcbsp[id].id);
 372                                 return -2;
 373                         }
 374                 }
 375         }
 376
 377         return 0;
 378 }
 379 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 380
 381 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 382 {
 383         u32 base;
 384
 385         if (!omap_mcbsp_check_valid_id(id)) {
 386                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 387                 return -ENODEV;
 388         }
 389
 390         base = mcbsp[id].io_base;
 391         /* if frame sync error - clear the error */
 392         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 393                 /* clear error */
 394                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 395                        base + OMAP_MCBSP_REG_SPCR1);
 396                 /* resend */
 397                 return -1;
 398         } else {
 399                 /* wait for recieve confirmation */
 400                 int attemps = 0;
 401                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 402                         if (attemps++ > 1000) {
 403                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 404                                        (~RRST),
 405                                        base + OMAP_MCBSP_REG_SPCR1);
 406                                 udelay(10);
 407                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 408                                        (RRST),
 409                                        base + OMAP_MCBSP_REG_SPCR1);
 410                                 udelay(10);
 411                                 dev_err(mcbsp[id].dev, "Could not read from"
 412                                         " McBSP%d Register\n", mcbsp[id].id);
 413                                 return -2;
 414                         }
 415                 }
 416         }
 417         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 418
 419         return 0;
 420 }
 421 EXPORT_SYMBOL(omap_mcbsp_pollread);
 422
 423 /*
 424  * IRQ based word transmission.
 425  */
 426 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 427 {
 428         u32 io_base;
 429         omap_mcbsp_word_length word_length;
 430
 431         if (!omap_mcbsp_check_valid_id(id)) {
 432                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 433                 return;
 434         }
 435
 436         io_base = mcbsp[id].io_base;
 437         word_length = mcbsp[id].tx_word_length;
 438
 439         wait_for_completion(&(mcbsp[id].tx_irq_completion));
 440
 441         if (word_length > OMAP_MCBSP_WORD_16)
 442                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 443         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 444 }
 445 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 446
 447 u32 omap_mcbsp_recv_word(unsigned int id)
 448 {
 449         u32 io_base;
 450         u16 word_lsb, word_msb = 0;
 451         omap_mcbsp_word_length word_length;
 452
 453         if (!omap_mcbsp_check_valid_id(id)) {
 454                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 455                 return -ENODEV;
 456         }
 457
 458         word_length = mcbsp[id].rx_word_length;
 459         io_base = mcbsp[id].io_base;
 460
 461         wait_for_completion(&(mcbsp[id].rx_irq_completion));
 462
 463         if (word_length > OMAP_MCBSP_WORD_16)
 464                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 465         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 466
 467         return (word_lsb | (word_msb << 16));
 468 }
 469 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 470
 471 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 472 {
 473         u32 io_base;
 474         omap_mcbsp_word_length tx_word_length;
 475         omap_mcbsp_word_length rx_word_length;
 476         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 477
 478         if (!omap_mcbsp_check_valid_id(id)) {
 479                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 480                 return -ENODEV;
 481         }
 482
 483         io_base = mcbsp[id].io_base;
 484         tx_word_length = mcbsp[id].tx_word_length;
 485         rx_word_length = mcbsp[id].rx_word_length;
 486
 487         if (tx_word_length != rx_word_length)
 488                 return -EINVAL;
 489
 490         /* First we wait for the transmitter to be ready */
 491         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 492         while (!(spcr2 & XRDY)) {
 493                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 494                 if (attempts++ > 1000) {
 495                         /* We must reset the transmitter */
 496                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 497                         udelay(10);
 498                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 499                         udelay(10);
 500                         dev_err(mcbsp[id].dev, "McBSP%d transmitter not "
 501                                 "ready\n", mcbsp[id].id);
 502                         return -EAGAIN;
 503                 }
 504         }
 505
 506         /* Now we can push the data */
 507         if (tx_word_length > OMAP_MCBSP_WORD_16)
 508                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 509         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 510
 511         /* We wait for the receiver to be ready */
 512         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 513         while (!(spcr1 & RRDY)) {
 514                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 515                 if (attempts++ > 1000) {
 516                         /* We must reset the receiver */
 517                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 518                         udelay(10);
 519                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 520                         udelay(10);
 521                         dev_err(mcbsp[id].dev, "McBSP%d receiver not "
 522                                 "ready\n", mcbsp[id].id);
 523                         return -EAGAIN;
 524                 }
 525         }
 526
 527         /* Receiver is ready, let's read the dummy data */
 528         if (rx_word_length > OMAP_MCBSP_WORD_16)
 529                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 530         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 531
 532         return 0;
 533 }
 534 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 535
 536 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 537 {
 538         u32 io_base, clock_word = 0;
 539         omap_mcbsp_word_length tx_word_length;
 540         omap_mcbsp_word_length rx_word_length;
 541         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 542
 543         if (!omap_mcbsp_check_valid_id(id)) {
 544                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 545                 return -ENODEV;
 546         }
 547
 548         io_base = mcbsp[id].io_base;
 549         tx_word_length = mcbsp[id].tx_word_length;
 550         rx_word_length = mcbsp[id].rx_word_length;
 551
 552         if (tx_word_length != rx_word_length)
 553                 return -EINVAL;
 554
 555         /* First we wait for the transmitter to be ready */
 556         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 557         while (!(spcr2 & XRDY)) {
 558                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 559                 if (attempts++ > 1000) {
 560                         /* We must reset the transmitter */
 561                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 562                         udelay(10);
 563                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 564                         udelay(10);
 565                         dev_err(mcbsp[id].dev, "McBSP%d transmitter not "
 566                                 "ready\n", mcbsp[id].id);
 567                         return -EAGAIN;
 568                 }
 569         }
 570
 571         /* We first need to enable the bus clock */
 572         if (tx_word_length > OMAP_MCBSP_WORD_16)
 573                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 574         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 575
 576         /* We wait for the receiver to be ready */
 577         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 578         while (!(spcr1 & RRDY)) {
 579                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 580                 if (attempts++ > 1000) {
 581                         /* We must reset the receiver */
 582                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 583                         udelay(10);
 584                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 585                         udelay(10);
 586                         dev_err(mcbsp[id].dev, "McBSP%d receiver not "
 587                                 "ready\n", mcbsp[id].id);
 588                         return -EAGAIN;
 589                 }
 590         }
 591
 592         /* Receiver is ready, there is something for us */
 593         if (rx_word_length > OMAP_MCBSP_WORD_16)
 594                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 595         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 596
 597         word[0] = (word_lsb | (word_msb << 16));
 598
 599         return 0;
 600 }
 601 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 602
 603 /*
 604  * Simple DMA based buffer rx/tx routines.
 605  * Nothing fancy, just a single buffer tx/rx through DMA.
 606  * The DMA resources are released once the transfer is done.
 607  * For anything fancier, you should use your own customized DMA
 608  * routines and callbacks.
 609  */
 610 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 611                                 unsigned int length)
 612 {
 613         int dma_tx_ch;
 614         int src_port = 0;
 615         int dest_port = 0;
 616         int sync_dev = 0;
 617
 618         if (!omap_mcbsp_check_valid_id(id)) {
 619                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 620                 return -ENODEV;
 621         }
 622
 623         if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX",
 624                                 omap_mcbsp_tx_dma_callback,
 625                                 &mcbsp[id],
 626                                 &dma_tx_ch)) {
 627                 dev_err(mcbsp[id].dev, " Unable to request DMA channel for "
 628                                 "McBSP%d TX. Trying IRQ based TX\n",
 629                                 mcbsp[id].id);
 630                 return -EAGAIN;
 631         }
 632         mcbsp[id].dma_tx_lch = dma_tx_ch;
 633
 634         dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id,
 635                 dma_tx_ch);
 636
 637         init_completion(&(mcbsp[id].tx_dma_completion));
 638
 639         if (cpu_class_is_omap1()) {
 640                 src_port = OMAP_DMA_PORT_TIPB;
 641                 dest_port = OMAP_DMA_PORT_EMIFF;
 642         }
 643         if (cpu_class_is_omap2())
 644                 sync_dev = mcbsp[id].dma_tx_sync;
 645
 646         omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch,
 647                                      OMAP_DMA_DATA_TYPE_S16,
 648                                      length >> 1, 1,
 649                                      OMAP_DMA_SYNC_ELEMENT,
 650          sync_dev, 0);
 651
 652         omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
 653                                  src_port,
 654                                  OMAP_DMA_AMODE_CONSTANT,
 655                                  mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1,
 656                                  0, 0);
 657
 658         omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
 659                                 dest_port,
 660                                 OMAP_DMA_AMODE_POST_INC,
 661                                 buffer,
 662                                 0, 0);
 663
 664         omap_start_dma(mcbsp[id].dma_tx_lch);
 665         wait_for_completion(&(mcbsp[id].tx_dma_completion));
 666
 667         return 0;
 668 }
 669 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 670
 671 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 672                                 unsigned int length)
 673 {
 674         int dma_rx_ch;
 675         int src_port = 0;
 676         int dest_port = 0;
 677         int sync_dev = 0;
 678
 679         if (!omap_mcbsp_check_valid_id(id)) {
 680                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 681                 return -ENODEV;
 682         }
 683
 684         if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX",
 685                                 omap_mcbsp_rx_dma_callback,
 686                                 &mcbsp[id],
 687                                 &dma_rx_ch)) {
 688                 dev_err(mcbsp[id].dev, "Unable to request DMA channel for "
 689                                 "McBSP%d RX. Trying IRQ based RX\n",
 690                                 mcbsp[id].id);
 691                 return -EAGAIN;
 692         }
 693         mcbsp[id].dma_rx_lch = dma_rx_ch;
 694
 695         dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id,
 696                 dma_rx_ch);
 697
 698         init_completion(&(mcbsp[id].rx_dma_completion));
 699
 700         if (cpu_class_is_omap1()) {
 701                 src_port = OMAP_DMA_PORT_TIPB;
 702                 dest_port = OMAP_DMA_PORT_EMIFF;
 703         }
 704         if (cpu_class_is_omap2())
 705                 sync_dev = mcbsp[id].dma_rx_sync;
 706
 707         omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch,
 708                                         OMAP_DMA_DATA_TYPE_S16,
 709                                         length >> 1, 1,
 710                                         OMAP_DMA_SYNC_ELEMENT,
 711                                         sync_dev, 0);
 712
 713         omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
 714                                 src_port,
 715                                 OMAP_DMA_AMODE_CONSTANT,
 716                                 mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1,
 717                                 0, 0);
 718
 719         omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
 720                                         dest_port,
 721                                         OMAP_DMA_AMODE_POST_INC,
 722                                         buffer,
 723                                         0, 0);
 724
 725         omap_start_dma(mcbsp[id].dma_rx_lch);
 726         wait_for_completion(&(mcbsp[id].rx_dma_completion));
 727
 728         return 0;
 729 }
 730 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 731
 732 /*
 733  * SPI wrapper.
 734  * Since SPI setup is much simpler than the generic McBSP one,
 735  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 736  * Once this is done, you can call omap_mcbsp_start().
 737  */
 738 void omap_mcbsp_set_spi_mode(unsigned int id,
 739                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 740 {
 741         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 742
 743         if (!omap_mcbsp_check_valid_id(id)) {
 744                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 745                 return;
 746         }
 747
 748         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 749
 750         /* SPI has only one frame */
 751         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 752         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 753
 754         /* Clock stop mode */
 755         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 756                 mcbsp_cfg.spcr1 |= (1 << 12);
 757         else
 758                 mcbsp_cfg.spcr1 |= (3 << 11);
 759
 760         /* Set clock parities */
 761         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 762                 mcbsp_cfg.pcr0 |= CLKRP;
 763         else
 764                 mcbsp_cfg.pcr0 &= ~CLKRP;
 765
 766         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 767                 mcbsp_cfg.pcr0 &= ~CLKXP;
 768         else
 769                 mcbsp_cfg.pcr0 |= CLKXP;
 770
 771         /* Set SCLKME to 0 and CLKSM to 1 */
 772         mcbsp_cfg.pcr0 &= ~SCLKME;
 773         mcbsp_cfg.srgr2 |= CLKSM;
 774
 775         /* Set FSXP */
 776         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 777                 mcbsp_cfg.pcr0 &= ~FSXP;
 778         else
 779                 mcbsp_cfg.pcr0 |= FSXP;
 780
 781         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 782                 mcbsp_cfg.pcr0 |= CLKXM;
 783                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 784                 mcbsp_cfg.pcr0 |= FSXM;
 785                 mcbsp_cfg.srgr2 &= ~FSGM;
 786                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 787                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 788         } else {
 789                 mcbsp_cfg.pcr0 &= ~CLKXM;
 790                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 791                 mcbsp_cfg.pcr0 &= ~FSXM;
 792                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 793                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 794         }
 795
 796         mcbsp_cfg.xcr2 &= ~XPHASE;
 797         mcbsp_cfg.rcr2 &= ~RPHASE;
 798
 799         omap_mcbsp_config(id, &mcbsp_cfg);
 800 }
 801 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 802
 803 /*
 804  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 805  * 730 has only 2 McBSP, and both of them are MPU peripherals.
 806  */
 807 static int __init omap_mcbsp_probe(struct platform_device *pdev)
 808 {
 809         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
 810         int id = pdev->id - 1;
 811         int ret = 0;
 812
 813         if (!pdata) {
 814                 dev_err(&pdev->dev, "McBSP device initialized without"
 815                                 "platform data\n");
 816                 ret = -EINVAL;
 817                 goto exit;
 818         }
 819
 820         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
 821
 822         if (id >= OMAP_MAX_MCBSP_COUNT) {
 823                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
 824                 ret = -EINVAL;
 825                 goto exit;
 826         }
 827
 828         spin_lock_init(&mcbsp[id].lock);
 829         mcbsp[id].id = id + 1;
 830         mcbsp[id].free = 1;
 831         mcbsp[id].dma_tx_lch = -1;
 832         mcbsp[id].dma_rx_lch = -1;
 833
 834         mcbsp[id].io_base = pdata->virt_base;
 835         /* Default I/O is IRQ based */
 836         mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO;
 837         mcbsp[id].tx_irq = pdata->tx_irq;
 838         mcbsp[id].rx_irq = pdata->rx_irq;
 839         mcbsp[id].dma_rx_sync = pdata->dma_rx_sync;
 840         mcbsp[id].dma_tx_sync = pdata->dma_tx_sync;
 841
 842         if (pdata->clk_name)
 843                 mcbsp[id].clk = clk_get(&pdev->dev, pdata->clk_name);
 844         if (IS_ERR(mcbsp[id].clk)) {
 845                 mcbsp[id].free = 0;
 846                 dev_err(&pdev->dev,
 847                         "Invalid clock configuration for McBSP%d.\n",
 848                         mcbsp[id].id);
 849                 ret = -EINVAL;
 850                 goto exit;
 851         }
 852
 853         mcbsp[id].pdata = pdata;
 854         mcbsp[id].dev = &pdev->dev;
 855         platform_set_drvdata(pdev, &mcbsp[id]);
 856
 857 exit:
 858         return ret;
 859 }
 860
 861 static int omap_mcbsp_remove(struct platform_device *pdev)
 862 {
 863         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
 864
 865         platform_set_drvdata(pdev, NULL);
 866         if (mcbsp) {
 867
 868                 if (mcbsp->pdata && mcbsp->pdata->ops &&
 869                                 mcbsp->pdata->ops->free)
 870                         mcbsp->pdata->ops->free(mcbsp->id);
 871
 872                 clk_disable(mcbsp->clk);
 873                 clk_put(mcbsp->clk);
 874
 875                 mcbsp->clk = NULL;
 876                 mcbsp->free = 0;
 877                 mcbsp->dev = NULL;
 878         }
 879
 880         return 0;
 881 }
 882
 883 static struct platform_driver omap_mcbsp_driver = {
 884         .probe          = omap_mcbsp_probe,
 885         .remove         = omap_mcbsp_remove,
 886         .driver         = {
 887                 .name   = "omap-mcbsp",
 888         },
 889 };
 890
 891 int __init omap_mcbsp_init(void)
 892 {
 893         /* Register the McBSP driver */
 894         return platform_driver_register(&omap_mcbsp_driver);
 895 }
 896