2 * linux/arch/arm/plat-omap/mcbsp.c
4 * Copyright (C) 2004 Nokia Corporation
5 * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Multichannel mode not supported.
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
28 #include <mach/mcbsp.h>
30 struct omap_mcbsp **mcbsp_ptr;
33 void omap_mcbsp_write(u32 io_base, u16 reg, u32 val)
35 if (cpu_class_is_omap1() || cpu_is_omap2420())
36 __raw_writew((u16)val, io_base + reg);
38 __raw_writel(val, io_base + reg);
41 int omap_mcbsp_read(u32 io_base, u16 reg)
43 if (cpu_class_is_omap1() || cpu_is_omap2420())
44 return __raw_readw(io_base + reg);
46 return __raw_readl(io_base + reg);
49 #define OMAP_MCBSP_READ(base, reg) \
50 omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
51 #define OMAP_MCBSP_WRITE(base, reg, val) \
52 omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
54 #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
55 #define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
57 static void omap_mcbsp_dump_reg(u8 id)
59 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
61 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
62 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
63 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
64 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
65 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
66 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
67 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
68 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
69 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
70 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
71 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
72 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
73 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
74 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
75 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
76 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
77 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
78 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
79 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
80 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
81 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
82 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
83 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
84 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
85 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
86 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
87 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
88 dev_dbg(mcbsp->dev, "***********************\n");
91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
93 struct omap_mcbsp *mcbsp_tx = dev_id;
95 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
96 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
98 complete(&mcbsp_tx->tx_irq_completion);
103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
105 struct omap_mcbsp *mcbsp_rx = dev_id;
107 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
108 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
110 complete(&mcbsp_rx->rx_irq_completion);
115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
117 struct omap_mcbsp *mcbsp_dma_tx = data;
119 dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
120 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
122 /* We can free the channels */
123 omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
124 mcbsp_dma_tx->dma_tx_lch = -1;
126 complete(&mcbsp_dma_tx->tx_dma_completion);
129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
131 struct omap_mcbsp *mcbsp_dma_rx = data;
133 dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
134 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
136 /* We can free the channels */
137 omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
138 mcbsp_dma_rx->dma_rx_lch = -1;
140 complete(&mcbsp_dma_rx->rx_dma_completion);
144 * omap_mcbsp_config simply write a config to the
146 * You either call this function or set the McBSP registers
147 * by yourself before calling omap_mcbsp_start().
149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
151 struct omap_mcbsp *mcbsp;
154 if (!omap_mcbsp_check_valid_id(id)) {
155 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
158 mcbsp = id_to_mcbsp_ptr(id);
160 io_base = mcbsp->io_base;
161 dev_dbg(mcbsp->dev, "Configuring McBSP%d io_base: 0x%8x\n",
164 /* We write the given config */
165 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
166 OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
167 OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
168 OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
169 OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
170 OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
171 OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
172 OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
173 OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
174 OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
175 OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
177 EXPORT_SYMBOL(omap_mcbsp_config);
180 * We can choose between IRQ based or polled IO.
181 * This needs to be called before omap_mcbsp_request().
183 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
185 struct omap_mcbsp *mcbsp;
187 if (!omap_mcbsp_check_valid_id(id)) {
188 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
191 mcbsp = id_to_mcbsp_ptr(id);
193 spin_lock(&mcbsp->lock);
196 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
198 spin_unlock(&mcbsp->lock);
202 mcbsp->io_type = io_type;
204 spin_unlock(&mcbsp->lock);
208 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
210 int omap_mcbsp_request(unsigned int id)
212 struct omap_mcbsp *mcbsp;
215 if (!omap_mcbsp_check_valid_id(id)) {
216 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
219 mcbsp = id_to_mcbsp_ptr(id);
221 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
222 mcbsp->pdata->ops->request(id);
224 clk_enable(mcbsp->clk);
226 spin_lock(&mcbsp->lock);
228 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
230 spin_unlock(&mcbsp->lock);
235 spin_unlock(&mcbsp->lock);
237 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
238 /* We need to get IRQs here */
239 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
240 0, "McBSP", (void *)mcbsp);
242 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
243 "for McBSP%d\n", mcbsp->tx_irq,
248 init_completion(&mcbsp->tx_irq_completion);
250 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
251 0, "McBSP", (void *)mcbsp);
253 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
254 "for McBSP%d\n", mcbsp->rx_irq,
256 free_irq(mcbsp->tx_irq, (void *)mcbsp);
260 init_completion(&mcbsp->rx_irq_completion);
265 EXPORT_SYMBOL(omap_mcbsp_request);
267 void omap_mcbsp_free(unsigned int id)
269 struct omap_mcbsp *mcbsp;
271 if (!omap_mcbsp_check_valid_id(id)) {
272 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
275 mcbsp = id_to_mcbsp_ptr(id);
277 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
278 mcbsp->pdata->ops->free(id);
280 clk_disable(mcbsp->clk);
282 spin_lock(&mcbsp->lock);
284 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
286 spin_unlock(&mcbsp->lock);
291 spin_unlock(&mcbsp->lock);
293 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
295 free_irq(mcbsp->rx_irq, (void *)mcbsp);
296 free_irq(mcbsp->tx_irq, (void *)mcbsp);
299 EXPORT_SYMBOL(omap_mcbsp_free);
302 * Here we start the McBSP, by enabling the sample
303 * generator, both transmitter and receivers,
304 * and the frame sync.
306 void omap_mcbsp_start(unsigned int id)
308 struct omap_mcbsp *mcbsp;
312 if (!omap_mcbsp_check_valid_id(id)) {
313 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
316 mcbsp = id_to_mcbsp_ptr(id);
317 io_base = mcbsp->io_base;
319 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
320 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
322 /* Start the sample generator */
323 w = OMAP_MCBSP_READ(io_base, SPCR2);
324 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
326 /* Enable transmitter and receiver */
327 w = OMAP_MCBSP_READ(io_base, SPCR2);
328 OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
330 w = OMAP_MCBSP_READ(io_base, SPCR1);
331 OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
335 /* Start frame sync */
336 w = OMAP_MCBSP_READ(io_base, SPCR2);
337 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
339 /* Dump McBSP Regs */
340 omap_mcbsp_dump_reg(id);
342 EXPORT_SYMBOL(omap_mcbsp_start);
344 void omap_mcbsp_stop(unsigned int id)
346 struct omap_mcbsp *mcbsp;
350 if (!omap_mcbsp_check_valid_id(id)) {
351 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
355 mcbsp = id_to_mcbsp_ptr(id);
356 io_base = mcbsp->io_base;
358 /* Reset transmitter */
359 w = OMAP_MCBSP_READ(io_base, SPCR2);
360 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
363 w = OMAP_MCBSP_READ(io_base, SPCR1);
364 OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
366 /* Reset the sample rate generator */
367 w = OMAP_MCBSP_READ(io_base, SPCR2);
368 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
370 EXPORT_SYMBOL(omap_mcbsp_stop);
372 /* polled mcbsp i/o operations */
373 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
375 struct omap_mcbsp *mcbsp;
378 if (!omap_mcbsp_check_valid_id(id)) {
379 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
383 mcbsp = id_to_mcbsp_ptr(id);
384 base = mcbsp->io_base;
386 writew(buf, base + OMAP_MCBSP_REG_DXR1);
387 /* if frame sync error - clear the error */
388 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
390 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
391 base + OMAP_MCBSP_REG_SPCR2);
395 /* wait for transmit confirmation */
397 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
398 if (attemps++ > 1000) {
399 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
401 base + OMAP_MCBSP_REG_SPCR2);
403 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
405 base + OMAP_MCBSP_REG_SPCR2);
407 dev_err(mcbsp->dev, "Could not write to"
408 " McBSP%d Register\n", mcbsp->id);
416 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
418 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
420 struct omap_mcbsp *mcbsp;
423 if (!omap_mcbsp_check_valid_id(id)) {
424 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
427 mcbsp = id_to_mcbsp_ptr(id);
429 base = mcbsp->io_base;
430 /* if frame sync error - clear the error */
431 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
433 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
434 base + OMAP_MCBSP_REG_SPCR1);
438 /* wait for recieve confirmation */
440 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
441 if (attemps++ > 1000) {
442 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
444 base + OMAP_MCBSP_REG_SPCR1);
446 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
448 base + OMAP_MCBSP_REG_SPCR1);
450 dev_err(mcbsp->dev, "Could not read from"
451 " McBSP%d Register\n", mcbsp->id);
456 *buf = readw(base + OMAP_MCBSP_REG_DRR1);
460 EXPORT_SYMBOL(omap_mcbsp_pollread);
463 * IRQ based word transmission.
465 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
467 struct omap_mcbsp *mcbsp;
469 omap_mcbsp_word_length word_length;
471 if (!omap_mcbsp_check_valid_id(id)) {
472 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
476 mcbsp = id_to_mcbsp_ptr(id);
477 io_base = mcbsp->io_base;
478 word_length = mcbsp->tx_word_length;
480 wait_for_completion(&mcbsp->tx_irq_completion);
482 if (word_length > OMAP_MCBSP_WORD_16)
483 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
484 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
486 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
488 u32 omap_mcbsp_recv_word(unsigned int id)
490 struct omap_mcbsp *mcbsp;
492 u16 word_lsb, word_msb = 0;
493 omap_mcbsp_word_length word_length;
495 if (!omap_mcbsp_check_valid_id(id)) {
496 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
499 mcbsp = id_to_mcbsp_ptr(id);
501 word_length = mcbsp->rx_word_length;
502 io_base = mcbsp->io_base;
504 wait_for_completion(&mcbsp->rx_irq_completion);
506 if (word_length > OMAP_MCBSP_WORD_16)
507 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
508 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
510 return (word_lsb | (word_msb << 16));
512 EXPORT_SYMBOL(omap_mcbsp_recv_word);
514 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
516 struct omap_mcbsp *mcbsp;
518 omap_mcbsp_word_length tx_word_length;
519 omap_mcbsp_word_length rx_word_length;
520 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
522 if (!omap_mcbsp_check_valid_id(id)) {
523 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
526 mcbsp = id_to_mcbsp_ptr(id);
527 io_base = mcbsp->io_base;
528 tx_word_length = mcbsp->tx_word_length;
529 rx_word_length = mcbsp->rx_word_length;
531 if (tx_word_length != rx_word_length)
534 /* First we wait for the transmitter to be ready */
535 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
536 while (!(spcr2 & XRDY)) {
537 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
538 if (attempts++ > 1000) {
539 /* We must reset the transmitter */
540 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
542 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
544 dev_err(mcbsp->dev, "McBSP%d transmitter not "
545 "ready\n", mcbsp->id);
550 /* Now we can push the data */
551 if (tx_word_length > OMAP_MCBSP_WORD_16)
552 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
553 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
555 /* We wait for the receiver to be ready */
556 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
557 while (!(spcr1 & RRDY)) {
558 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
559 if (attempts++ > 1000) {
560 /* We must reset the receiver */
561 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
563 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
565 dev_err(mcbsp->dev, "McBSP%d receiver not "
566 "ready\n", mcbsp->id);
571 /* Receiver is ready, let's read the dummy data */
572 if (rx_word_length > OMAP_MCBSP_WORD_16)
573 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
574 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
578 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
580 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
582 struct omap_mcbsp *mcbsp;
583 u32 io_base, clock_word = 0;
584 omap_mcbsp_word_length tx_word_length;
585 omap_mcbsp_word_length rx_word_length;
586 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
588 if (!omap_mcbsp_check_valid_id(id)) {
589 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
593 mcbsp = id_to_mcbsp_ptr(id);
594 io_base = mcbsp->io_base;
596 tx_word_length = mcbsp->tx_word_length;
597 rx_word_length = mcbsp->rx_word_length;
599 if (tx_word_length != rx_word_length)
602 /* First we wait for the transmitter to be ready */
603 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
604 while (!(spcr2 & XRDY)) {
605 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
606 if (attempts++ > 1000) {
607 /* We must reset the transmitter */
608 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
610 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
612 dev_err(mcbsp->dev, "McBSP%d transmitter not "
613 "ready\n", mcbsp->id);
618 /* We first need to enable the bus clock */
619 if (tx_word_length > OMAP_MCBSP_WORD_16)
620 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
621 OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
623 /* We wait for the receiver to be ready */
624 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
625 while (!(spcr1 & RRDY)) {
626 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
627 if (attempts++ > 1000) {
628 /* We must reset the receiver */
629 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
631 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
633 dev_err(mcbsp->dev, "McBSP%d receiver not "
634 "ready\n", mcbsp->id);
639 /* Receiver is ready, there is something for us */
640 if (rx_word_length > OMAP_MCBSP_WORD_16)
641 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
642 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
644 word[0] = (word_lsb | (word_msb << 16));
648 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
651 * Simple DMA based buffer rx/tx routines.
652 * Nothing fancy, just a single buffer tx/rx through DMA.
653 * The DMA resources are released once the transfer is done.
654 * For anything fancier, you should use your own customized DMA
655 * routines and callbacks.
657 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
660 struct omap_mcbsp *mcbsp;
666 if (!omap_mcbsp_check_valid_id(id)) {
667 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
670 mcbsp = id_to_mcbsp_ptr(id);
672 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
673 omap_mcbsp_tx_dma_callback,
676 dev_err(mcbsp->dev, " Unable to request DMA channel for "
677 "McBSP%d TX. Trying IRQ based TX\n",
681 mcbsp->dma_tx_lch = dma_tx_ch;
683 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
686 init_completion(&mcbsp->tx_dma_completion);
688 if (cpu_class_is_omap1()) {
689 src_port = OMAP_DMA_PORT_TIPB;
690 dest_port = OMAP_DMA_PORT_EMIFF;
692 if (cpu_class_is_omap2())
693 sync_dev = mcbsp->dma_tx_sync;
695 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
696 OMAP_DMA_DATA_TYPE_S16,
698 OMAP_DMA_SYNC_ELEMENT,
701 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
703 OMAP_DMA_AMODE_CONSTANT,
704 mcbsp->io_base + OMAP_MCBSP_REG_DXR1,
707 omap_set_dma_src_params(mcbsp->dma_tx_lch,
709 OMAP_DMA_AMODE_POST_INC,
713 omap_start_dma(mcbsp->dma_tx_lch);
714 wait_for_completion(&mcbsp->tx_dma_completion);
718 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
720 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
723 struct omap_mcbsp *mcbsp;
729 if (!omap_mcbsp_check_valid_id(id)) {
730 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
733 mcbsp = id_to_mcbsp_ptr(id);
735 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
736 omap_mcbsp_rx_dma_callback,
739 dev_err(mcbsp->dev, "Unable to request DMA channel for "
740 "McBSP%d RX. Trying IRQ based RX\n",
744 mcbsp->dma_rx_lch = dma_rx_ch;
746 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
749 init_completion(&mcbsp->rx_dma_completion);
751 if (cpu_class_is_omap1()) {
752 src_port = OMAP_DMA_PORT_TIPB;
753 dest_port = OMAP_DMA_PORT_EMIFF;
755 if (cpu_class_is_omap2())
756 sync_dev = mcbsp->dma_rx_sync;
758 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
759 OMAP_DMA_DATA_TYPE_S16,
761 OMAP_DMA_SYNC_ELEMENT,
764 omap_set_dma_src_params(mcbsp->dma_rx_lch,
766 OMAP_DMA_AMODE_CONSTANT,
767 mcbsp->io_base + OMAP_MCBSP_REG_DRR1,
770 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
772 OMAP_DMA_AMODE_POST_INC,
776 omap_start_dma(mcbsp->dma_rx_lch);
777 wait_for_completion(&mcbsp->rx_dma_completion);
781 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
785 * Since SPI setup is much simpler than the generic McBSP one,
786 * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
787 * Once this is done, you can call omap_mcbsp_start().
789 void omap_mcbsp_set_spi_mode(unsigned int id,
790 const struct omap_mcbsp_spi_cfg *spi_cfg)
792 struct omap_mcbsp *mcbsp;
793 struct omap_mcbsp_reg_cfg mcbsp_cfg;
795 if (!omap_mcbsp_check_valid_id(id)) {
796 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
799 mcbsp = id_to_mcbsp_ptr(id);
801 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
803 /* SPI has only one frame */
804 mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
805 mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
807 /* Clock stop mode */
808 if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
809 mcbsp_cfg.spcr1 |= (1 << 12);
811 mcbsp_cfg.spcr1 |= (3 << 11);
813 /* Set clock parities */
814 if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
815 mcbsp_cfg.pcr0 |= CLKRP;
817 mcbsp_cfg.pcr0 &= ~CLKRP;
819 if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
820 mcbsp_cfg.pcr0 &= ~CLKXP;
822 mcbsp_cfg.pcr0 |= CLKXP;
824 /* Set SCLKME to 0 and CLKSM to 1 */
825 mcbsp_cfg.pcr0 &= ~SCLKME;
826 mcbsp_cfg.srgr2 |= CLKSM;
829 if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
830 mcbsp_cfg.pcr0 &= ~FSXP;
832 mcbsp_cfg.pcr0 |= FSXP;
834 if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
835 mcbsp_cfg.pcr0 |= CLKXM;
836 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
837 mcbsp_cfg.pcr0 |= FSXM;
838 mcbsp_cfg.srgr2 &= ~FSGM;
839 mcbsp_cfg.xcr2 |= XDATDLY(1);
840 mcbsp_cfg.rcr2 |= RDATDLY(1);
842 mcbsp_cfg.pcr0 &= ~CLKXM;
843 mcbsp_cfg.srgr1 |= CLKGDV(1);
844 mcbsp_cfg.pcr0 &= ~FSXM;
845 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
846 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
849 mcbsp_cfg.xcr2 &= ~XPHASE;
850 mcbsp_cfg.rcr2 &= ~RPHASE;
852 omap_mcbsp_config(id, &mcbsp_cfg);
854 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
857 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
858 * 730 has only 2 McBSP, and both of them are MPU peripherals.
860 static int __init omap_mcbsp_probe(struct platform_device *pdev)
862 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
863 struct omap_mcbsp *mcbsp;
864 int id = pdev->id - 1;
868 dev_err(&pdev->dev, "McBSP device initialized without"
874 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
876 if (id >= omap_mcbsp_count) {
877 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
882 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
887 mcbsp_ptr[id] = mcbsp;
889 spin_lock_init(&mcbsp->lock);
892 mcbsp->dma_tx_lch = -1;
893 mcbsp->dma_rx_lch = -1;
895 mcbsp->io_base = pdata->virt_base;
896 /* Default I/O is IRQ based */
897 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
898 mcbsp->tx_irq = pdata->tx_irq;
899 mcbsp->rx_irq = pdata->rx_irq;
900 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
901 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
904 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
905 if (IS_ERR(mcbsp->clk)) {
908 "Invalid clock configuration for McBSP%d.\n",
914 mcbsp->pdata = pdata;
915 mcbsp->dev = &pdev->dev;
916 platform_set_drvdata(pdev, mcbsp);
922 static int omap_mcbsp_remove(struct platform_device *pdev)
924 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
926 platform_set_drvdata(pdev, NULL);
929 if (mcbsp->pdata && mcbsp->pdata->ops &&
930 mcbsp->pdata->ops->free)
931 mcbsp->pdata->ops->free(mcbsp->id);
933 clk_disable(mcbsp->clk);
944 static struct platform_driver omap_mcbsp_driver = {
945 .probe = omap_mcbsp_probe,
946 .remove = omap_mcbsp_remove,
948 .name = "omap-mcbsp",
952 int __init omap_mcbsp_init(void)
954 /* Register the McBSP driver */
955 return platform_driver_register(&omap_mcbsp_driver);