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1 /*
2  * arch/arm/plat-omap/include/mach/sram.h
3  *
4  * Interface for functions that need to be run in internal SRAM
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #ifndef __ARCH_ARM_OMAP_SRAM_H
12 #define __ARCH_ARM_OMAP_SRAM_H
13
14 extern int __init omap_sram_init(void);
15 extern void * omap_sram_push(void * start, unsigned long size);
16 extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
17
18 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
19                                 u32 base_cs, u32 force_unlock);
20 extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
21                                       u32 mem_type);
22 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
23
24 extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,
25                                      u32 sdrc_actim_ctrla,
26                                      u32 sdrc_actim_ctrlb, u32 m2);
27
28 /* Do not use these */
29 extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
30 extern unsigned long omap1_sram_reprogram_clock_sz;
31
32 extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
33 extern unsigned long omap24xx_sram_reprogram_clock_sz;
34
35 extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
36                                                 u32 base_cs, u32 force_unlock);
37 extern unsigned long omap242x_sram_ddr_init_sz;
38
39 extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
40                                                 int bypass);
41 extern unsigned long omap242x_sram_set_prcm_sz;
42
43 extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
44                                                 u32 mem_type);
45 extern unsigned long omap242x_sram_reprogram_sdrc_sz;
46
47
48 extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
49                                                 u32 base_cs, u32 force_unlock);
50 extern unsigned long omap243x_sram_ddr_init_sz;
51
52 extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
53                                                 int bypass);
54 extern unsigned long omap243x_sram_set_prcm_sz;
55
56 extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
57                                                 u32 mem_type);
58 extern unsigned long omap243x_sram_reprogram_sdrc_sz;
59
60
61 extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl,
62                                           u32 sdrc_actim_ctrla,
63                                           u32 sdrc_actim_ctrlb, u32 m2);
64 extern unsigned long omap3_sram_configure_core_dpll_sz;
65
66 #endif