2 * arch/arm/plat-omap/include/mach/board-3430sdp.h
4 * Hardware definitions for TI OMAP3430 SDP board.
6 * Initial creation by Syed Mohammed Khasim
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #ifndef __ASM_ARCH_OMAP_3430SDP_H
30 #define __ASM_ARCH_OMAP_3430SDP_H
32 extern void sdp3430_usb_init(void);
33 extern void sdp3430_flash_init(void);
34 extern void twl4030_bci_battery_init(void);
36 #define DEBUG_BASE 0x08000000 /* debug board */
38 /* Placeholder for 3430SDP specific defines */
40 #define OMAP34XX_ETHR_START DEBUG_BASE
41 #define OMAP34XX_ETHR_GPIO_IRQ_SDPV1 29
42 #define OMAP34XX_ETHR_GPIO_IRQ_SDPV2 6
45 * GPIO used for TSC2046, TI's Touchscreen controller
47 #define OMAP34XX_TS_GPIO_IRQ_SDPV1 3
48 #define OMAP34XX_TS_GPIO_IRQ_SDPV2 2
51 /* IMPORTANT NOTE ON MAPPING
54 * NOR always on 0x04000000 for SDPV1
55 * NOR always on 0x10000000 for SDPV2
56 * MPDB always on 0x08000000
57 * NAND always on 0x0C000000
58 * OneNand Mapped to 0x20000000
59 * Boot Mode(NAND/NOR). The other on CS1
61 #define FLASH_BASE_SDPV1 0x04000000 /* NOR flash (64 Meg aligned) */
62 #define FLASH_BASE_SDPV2 0x10000000 /* NOR flash (256 Meg aligned) */
63 #define DEBUG_BASE 0x08000000 /* debug board */
64 #define NAND_BASE 0x0C000000 /* NAND flash */
65 #define ONENAND_MAP 0x20000000 /* OneNand flash */
67 /* various memory sizes */
68 #define FLASH_SIZE_SDPV1 SZ_64M
69 #define FLASH_SIZE_SDPV2 SZ_128M
71 #endif /* __ASM_ARCH_OMAP_3430SDP_H */