2 * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
4 * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
6 * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/platform_device.h>
27 #include <linux/sched.h>
28 #include <linux/mutex.h>
29 #include <linux/err.h>
30 #include <linux/clk.h>
31 #include <asm/delay.h>
32 #include <asm/arch/mailbox.h>
33 #include <asm/arch/dsp_common.h>
34 #include "dsp_mbcmd.h"
37 #include "dsp_common.h"
39 MODULE_AUTHOR("Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>");
40 MODULE_DESCRIPTION("OMAP DSP driver module");
41 MODULE_LICENSE("GPL");
43 struct device *dsp_device;
46 struct omap_mbox *mbox_dsp;
47 static struct sync_seq *mbseq;
48 static u16 mbseq_expect_tmp;
49 static u16 *mbseq_expect = &mbseq_expect_tmp;
54 extern void mbox_wdsnd(struct mbcmd *mb);
55 extern void mbox_wdreq(struct mbcmd *mb);
56 extern void mbox_bksnd(struct mbcmd *mb);
57 extern void mbox_bkreq(struct mbcmd *mb);
58 extern void mbox_bkyld(struct mbcmd *mb);
59 extern void mbox_bksndp(struct mbcmd *mb);
60 extern void mbox_bkreqp(struct mbcmd *mb);
61 extern void mbox_tctl(struct mbcmd *mb);
62 extern void mbox_poll(struct mbcmd *mb);
63 #ifdef OLD_BINARY_SUPPORT
65 extern void mbox_wdt(struct mbcmd *mb);
67 extern void mbox_suspend(struct mbcmd *mb);
68 static void mbox_kfunc(struct mbcmd *mb);
69 extern void mbox_tcfg(struct mbcmd *mb);
70 extern void mbox_tadd(struct mbcmd *mb);
71 extern void mbox_tdel(struct mbcmd *mb);
72 extern void mbox_dspcfg(struct mbcmd *mb);
73 extern void mbox_regrw(struct mbcmd *mb);
74 extern void mbox_getvar(struct mbcmd *mb);
75 extern void mbox_err(struct mbcmd *mb);
76 extern void mbox_dbg(struct mbcmd *mb);
78 static const struct cmdinfo
79 cif_wdsnd = { "WDSND", CMD_L_TYPE_TID, mbox_wdsnd },
80 cif_wdreq = { "WDREQ", CMD_L_TYPE_TID, mbox_wdreq },
81 cif_bksnd = { "BKSND", CMD_L_TYPE_TID, mbox_bksnd },
82 cif_bkreq = { "BKREQ", CMD_L_TYPE_TID, mbox_bkreq },
83 cif_bkyld = { "BKYLD", CMD_L_TYPE_NULL, mbox_bkyld },
84 cif_bksndp = { "BKSNDP", CMD_L_TYPE_TID, mbox_bksndp },
85 cif_bkreqp = { "BKREQP", CMD_L_TYPE_TID, mbox_bkreqp },
86 cif_tctl = { "TCTL", CMD_L_TYPE_TID, mbox_tctl },
87 cif_poll = { "POLL", CMD_L_TYPE_NULL, mbox_poll },
88 #ifdef OLD_BINARY_SUPPORT
90 cif_wdt = { "WDT", CMD_L_TYPE_NULL, mbox_wdt },
92 cif_runlevel = { "RUNLEVEL", CMD_L_TYPE_SUBCMD, NULL },
93 cif_pm = { "PM", CMD_L_TYPE_SUBCMD, NULL },
94 cif_suspend = { "SUSPEND", CMD_L_TYPE_NULL, mbox_suspend },
95 cif_kfunc = { "KFUNC", CMD_L_TYPE_SUBCMD, mbox_kfunc },
96 cif_tcfg = { "TCFG", CMD_L_TYPE_TID, mbox_tcfg },
97 cif_tadd = { "TADD", CMD_L_TYPE_TID, mbox_tadd },
98 cif_tdel = { "TDEL", CMD_L_TYPE_TID, mbox_tdel },
99 cif_tstop = { "TSTOP", CMD_L_TYPE_TID, NULL },
100 cif_dspcfg = { "DSPCFG", CMD_L_TYPE_SUBCMD, mbox_dspcfg },
101 cif_regrw = { "REGRW", CMD_L_TYPE_SUBCMD, mbox_regrw },
102 cif_getvar = { "GETVAR", CMD_L_TYPE_SUBCMD, mbox_getvar },
103 cif_setvar = { "SETVAR", CMD_L_TYPE_SUBCMD, NULL },
104 cif_err = { "ERR", CMD_L_TYPE_SUBCMD, mbox_err },
105 cif_dbg = { "DBG", CMD_L_TYPE_NULL, mbox_dbg };
107 #define MBOX_CMD_MAX 0x80
108 const struct cmdinfo *cmdinfo[MBOX_CMD_MAX] = {
109 [MBOX_CMD_DSP_WDSND] = &cif_wdsnd,
110 [MBOX_CMD_DSP_WDREQ] = &cif_wdreq,
111 [MBOX_CMD_DSP_BKSND] = &cif_bksnd,
112 [MBOX_CMD_DSP_BKREQ] = &cif_bkreq,
113 [MBOX_CMD_DSP_BKYLD] = &cif_bkyld,
114 [MBOX_CMD_DSP_BKSNDP] = &cif_bksndp,
115 [MBOX_CMD_DSP_BKREQP] = &cif_bkreqp,
116 [MBOX_CMD_DSP_TCTL] = &cif_tctl,
117 [MBOX_CMD_DSP_POLL] = &cif_poll,
118 #ifdef OLD_BINARY_SUPPORT
119 [MBOX_CMD_DSP_WDT] = &cif_wdt, /* v3.3 obsolete */
121 [MBOX_CMD_DSP_RUNLEVEL] = &cif_runlevel,
122 [MBOX_CMD_DSP_PM] = &cif_pm,
123 [MBOX_CMD_DSP_SUSPEND] = &cif_suspend,
124 [MBOX_CMD_DSP_KFUNC] = &cif_kfunc,
125 [MBOX_CMD_DSP_TCFG] = &cif_tcfg,
126 [MBOX_CMD_DSP_TADD] = &cif_tadd,
127 [MBOX_CMD_DSP_TDEL] = &cif_tdel,
128 [MBOX_CMD_DSP_TSTOP] = &cif_tstop,
129 [MBOX_CMD_DSP_DSPCFG] = &cif_dspcfg,
130 [MBOX_CMD_DSP_REGRW] = &cif_regrw,
131 [MBOX_CMD_DSP_GETVAR] = &cif_getvar,
132 [MBOX_CMD_DSP_SETVAR] = &cif_setvar,
133 [MBOX_CMD_DSP_ERR] = &cif_err,
134 [MBOX_CMD_DSP_DBG] = &cif_dbg,
137 int sync_with_dsp(u16 *adr, u16 val, int try_cnt)
141 if (*(volatile u16 *)adr == val)
144 for (try = 0; try < try_cnt; try++) {
146 if (*(volatile u16 *)adr == val) {
149 "omapdsp: sync_with_dsp(): try = %d\n", try);
159 * __dsp_mbcmd_send_exarg(): mailbox dispatcher
161 int __dsp_mbcmd_send_exarg(struct mbcmd *mb, struct mb_exarg *arg,
164 static DEFINE_MUTEX(mbsend_lock);
168 * while MMU fault is set,
169 * only recovery command can be executed
171 if (dsp_err_isset(ERRCODE_MMU) && !recovery_flag) {
173 "mbox: mmu interrupt is set. %s is aborting.\n",
178 if (mutex_lock_interruptible(&mbsend_lock) < 0)
181 if (arg) { /* we have extra argument */
185 * even if ipbuf_sys_ad is in DSP internal memory,
186 * dsp_mem_enable() never cause to call PM mailbox command
187 * because in that case DSP memory should be always enabled.
188 * (see ipbuf_sys_hold_mem_active in ipbuf.c)
190 * Therefore, we can call this function here safely.
192 dsp_mem_enable(ipbuf_sys_ad);
193 if (sync_with_dsp(&ipbuf_sys_ad->s, TID_FREE, 10) < 0) {
194 printk(KERN_ERR "omapdsp: ipbuf_sys_ad is busy.\n");
195 dsp_mem_disable(ipbuf_sys_ad);
199 for (i = 0; i < arg->argc; i++) {
200 ipbuf_sys_ad->d[i] = arg->argv[i];
202 ipbuf_sys_ad->s = arg->tid;
203 dsp_mem_disable(ipbuf_sys_ad);
209 mblog_add(mb, DIR_A2D);
211 ret = omap_mbox_msg_send(mbox_dsp, *(mbox_msg_t *)mb);
214 mutex_unlock(&mbsend_lock);
218 int dsp_mbcmd_send_and_wait_exarg(struct mbcmd *mb, struct mb_exarg *arg,
219 wait_queue_head_t *q)
222 DECLARE_WAITQUEUE(wait, current);
224 add_wait_queue(q, &wait);
225 current_state = current->state;
226 set_current_state(TASK_INTERRUPTIBLE);
227 if (dsp_mbcmd_send_exarg(mb, arg) < 0) {
228 set_current_state(current_state);
229 remove_wait_queue(q, &wait);
232 schedule_timeout(DSP_TIMEOUT);
233 set_current_state(current_state);
234 remove_wait_queue(q, &wait);
242 static void mbcmd_receiver(mbox_msg_t msg)
244 struct mbcmd *mb = (struct mbcmd *)&msg;
246 if (cmdinfo[mb->cmd_h] == NULL) {
248 "invalid message (%08x) for mbcmd_receiver().\n", msg);
254 mblog_add(mb, DIR_D2A);
256 /* call handler for the command */
257 if (cmdinfo[mb->cmd_h]->handler)
258 cmdinfo[mb->cmd_h]->handler(mb);
260 printk(KERN_ERR "mbox: %s is not allowed from DSP.\n",
264 static int mbsync_hold_mem_active;
266 void dsp_mbox_start(void)
268 omap_mbox_init_seq(mbox_dsp);
269 mbseq_expect_tmp = 0;
272 void dsp_mbox_stop(void)
275 mbseq_expect = &mbseq_expect_tmp;
278 int dsp_mbox_config(void *p)
282 if (dsp_address_validate(p, sizeof(struct sync_seq), "mbseq") < 0)
284 if (dsp_mem_type(p, sizeof(struct sync_seq)) != MEM_TYPE_EXTERN) {
286 "omapdsp: mbseq is placed in DSP internal memory.\n"
287 " It will prevent DSP from idling.\n");
288 mbsync_hold_mem_active = 1;
290 * dsp_mem_enable() never fails because
291 * it has been already enabled in dspcfg process and
292 * this will just increment the usecount.
294 dsp_mem_enable((void *)daram_base);
297 local_irq_save(flags);
299 mbseq->da_arm = mbseq_expect_tmp;
300 mbseq_expect = &mbseq->da_arm;
301 local_irq_restore(flags);
306 static int __init dsp_mbox_init(void)
308 mbox_dsp->mbox = omap_mbox_get("dsp");
309 if (IS_ERR(mbox_dsp)) {
310 printk(KERN_ERR "failed to get mailbox handler for DSP.\n");
314 mbox_dsp->mbox->msg_receive_cb = mbcmd_receiver;
319 static void dsp_mbox_exit(void)
321 mbox_dsp->mbox->msg_receive_cb = NULL;
323 if (mbsync_hold_mem_active) {
324 dsp_mem_disable((void *)daram_base);
325 mbsync_hold_mem_active = 0;
330 * kernel function dispatcher
332 extern void mbox_fbctl_upd(void);
333 extern void mbox_fbctl_disable(struct mbcmd *mb);
335 static void mbox_kfunc_fbctl(struct mbcmd *mb)
342 mbox_fbctl_disable(mb);
346 "mbox: Unknown FBCTL from DSP: 0x%04x\n", mb->data);
350 static void mbox_kfunc_audio_pwr(unsigned short data)
354 omap_dsp_audio_pwr_up_request(0);
356 mbcompose_send(KFUNC, KFUNC_AUDIO_PWR, AUDIO_PWR_UP);
358 case AUDIO_PWR_DOWN1:
359 omap_dsp_audio_pwr_down_request(1);
361 case AUDIO_PWR_DOWN2:
362 omap_dsp_audio_pwr_down_request(2);
366 "mailbox: Unknown AUDIO_PWR from DSP: 0x%04x\n", data);
370 static void mbox_kfunc(struct mbcmd *mb)
374 mbox_kfunc_fbctl(mb);
376 case KFUNC_AUDIO_PWR:
377 mbox_kfunc_audio_pwr(mb->data);
381 "mbox: Unknown KFUNC from DSP: 0x%02x\n", mb->cmd_l);
385 extern int dsp_ctl_core_init(void);
386 extern void dsp_ctl_core_exit(void);
387 extern void dsp_ctl_init(void);
388 extern void dsp_ctl_exit(void);
389 extern int dsp_mem_init(void);
390 extern void dsp_mem_exit(void);
391 extern void mblog_init(void);
392 extern void mblog_exit(void);
393 extern int dsp_taskmod_init(void);
394 extern void dsp_taskmod_exit(void);
399 static int __init dsp_drv_probe(struct platform_device *pdev)
403 dev_info(&pdev->dev, "OMAP DSP driver initialization\n");
405 dsp_device = &pdev->dev;
407 dsp_mmu_irq = platform_get_irq_byname(pdev, "dsp_mmu");
411 #ifdef CONFIG_ARCH_OMAP2
412 clk_enable(dsp_fck_handle);
413 clk_enable(dsp_ick_handle);
417 if ((ret = dsp_ctl_core_init()) < 0)
419 if ((ret = dsp_mem_init()) < 0)
423 if ((ret = dsp_taskmod_init()) < 0)
425 if ((ret = dsp_mbox_init()) < 0)
439 #ifdef CONFIG_ARCH_OMAP2
441 clk_disable(dsp_ick_handle);
442 clk_disable(dsp_fck_handle);
447 static int dsp_drv_remove(struct platform_device *pdev)
449 dsp_cpustat_request(CPUSTAT_RESET);
451 dsp_cfgstat_request(CFGSTAT_CLEAN);
460 #ifdef CONFIG_ARCH_OMAP2
462 clk_disable(dsp_ick_handle);
463 clk_disable(dsp_fck_handle);
469 static int dsp_drv_suspend(struct platform_device *pdev, pm_message_t state)
471 dsp_cfgstat_request(CFGSTAT_SUSPEND);
476 static int dsp_drv_resume(struct platform_device *pdev)
478 dsp_cfgstat_request(CFGSTAT_RESUME);
483 #define dsp_drv_suspend NULL
484 #define dsp_drv_resume NULL
485 #endif /* CONFIG_PM */
487 static struct platform_driver dsp_driver = {
488 .probe = dsp_drv_probe,
489 .remove = dsp_drv_remove,
490 .suspend = dsp_drv_suspend,
491 .resume = dsp_drv_resume,
497 static int __init omap_dsp_mod_init(void)
499 return platform_driver_register(&dsp_driver);
502 static void __exit omap_dsp_mod_exit(void)
504 platform_driver_unregister(&dsp_driver);
507 module_init(omap_dsp_mod_init);
508 module_exit(omap_dsp_mod_exit);