2 * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
4 * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved.
6 * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #ifndef DRIVER_DSP_COMMON_H
25 #define DRIVER_DSP_COMMON_H
27 #include <linux/clk.h>
28 #include "hardware_dsp.h"
30 #define DSPSPACE_SIZE 0x1000000
32 #define omap_set_bit_regw(b,r) \
33 do { omap_writew(omap_readw(r) | (b), (r)); } while(0)
34 #define omap_clr_bit_regw(b,r) \
35 do { omap_writew(omap_readw(r) & ~(b), (r)); } while(0)
36 #define omap_set_bit_regl(b,r) \
37 do { omap_writel(omap_readl(r) | (b), (r)); } while(0)
38 #define omap_clr_bit_regl(b,r) \
39 do { omap_writel(omap_readl(r) & ~(b), (r)); } while(0)
40 #define omap_set_bits_regl(val,mask,r) \
41 do { omap_writel((omap_readl(r) & ~(mask)) | (val), (r)); } while(0)
43 #define dspword_to_virt(dw) ((void *)(dspmem_base + ((dw) << 1)))
44 #define dspbyte_to_virt(db) ((void *)(dspmem_base + (db)))
45 #define virt_to_dspword(va) \
46 ((dsp_long_t)(((unsigned long)(va) - dspmem_base) >> 1))
47 #define virt_to_dspbyte(va) \
48 ((dsp_long_t)((unsigned long)(va) - dspmem_base))
49 #define is_dsp_internal_mem(va) \
50 (((unsigned long)(va) >= dspmem_base) && \
51 ((unsigned long)(va) < dspmem_base + dspmem_size))
52 #define is_dspbyte_internal_mem(db) ((db) < dspmem_size)
53 #define is_dspword_internal_mem(dw) (((dw) << 1) < dspmem_size)
55 #ifdef CONFIG_ARCH_OMAP1
57 * MPUI byteswap/wordswap on/off
58 * default setting: wordswap = all, byteswap = APIMEM only
60 #define mpui_wordswap_on() \
61 omap_set_bits_regl(MPUI_CTRL_WORDSWAP_ALL, MPUI_CTRL_WORDSWAP_MASK, \
64 #define mpui_wordswap_off() \
65 omap_set_bits_regl(MPUI_CTRL_WORDSWAP_NONE, MPUI_CTRL_WORDSWAP_MASK, \
68 #define mpui_byteswap_on() \
69 omap_set_bits_regl(MPUI_CTRL_BYTESWAP_API, MPUI_CTRL_BYTESWAP_MASK, \
72 #define mpui_byteswap_off() \
73 omap_set_bits_regl(MPUI_CTRL_BYTESWAP_NONE, MPUI_CTRL_BYTESWAP_MASK, \
77 * TC wordswap on / off
79 #define tc_wordswap() \
81 omap_writel(TC_ENDIANISM_SWAP_WORD | TC_ENDIANISM_EN, \
85 #define tc_noswap() omap_clr_bit_regl(TC_ENDIANISM_EN, TC_ENDIANISM)
88 * enable priority registers, EMIF, MPUI control logic
90 #define __dsp_enable() omap_set_bit_regw(ARM_RSTCT1_DSP_RST, ARM_RSTCT1)
91 #define __dsp_disable() omap_clr_bit_regw(ARM_RSTCT1_DSP_RST, ARM_RSTCT1)
92 #define __dsp_run() omap_set_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1)
93 #define __dsp_reset() omap_clr_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1)
94 #endif /* CONFIG_ARCH_OMAP1 */
96 #ifdef CONFIG_ARCH_OMAP2
98 * PRCM / IPI control logic
100 #define RSTCTRL_RST1_DSP 0x00000001
101 #define RSTCTRL_RST2_DSP 0x00000002
102 #define __dsp_core_enable() \
103 do { RM_RSTCTRL_DSP &= ~RSTCTRL_RST1_DSP; } while (0)
104 #define __dsp_core_disable() \
105 do { RM_RSTCTRL_DSP |= RSTCTRL_RST1_DSP; } while (0)
106 #define __dsp_per_enable() \
107 do { RM_RSTCTRL_DSP &= ~RSTCTRL_RST2_DSP; } while (0)
108 #define __dsp_per_disable() \
109 do { RM_RSTCTRL_DSP |= RSTCTRL_RST2_DSP; } while (0)
110 #endif /* CONFIG_ARCH_OMAP2 */
112 typedef u32 dsp_long_t; /* must have ability to carry TADD_ABORTADR */
114 #if defined(CONFIG_ARCH_OMAP1)
115 extern struct clk *dsp_ck_handle;
116 extern struct clk *api_ck_handle;
117 #elif defined(CONFIG_ARCH_OMAP2)
118 extern struct clk *dsp_fck_handle;
119 extern struct clk *dsp_ick_handle;
121 extern dsp_long_t dspmem_base, dspmem_size,
122 daram_base, daram_size,
123 saram_base, saram_size;
127 #ifdef CONFIG_ARCH_OMAP1
135 int dsp_set_rstvect(dsp_long_t adr);
136 dsp_long_t dsp_get_rstvect(void);
137 #ifdef CONFIG_ARCH_OMAP1
138 void dsp_set_idle_boot_base(dsp_long_t adr, size_t size);
139 void dsp_reset_idle_boot_base(void);
141 void dsp_cpustat_request(enum cpustat_e req);
142 enum cpustat_e dsp_cpustat_get_stat(void);
143 u16 dsp_cpustat_get_icrmask(void);
144 void dsp_cpustat_set_icrmask(u16 mask);
145 void dsp_register_mem_cb(int (*req_cb)(void), void (*rel_cb)(void));
146 void dsp_unregister_mem_cb(void);
148 #if defined(CONFIG_ARCH_OMAP1)
149 static inline void dsp_clk_autoidle(void) {}
150 #elif defined(CONFIG_ARCH_OMAP2)
151 static inline void dsp_clk_autoidle(void)
153 /*XXX should be handled in mach-omap[1,2] XXX*/
154 PM_PWSTCTRL_DSP = (1 << 18) | (1 << 0);
155 CM_AUTOIDLE_DSP |= (1 << 1);
156 CM_CLKSTCTRL_DSP |= (1 << 0);
160 #if defined(CONFIG_ARCH_OMAP1)
161 static inline void dsp_clk_enable(void) {}
162 static inline void dsp_clk_disable(void) {}
163 #elif defined(CONFIG_ARCH_OMAP2)
164 static inline void dsp_clk_enable(void)
166 /*XXX should be handled in mach-omap[1,2] XXX*/
167 PM_PWSTCTRL_DSP = (1 << 18) | (1 << 0);
168 CM_AUTOIDLE_DSP |= (1 << 1);
169 CM_CLKSTCTRL_DSP |= (1 << 0);
171 clk_enable(dsp_fck_handle);
172 clk_enable(dsp_ick_handle);
175 static inline void dsp_clk_disable(void)
178 clk_disable(dsp_ick_handle);
179 clk_disable(dsp_fck_handle);
181 PM_PWSTCTRL_DSP = (1 << 18) | (3 << 0);
185 struct dsp_kfunc_device {
192 #define DSP_KFUNC_DEV_TYPE_COMMON 1
193 #define DSP_KFUNC_DEV_TYPE_AUDIO 2
195 struct list_head entry;
197 int (*probe)(struct dsp_kfunc_device *);
198 int (*remove)(struct dsp_kfunc_device *);
199 int (*enable)(struct dsp_kfunc_device *, int);
200 int (*disable)(struct dsp_kfunc_device *, int);
203 extern int dsp_kfunc_device_register(struct dsp_kfunc_device *);
205 struct dsp_platform_data {
206 struct list_head kdev_list;
211 int enabled; /* stored peripheral status */
213 struct omap_mbox *mbox;
215 struct list_head *kdev_list;
219 #if defined(CONFIG_ARCH_OMAP1)
220 #define command_dvfs_stop(m) (0)
221 #define command_dvfs_start(m) (0)
222 #elif defined(CONFIG_ARCH_OMAP2)
223 #define command_dvfs_stop(m) \
224 (((m)->cmd_l == KFUNC_POWER) && ((m)->data == DVFS_STOP))
225 #define command_dvfs_start(m) \
226 (((m)->cmd_l == KFUNC_POWER) && ((m)->data == DVFS_START))
229 extern struct omap_dsp *omap_dsp;
231 extern int dsp_late_init(void);
233 #endif /* DRIVER_DSP_COMMON_H */