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1 /*
2  * linux/arch/arm/plat-omap/devices.c
3  *
4  * Common platform device setup/initialization for OMAP1 and OMAP2
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16
17 #include <asm/hardware.h>
18 #include <asm/io.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
21
22 #include <asm/arch/tc.h>
23 #include <asm/arch/control.h>
24 #include <asm/arch/board.h>
25 #include <asm/arch/mmc.h>
26 #include <asm/arch/mux.h>
27 #include <asm/arch/gpio.h>
28 #include <asm/arch/menelaus.h>
29 #include <asm/arch/dsp_common.h>
30
31 #if     defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
32
33 static struct dsp_platform_data dsp_pdata = {
34         .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
35 };
36
37 static struct resource omap_dsp_resources[] = {
38         {
39                 .name   = "dsp_mmu",
40                 .start  = -1,
41                 .flags  = IORESOURCE_IRQ,
42         },
43 };
44
45 static struct platform_device omap_dsp_device = {
46         .name           = "dsp",
47         .id             = -1,
48         .num_resources  = ARRAY_SIZE(omap_dsp_resources),
49         .resource       = omap_dsp_resources,
50         .dev = {
51                 .platform_data = &dsp_pdata,
52         },
53 };
54
55 static inline void omap_init_dsp(void)
56 {
57         struct resource *res;
58         int irq;
59
60         if (cpu_is_omap15xx())
61                 irq = INT_1510_DSP_MMU;
62         else if (cpu_is_omap16xx())
63                 irq = INT_1610_DSP_MMU;
64         else if (cpu_is_omap24xx())
65                 irq = INT_24XX_DSP_MMU;
66
67         res = platform_get_resource_byname(&omap_dsp_device,
68                                            IORESOURCE_IRQ, "dsp_mmu");
69         res->start = irq;
70
71         platform_device_register(&omap_dsp_device);
72 }
73
74 int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
75 {
76         static DEFINE_MUTEX(dsp_pdata_lock);
77
78         spin_lock_init(&kdev->lock);
79
80         mutex_lock(&dsp_pdata_lock);
81         list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
82         mutex_unlock(&dsp_pdata_lock);
83
84         return 0;
85 }
86 EXPORT_SYMBOL(dsp_kfunc_device_register);
87
88 #else
89 static inline void omap_init_dsp(void) { }
90 #endif  /* CONFIG_OMAP_DSP */
91
92 /*-------------------------------------------------------------------------*/
93 #if     defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
94
95 static void omap_init_kp(void)
96 {
97         /* REVISIT: 2430 keypad is on TWL4030 */
98         if (cpu_is_omap2430() || cpu_is_omap34xx())
99                 return;
100
101         if (machine_is_omap_h2() || machine_is_omap_h3()) {
102                 omap_cfg_reg(F18_1610_KBC0);
103                 omap_cfg_reg(D20_1610_KBC1);
104                 omap_cfg_reg(D19_1610_KBC2);
105                 omap_cfg_reg(E18_1610_KBC3);
106                 omap_cfg_reg(C21_1610_KBC4);
107
108                 omap_cfg_reg(G18_1610_KBR0);
109                 omap_cfg_reg(F19_1610_KBR1);
110                 omap_cfg_reg(H14_1610_KBR2);
111                 omap_cfg_reg(E20_1610_KBR3);
112                 omap_cfg_reg(E19_1610_KBR4);
113                 omap_cfg_reg(N19_1610_KBR5);
114         } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
115                 omap_cfg_reg(E2_730_KBR0);
116                 omap_cfg_reg(J7_730_KBR1);
117                 omap_cfg_reg(E1_730_KBR2);
118                 omap_cfg_reg(F3_730_KBR3);
119                 omap_cfg_reg(D2_730_KBR4);
120
121                 omap_cfg_reg(C2_730_KBC0);
122                 omap_cfg_reg(D3_730_KBC1);
123                 omap_cfg_reg(E4_730_KBC2);
124                 omap_cfg_reg(F4_730_KBC3);
125                 omap_cfg_reg(E3_730_KBC4);
126         } else if (machine_is_omap_h4()) {
127                 omap_cfg_reg(T19_24XX_KBR0);
128                 omap_cfg_reg(R19_24XX_KBR1);
129                 omap_cfg_reg(V18_24XX_KBR2);
130                 omap_cfg_reg(M21_24XX_KBR3);
131                 omap_cfg_reg(E5__24XX_KBR4);
132                 if (omap_has_menelaus()) {
133                         omap_cfg_reg(B3__24XX_KBR5);
134                         omap_cfg_reg(AA4_24XX_KBC2);
135                         omap_cfg_reg(B13_24XX_KBC6);
136                 } else {
137                         omap_cfg_reg(M18_24XX_KBR5);
138                         omap_cfg_reg(H19_24XX_KBC2);
139                         omap_cfg_reg(N19_24XX_KBC6);
140                 }
141                 omap_cfg_reg(R20_24XX_KBC0);
142                 omap_cfg_reg(M14_24XX_KBC1);
143                 omap_cfg_reg(V17_24XX_KBC3);
144                 omap_cfg_reg(P21_24XX_KBC4);
145                 omap_cfg_reg(L14_24XX_KBC5);
146         }
147 }
148 #else
149 static inline void omap_init_kp(void) {}
150 #endif
151
152 /*-------------------------------------------------------------------------*/
153
154 #if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) \
155         || defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
156
157 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
158 #define OMAP_MMC1_BASE          0x4809c000
159 #define OMAP_MMC1_END           OMAP_MMC1_BASE + 0x1fc
160 #define OMAP_MMC1_INT           INT_24XX_MMC_IRQ
161
162 #define OMAP_MMC2_BASE          0x480b4000
163 #define OMAP_MMC2_END           OMAP_MMC2_BASE + 0x1fc
164 #define OMAP_MMC2_INT           INT_24XX_MMC2_IRQ
165
166 #else
167
168 #define OMAP_MMC1_BASE          0xfffb7800
169 #define OMAP_MMC1_END           OMAP_MMC1_BASE + 0x7f
170 #define OMAP_MMC1_INT           INT_MMC
171
172 #define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
173 #define OMAP_MMC2_END           OMAP_MMC2_BASE + 0x7f
174 #define OMAP_MMC2_INT           INT_1610_MMC2
175
176 #endif
177
178 static struct omap_mmc_platform_data mmc1_data;
179
180 static u64 mmc1_dmamask = 0xffffffff;
181
182 static struct resource mmc1_resources[] = {
183         {
184                 .start          = OMAP_MMC1_BASE,
185                 .end            = OMAP_MMC1_END,
186                 .flags          = IORESOURCE_MEM,
187         },
188         {
189                 .start          = OMAP_MMC1_INT,
190                 .flags          = IORESOURCE_IRQ,
191         },
192 };
193
194 static struct platform_device mmc_omap_device1 = {
195         .name           = "mmci-omap",
196         .id             = 1,
197         .dev = {
198                 .dma_mask       = &mmc1_dmamask,
199                 .platform_data  = &mmc1_data,
200         },
201         .num_resources  = ARRAY_SIZE(mmc1_resources),
202         .resource       = mmc1_resources,
203 };
204
205 #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP243X) || \
206         defined(CONFIG_ARCH_OMAP34XX)
207
208 static struct omap_mmc_platform_data mmc2_data;
209
210 static u64 mmc2_dmamask = 0xffffffff;
211
212
213 static struct resource mmc2_resources[] = {
214         {
215                 .start          = OMAP_MMC2_BASE,
216                 .end            = OMAP_MMC2_END,
217                 .flags          = IORESOURCE_MEM,
218         },
219         {
220                 .start          = OMAP_MMC2_INT,
221                 .flags          = IORESOURCE_IRQ,
222         },
223 };
224
225 static struct platform_device mmc_omap_device2 = {
226         .name           = "mmci-omap",
227         .id             = 2,
228         .dev = {
229                 .dma_mask       = &mmc2_dmamask,
230                 .platform_data  = &mmc2_data,
231         },
232         .num_resources  = ARRAY_SIZE(mmc2_resources),
233         .resource       = mmc2_resources,
234 };
235 #endif
236
237 static void __init omap_init_mmc(void)
238 {
239         const struct omap_mmc_config    *mmc_conf;
240         const struct omap_mmc_conf      *mmc;
241
242         /* NOTE:  assumes MMC was never (wrongly) enabled */
243         mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
244         if (!mmc_conf)
245                 return;
246
247         /* block 1 is always available and has just one pinout option */
248         mmc = &mmc_conf->mmc[0];
249
250         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
251                 if (mmc->enabled)
252                         (void) platform_device_register(&mmc_omap_device1);
253
254 #if defined(CONFIG_ARCH_OMAP243X) || defined(CONFIG_ARCH_OMAP34XX)
255                 mmc = &mmc_conf->mmc[1];
256                 if (mmc->enabled)
257                         (void) platform_device_register(&mmc_omap_device2);
258 #endif
259
260                 return;
261         }
262
263         if (mmc->enabled) {
264                 if (cpu_is_omap24xx()) {
265                         omap_cfg_reg(H18_24XX_MMC_CMD);
266                         omap_cfg_reg(H15_24XX_MMC_CLKI);
267                         omap_cfg_reg(G19_24XX_MMC_CLKO);
268                         omap_cfg_reg(F20_24XX_MMC_DAT0);
269                         omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
270                         omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
271                 } else {
272                         omap_cfg_reg(MMC_CMD);
273                         omap_cfg_reg(MMC_CLK);
274                         omap_cfg_reg(MMC_DAT0);
275                         if (cpu_is_omap1710()) {
276                                 omap_cfg_reg(M15_1710_MMC_CLKI);
277                                 omap_cfg_reg(P19_1710_MMC_CMDDIR);
278                                 omap_cfg_reg(P20_1710_MMC_DATDIR0);
279                         }
280                 }
281                 if (mmc->wire4) {
282                         if (cpu_is_omap24xx()) {
283                                 omap_cfg_reg(H14_24XX_MMC_DAT1);
284                                 omap_cfg_reg(E19_24XX_MMC_DAT2);
285                                 omap_cfg_reg(D19_24XX_MMC_DAT3);
286                                 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
287                                 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
288                                 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
289                         } else {
290                                 omap_cfg_reg(MMC_DAT1);
291                                 /* NOTE:  DAT2 can be on W10 (here) or M15 */
292                                 if (!mmc->nomux)
293                                         omap_cfg_reg(MMC_DAT2);
294                                 omap_cfg_reg(MMC_DAT3);
295                         }
296                 }
297 #if defined(CONFIG_ARCH_OMAP2420)
298                 if (mmc->internal_clock) {
299                         /*
300                          * Use internal loop-back in MMC/SDIO
301                          * Module Input Clock selection
302                          */
303                         if (cpu_is_omap24xx()) {
304                                 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
305                                 v |= (1 << 24); /* not used in 243x */
306                                 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
307                         }
308                 }
309 #endif
310                 mmc1_data.conf = *mmc;
311                 (void) platform_device_register(&mmc_omap_device1);
312         }
313
314 #ifdef  CONFIG_ARCH_OMAP16XX
315         /* block 2 is on newer chips, and has many pinout options */
316         mmc = &mmc_conf->mmc[1];
317         if (mmc->enabled) {
318                 if (!mmc->nomux) {
319                         omap_cfg_reg(Y8_1610_MMC2_CMD);
320                         omap_cfg_reg(Y10_1610_MMC2_CLK);
321                         omap_cfg_reg(R18_1610_MMC2_CLKIN);
322                         omap_cfg_reg(W8_1610_MMC2_DAT0);
323                         if (mmc->wire4) {
324                                 omap_cfg_reg(V8_1610_MMC2_DAT1);
325                                 omap_cfg_reg(W15_1610_MMC2_DAT2);
326                                 omap_cfg_reg(R10_1610_MMC2_DAT3);
327                         }
328
329                         /* These are needed for the level shifter */
330                         omap_cfg_reg(V9_1610_MMC2_CMDDIR);
331                         omap_cfg_reg(V5_1610_MMC2_DATDIR0);
332                         omap_cfg_reg(W19_1610_MMC2_DATDIR1);
333                 }
334
335                 /* Feedback clock must be set on OMAP-1710 MMC2 */
336                 if (cpu_is_omap1710())
337                         omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
338                                      MOD_CONF_CTRL_1);
339                 mmc2_data.conf = *mmc;
340                 (void) platform_device_register(&mmc_omap_device2);
341         }
342 #endif
343         return;
344 }
345
346 void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
347 {
348         switch (host) {
349         case 1:
350                 mmc1_data = *info;
351                 break;
352 #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP243X) || \
353         defined(CONFIG_ARCH_OMAP34XX)
354         case 2:
355                 mmc2_data = *info;
356                 break;
357 #endif
358         default:
359                 BUG();
360         }
361 }
362
363 #else
364 void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
365 static inline void omap_init_mmc(void) {}
366 #endif
367
368 /*-------------------------------------------------------------------------*/
369
370 /* Numbering for the SPI-capable controllers when used for SPI:
371  * spi          = 1
372  * uwire        = 2
373  * mmc1..2      = 3..4
374  * mcbsp1..3    = 5..7
375  */
376
377 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
378
379 #define OMAP_UWIRE_BASE         0xfffb3000
380
381 static struct resource uwire_resources[] = {
382         {
383                 .start          = OMAP_UWIRE_BASE,
384                 .end            = OMAP_UWIRE_BASE + 0x20,
385                 .flags          = IORESOURCE_MEM,
386         },
387 };
388
389 static struct platform_device omap_uwire_device = {
390         .name      = "omap_uwire",
391         .id          = -1,
392         .num_resources  = ARRAY_SIZE(uwire_resources),
393         .resource       = uwire_resources,
394 };
395
396 static void omap_init_uwire(void)
397 {
398         /* FIXME define and use a boot tag; not all boards will be hooking
399          * up devices to the microwire controller, and multi-board configs
400          * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
401          */
402
403         /* board-specific code must configure chipselects (only a few
404          * are normally used) and SCLK/SDI/SDO (each has two choices).
405          */
406         (void) platform_device_register(&omap_uwire_device);
407 }
408 #else
409 static inline void omap_init_uwire(void) {}
410 #endif
411
412 /*-------------------------------------------------------------------------*/
413
414 #if     defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
415
416 #if defined(CONFIG_ARCH_OMAP34XX)
417 #define OMAP_WDT_BASE           0x48314000
418 #elif defined(CONFIG_ARCH_OMAP24XX)
419
420 #ifdef CONFIG_ARCH_OMAP2430
421 /* WDT2 */
422 #define OMAP_WDT_BASE           0x49016000
423 #else
424 #define OMAP_WDT_BASE           0x48022000
425 #endif
426
427 #else
428 #define OMAP_WDT_BASE           0xfffeb000
429 #endif
430
431 static struct resource wdt_resources[] = {
432         {
433                 .start          = OMAP_WDT_BASE,
434                 .end            = OMAP_WDT_BASE + 0x4f,
435                 .flags          = IORESOURCE_MEM,
436         },
437 };
438
439 static struct platform_device omap_wdt_device = {
440         .name      = "omap_wdt",
441         .id          = -1,
442         .num_resources  = ARRAY_SIZE(wdt_resources),
443         .resource       = wdt_resources,
444 };
445
446 static void omap_init_wdt(void)
447 {
448         (void) platform_device_register(&omap_wdt_device);
449 }
450 #else
451 static inline void omap_init_wdt(void) {}
452 #endif
453
454 /*-------------------------------------------------------------------------*/
455
456 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
457
458 #ifdef CONFIG_ARCH_OMAP24XX
459 #define OMAP_RNG_BASE           0x480A0000
460 #else
461 #define OMAP_RNG_BASE           0xfffe5000
462 #endif
463
464 static struct resource rng_resources[] = {
465         {
466                 .start          = OMAP_RNG_BASE,
467                 .end            = OMAP_RNG_BASE + 0x4f,
468                 .flags          = IORESOURCE_MEM,
469         },
470 };
471
472 static struct platform_device omap_rng_device = {
473         .name      = "omap_rng",
474         .id          = -1,
475         .num_resources  = ARRAY_SIZE(rng_resources),
476         .resource       = rng_resources,
477 };
478
479 static void omap_init_rng(void)
480 {
481         (void) platform_device_register(&omap_rng_device);
482 }
483 #else
484 static inline void omap_init_rng(void) {}
485 #endif
486
487 /*
488  * This gets called after board-specific INIT_MACHINE, and initializes most
489  * on-chip peripherals accessible on this board (except for few like USB):
490  *
491  *  (a) Does any "standard config" pin muxing needed.  Board-specific
492  *      code will have muxed GPIO pins and done "nonstandard" setup;
493  *      that code could live in the boot loader.
494  *  (b) Populating board-specific platform_data with the data drivers
495  *      rely on to handle wiring variations.
496  *  (c) Creating platform devices as meaningful on this board and
497  *      with this kernel configuration.
498  *
499  * Claiming GPIOs, and setting their direction and initial values, is the
500  * responsibility of the device drivers.  So is responding to probe().
501  *
502  * Board-specific knowlege like creating devices or pin setup is to be
503  * kept out of drivers as much as possible.  In particular, pin setup
504  * may be handled by the boot loader, and drivers should expect it will
505  * normally have been done by the time they're probed.
506  */
507 static int __init omap_init_devices(void)
508 {
509         /* please keep these calls, and their implementations above,
510          * in alphabetical order so they're easier to sort through.
511          */
512         omap_init_dsp();
513         omap_init_kp();
514         omap_init_mmc();
515         omap_init_uwire();
516         omap_init_wdt();
517         omap_init_rng();
518         return 0;
519 }
520 arch_initcall(omap_init_devices);