2 * linux/arch/arm/plat-omap/devices.c
4 * Common platform device setup/initialization for OMAP1 and OMAP2
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
17 #include <asm/hardware.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
22 #include <asm/arch/tc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/menelaus.h>
28 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
30 #include "../plat-omap/dsp/dsp_common.h"
32 static struct dsp_platform_data dsp_pdata = {
33 .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
36 static struct resource omap_dsp_resources[] = {
40 .flags = IORESOURCE_IRQ,
44 static struct platform_device omap_dsp_device = {
47 .num_resources = ARRAY_SIZE(omap_dsp_resources),
48 .resource = omap_dsp_resources,
50 .platform_data = &dsp_pdata,
54 static inline void omap_init_dsp(void)
59 if (cpu_is_omap15xx())
60 irq = INT_1510_DSP_MMU;
61 else if (cpu_is_omap16xx())
62 irq = INT_1610_DSP_MMU;
63 else if (cpu_is_omap24xx())
64 irq = INT_24XX_DSP_MMU;
66 res = platform_get_resource_byname(&omap_dsp_device,
67 IORESOURCE_IRQ, "dsp_mmu");
70 platform_device_register(&omap_dsp_device);
73 int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
75 static DEFINE_MUTEX(dsp_pdata_lock);
77 mutex_init(&kdev->lock);
79 mutex_lock(&dsp_pdata_lock);
80 list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
81 mutex_unlock(&dsp_pdata_lock);
85 EXPORT_SYMBOL(dsp_kfunc_device_register);
88 static inline void omap_init_dsp(void) { }
89 #endif /* CONFIG_OMAP_DSP */
91 /*-------------------------------------------------------------------------*/
92 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
94 #define OMAP1_I2C_BASE 0xfffb3800
95 #define OMAP2_I2C_BASE1 0x48070000
96 #define OMAP_I2C_SIZE 0x3f
97 #define OMAP1_I2C_INT INT_I2C
98 #define OMAP2_I2C_INT1 56
100 static struct resource i2c_resources1[] = {
104 .flags = IORESOURCE_MEM,
108 .flags = IORESOURCE_IRQ,
112 /* DMA not used; works around erratum writing to non-empty i2c fifo */
114 static struct platform_device omap_i2c_device1 = {
117 .num_resources = ARRAY_SIZE(i2c_resources1),
118 .resource = i2c_resources1,
121 /* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
122 static void omap_init_i2c(void)
124 if (cpu_is_omap24xx()) {
125 i2c_resources1[0].start = OMAP2_I2C_BASE1;
126 i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
127 i2c_resources1[1].start = OMAP2_I2C_INT1;
129 i2c_resources1[0].start = OMAP1_I2C_BASE;
130 i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
131 i2c_resources1[1].start = OMAP1_I2C_INT;
134 /* FIXME define and use a boot tag, in case of boards that
135 * either don't wire up I2C, or chips that mux it differently...
136 * it can include clocking and address info, maybe more.
138 if (cpu_is_omap24xx()) {
139 if (machine_is_omap_h4()) {
140 omap_cfg_reg(M19_24XX_I2C1_SCL);
141 omap_cfg_reg(L15_24XX_I2C1_SDA);
144 omap_cfg_reg(I2C_SCL);
145 omap_cfg_reg(I2C_SDA);
148 (void) platform_device_register(&omap_i2c_device1);
152 static inline void omap_init_i2c(void) {}
155 /*-------------------------------------------------------------------------*/
156 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
158 static void omap_init_kp(void)
160 if (machine_is_omap_h2() || machine_is_omap_h3()) {
161 omap_cfg_reg(F18_1610_KBC0);
162 omap_cfg_reg(D20_1610_KBC1);
163 omap_cfg_reg(D19_1610_KBC2);
164 omap_cfg_reg(E18_1610_KBC3);
165 omap_cfg_reg(C21_1610_KBC4);
167 omap_cfg_reg(G18_1610_KBR0);
168 omap_cfg_reg(F19_1610_KBR1);
169 omap_cfg_reg(H14_1610_KBR2);
170 omap_cfg_reg(E20_1610_KBR3);
171 omap_cfg_reg(E19_1610_KBR4);
172 omap_cfg_reg(N19_1610_KBR5);
173 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
174 omap_cfg_reg(E2_730_KBR0);
175 omap_cfg_reg(J7_730_KBR1);
176 omap_cfg_reg(E1_730_KBR2);
177 omap_cfg_reg(F3_730_KBR3);
178 omap_cfg_reg(D2_730_KBR4);
180 omap_cfg_reg(C2_730_KBC0);
181 omap_cfg_reg(D3_730_KBC1);
182 omap_cfg_reg(E4_730_KBC2);
183 omap_cfg_reg(F4_730_KBC3);
184 omap_cfg_reg(E3_730_KBC4);
185 } else if (machine_is_omap_h4()) {
186 omap_cfg_reg(T19_24XX_KBR0);
187 omap_cfg_reg(R19_24XX_KBR1);
188 omap_cfg_reg(V18_24XX_KBR2);
189 omap_cfg_reg(M21_24XX_KBR3);
190 omap_cfg_reg(E5__24XX_KBR4);
191 if (omap_has_menelaus()) {
192 omap_cfg_reg(B3__24XX_KBR5);
193 omap_cfg_reg(AA4_24XX_KBC2);
194 omap_cfg_reg(B13_24XX_KBC6);
196 omap_cfg_reg(M18_24XX_KBR5);
197 omap_cfg_reg(H19_24XX_KBC2);
198 omap_cfg_reg(N19_24XX_KBC6);
200 omap_cfg_reg(R20_24XX_KBC0);
201 omap_cfg_reg(M14_24XX_KBC1);
202 omap_cfg_reg(V17_24XX_KBC3);
203 omap_cfg_reg(P21_24XX_KBC4);
204 omap_cfg_reg(L14_24XX_KBC5);
208 static inline void omap_init_kp(void) {}
211 /*-------------------------------------------------------------------------*/
213 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
215 #ifdef CONFIG_ARCH_OMAP24XX
216 #define OMAP_MMC1_BASE 0x4809c000
217 #define OMAP_MMC1_INT INT_24XX_MMC_IRQ
219 #define OMAP_MMC1_BASE 0xfffb7800
220 #define OMAP_MMC1_INT INT_MMC
222 #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
224 static struct omap_mmc_conf mmc1_conf;
226 static u64 mmc1_dmamask = 0xffffffff;
228 static struct resource mmc1_resources[] = {
230 .start = OMAP_MMC1_BASE,
231 .end = OMAP_MMC1_BASE + 0x7f,
232 .flags = IORESOURCE_MEM,
235 .start = OMAP_MMC1_INT,
236 .flags = IORESOURCE_IRQ,
240 static struct platform_device mmc_omap_device1 = {
244 .dma_mask = &mmc1_dmamask,
245 .platform_data = &mmc1_conf,
247 .num_resources = ARRAY_SIZE(mmc1_resources),
248 .resource = mmc1_resources,
251 #ifdef CONFIG_ARCH_OMAP16XX
253 static struct omap_mmc_conf mmc2_conf;
255 static u64 mmc2_dmamask = 0xffffffff;
257 static struct resource mmc2_resources[] = {
259 .start = OMAP_MMC2_BASE,
260 .end = OMAP_MMC2_BASE + 0x7f,
261 .flags = IORESOURCE_MEM,
264 .start = INT_1610_MMC2,
265 .flags = IORESOURCE_IRQ,
269 static struct platform_device mmc_omap_device2 = {
273 .dma_mask = &mmc2_dmamask,
274 .platform_data = &mmc2_conf,
276 .num_resources = ARRAY_SIZE(mmc2_resources),
277 .resource = mmc2_resources,
281 static void __init omap_init_mmc(void)
283 const struct omap_mmc_config *mmc_conf;
284 const struct omap_mmc_conf *mmc;
286 /* NOTE: assumes MMC was never (wrongly) enabled */
287 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
291 /* block 1 is always available and has just one pinout option */
292 mmc = &mmc_conf->mmc[0];
294 if (cpu_is_omap24xx()) {
295 omap_cfg_reg(H18_24XX_MMC_CMD);
296 omap_cfg_reg(H15_24XX_MMC_CLKI);
297 omap_cfg_reg(G19_24XX_MMC_CLKO);
298 omap_cfg_reg(F20_24XX_MMC_DAT0);
299 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
300 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
302 omap_cfg_reg(MMC_CMD);
303 omap_cfg_reg(MMC_CLK);
304 omap_cfg_reg(MMC_DAT0);
305 if (cpu_is_omap1710()) {
306 omap_cfg_reg(M15_1710_MMC_CLKI);
307 omap_cfg_reg(P19_1710_MMC_CMDDIR);
308 omap_cfg_reg(P20_1710_MMC_DATDIR0);
312 if (cpu_is_omap24xx()) {
313 omap_cfg_reg(H14_24XX_MMC_DAT1);
314 omap_cfg_reg(E19_24XX_MMC_DAT2);
315 omap_cfg_reg(D19_24XX_MMC_DAT3);
316 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
317 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
318 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
320 omap_cfg_reg(MMC_DAT1);
321 /* NOTE: DAT2 can be on W10 (here) or M15 */
323 omap_cfg_reg(MMC_DAT2);
324 omap_cfg_reg(MMC_DAT3);
328 (void) platform_device_register(&mmc_omap_device1);
331 #ifdef CONFIG_ARCH_OMAP16XX
332 /* block 2 is on newer chips, and has many pinout options */
333 mmc = &mmc_conf->mmc[1];
336 omap_cfg_reg(Y8_1610_MMC2_CMD);
337 omap_cfg_reg(Y10_1610_MMC2_CLK);
338 omap_cfg_reg(R18_1610_MMC2_CLKIN);
339 omap_cfg_reg(W8_1610_MMC2_DAT0);
341 omap_cfg_reg(V8_1610_MMC2_DAT1);
342 omap_cfg_reg(W15_1610_MMC2_DAT2);
343 omap_cfg_reg(R10_1610_MMC2_DAT3);
346 /* These are needed for the level shifter */
347 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
348 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
349 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
352 /* Feedback clock must be set on OMAP-1710 MMC2 */
353 if (cpu_is_omap1710())
354 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
357 (void) platform_device_register(&mmc_omap_device2);
363 static inline void omap_init_mmc(void) {}
366 /*-------------------------------------------------------------------------*/
368 /* Numbering for the SPI-capable controllers when used for SPI:
375 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
377 #define OMAP_UWIRE_BASE 0xfffb3000
379 static struct resource uwire_resources[] = {
381 .start = OMAP_UWIRE_BASE,
382 .end = OMAP_UWIRE_BASE + 0x20,
383 .flags = IORESOURCE_MEM,
387 static struct platform_device omap_uwire_device = {
388 .name = "omap_uwire",
390 .num_resources = ARRAY_SIZE(uwire_resources),
391 .resource = uwire_resources,
394 static void omap_init_uwire(void)
396 /* FIXME define and use a boot tag; not all boards will be hooking
397 * up devices to the microwire controller, and multi-board configs
398 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
401 /* board-specific code must configure chipselects (only a few
402 * are normally used) and SCLK/SDI/SDO (each has two choices).
404 (void) platform_device_register(&omap_uwire_device);
407 static inline void omap_init_uwire(void) {}
410 /*-------------------------------------------------------------------------*/
412 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
414 #ifdef CONFIG_ARCH_OMAP24XX
415 #define OMAP_WDT_BASE 0x48022000
417 #define OMAP_WDT_BASE 0xfffeb000
420 static struct resource wdt_resources[] = {
422 .start = OMAP_WDT_BASE,
423 .end = OMAP_WDT_BASE + 0x4f,
424 .flags = IORESOURCE_MEM,
428 static struct platform_device omap_wdt_device = {
431 .num_resources = ARRAY_SIZE(wdt_resources),
432 .resource = wdt_resources,
435 static void omap_init_wdt(void)
437 (void) platform_device_register(&omap_wdt_device);
440 static inline void omap_init_wdt(void) {}
443 /*-------------------------------------------------------------------------*/
445 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
447 #ifdef CONFIG_ARCH_OMAP24XX
448 #define OMAP_RNG_BASE 0x480A0000
450 #define OMAP_RNG_BASE 0xfffe5000
453 static struct resource rng_resources[] = {
455 .start = OMAP_RNG_BASE,
456 .end = OMAP_RNG_BASE + 0x4f,
457 .flags = IORESOURCE_MEM,
461 static struct platform_device omap_rng_device = {
464 .num_resources = ARRAY_SIZE(rng_resources),
465 .resource = rng_resources,
468 static void omap_init_rng(void)
470 (void) platform_device_register(&omap_rng_device);
473 static inline void omap_init_rng(void) {}
477 * This gets called after board-specific INIT_MACHINE, and initializes most
478 * on-chip peripherals accessible on this board (except for few like USB):
480 * (a) Does any "standard config" pin muxing needed. Board-specific
481 * code will have muxed GPIO pins and done "nonstandard" setup;
482 * that code could live in the boot loader.
483 * (b) Populating board-specific platform_data with the data drivers
484 * rely on to handle wiring variations.
485 * (c) Creating platform devices as meaningful on this board and
486 * with this kernel configuration.
488 * Claiming GPIOs, and setting their direction and initial values, is the
489 * responsibility of the device drivers. So is responding to probe().
491 * Board-specific knowlege like creating devices or pin setup is to be
492 * kept out of drivers as much as possible. In particular, pin setup
493 * may be handled by the boot loader, and drivers should expect it will
494 * normally have been done by the time they're probed.
496 static int __init omap_init_devices(void)
499 * Need to enable relevant once for 2430 SDP
501 #ifndef CONFIG_MACH_OMAP_2430SDP
502 /* please keep these calls, and their implementations above,
503 * in alphabetical order so they're easier to sort through.
515 arch_initcall(omap_init_devices);