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ARM: OMAP: Use I2C bus registration helper
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1 /*
2  * linux/arch/arm/plat-omap/devices.c
3  *
4  * Common platform device setup/initialization for OMAP1 and OMAP2
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16
17 #include <asm/hardware.h>
18 #include <asm/io.h>
19 #include <asm/mach-types.h>
20 #include <asm/mach/map.h>
21
22 #include <asm/arch/tc.h>
23 #include <asm/arch/board.h>
24 #include <asm/arch/mux.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/menelaus.h>
27
28 #if     defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
29
30 #include "../plat-omap/dsp/dsp_common.h"
31
32 static struct dsp_platform_data dsp_pdata = {
33         .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
34 };
35
36 static struct resource omap_dsp_resources[] = {
37         {
38                 .name   = "dsp_mmu",
39                 .start  = -1,
40                 .flags  = IORESOURCE_IRQ,
41         },
42 };
43
44 static struct platform_device omap_dsp_device = {
45         .name           = "dsp",
46         .id             = -1,
47         .num_resources  = ARRAY_SIZE(omap_dsp_resources),
48         .resource       = omap_dsp_resources,
49         .dev = {
50                 .platform_data = &dsp_pdata,
51         },
52 };
53
54 static inline void omap_init_dsp(void)
55 {
56         struct resource *res;
57         int irq;
58
59         if (cpu_is_omap15xx())
60                 irq = INT_1510_DSP_MMU;
61         else if (cpu_is_omap16xx())
62                 irq = INT_1610_DSP_MMU;
63         else if (cpu_is_omap24xx())
64                 irq = INT_24XX_DSP_MMU;
65
66         res = platform_get_resource_byname(&omap_dsp_device,
67                                            IORESOURCE_IRQ, "dsp_mmu");
68         res->start = irq;
69
70         platform_device_register(&omap_dsp_device);
71 }
72
73 int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
74 {
75         static DEFINE_MUTEX(dsp_pdata_lock);
76
77         spin_lock_init(&kdev->lock);
78
79         mutex_lock(&dsp_pdata_lock);
80         list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
81         mutex_unlock(&dsp_pdata_lock);
82
83         return 0;
84 }
85 EXPORT_SYMBOL(dsp_kfunc_device_register);
86
87 #else
88 static inline void omap_init_dsp(void) { }
89 #endif  /* CONFIG_OMAP_DSP */
90
91 /*-------------------------------------------------------------------------*/
92 #if     defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
93
94 static void omap_init_kp(void)
95 {
96         /* REVISIT: 2430 keypad is on TWL4030 */
97         if (cpu_is_omap2430() || cpu_is_omap34xx())
98                 return;
99
100         if (machine_is_omap_h2() || machine_is_omap_h3()) {
101                 omap_cfg_reg(F18_1610_KBC0);
102                 omap_cfg_reg(D20_1610_KBC1);
103                 omap_cfg_reg(D19_1610_KBC2);
104                 omap_cfg_reg(E18_1610_KBC3);
105                 omap_cfg_reg(C21_1610_KBC4);
106
107                 omap_cfg_reg(G18_1610_KBR0);
108                 omap_cfg_reg(F19_1610_KBR1);
109                 omap_cfg_reg(H14_1610_KBR2);
110                 omap_cfg_reg(E20_1610_KBR3);
111                 omap_cfg_reg(E19_1610_KBR4);
112                 omap_cfg_reg(N19_1610_KBR5);
113         } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
114                 omap_cfg_reg(E2_730_KBR0);
115                 omap_cfg_reg(J7_730_KBR1);
116                 omap_cfg_reg(E1_730_KBR2);
117                 omap_cfg_reg(F3_730_KBR3);
118                 omap_cfg_reg(D2_730_KBR4);
119
120                 omap_cfg_reg(C2_730_KBC0);
121                 omap_cfg_reg(D3_730_KBC1);
122                 omap_cfg_reg(E4_730_KBC2);
123                 omap_cfg_reg(F4_730_KBC3);
124                 omap_cfg_reg(E3_730_KBC4);
125         } else if (machine_is_omap_h4()) {
126                 omap_cfg_reg(T19_24XX_KBR0);
127                 omap_cfg_reg(R19_24XX_KBR1);
128                 omap_cfg_reg(V18_24XX_KBR2);
129                 omap_cfg_reg(M21_24XX_KBR3);
130                 omap_cfg_reg(E5__24XX_KBR4);
131                 if (omap_has_menelaus()) {
132                         omap_cfg_reg(B3__24XX_KBR5);
133                         omap_cfg_reg(AA4_24XX_KBC2);
134                         omap_cfg_reg(B13_24XX_KBC6);
135                 } else {
136                         omap_cfg_reg(M18_24XX_KBR5);
137                         omap_cfg_reg(H19_24XX_KBC2);
138                         omap_cfg_reg(N19_24XX_KBC6);
139                 }
140                 omap_cfg_reg(R20_24XX_KBC0);
141                 omap_cfg_reg(M14_24XX_KBC1);
142                 omap_cfg_reg(V17_24XX_KBC3);
143                 omap_cfg_reg(P21_24XX_KBC4);
144                 omap_cfg_reg(L14_24XX_KBC5);
145         }
146 }
147 #else
148 static inline void omap_init_kp(void) {}
149 #endif
150
151 /*-------------------------------------------------------------------------*/
152
153 #if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
154
155 #ifdef CONFIG_ARCH_OMAP24XX
156 #define OMAP_MMC1_BASE          0x4809c000
157 #define OMAP_MMC1_INT           INT_24XX_MMC_IRQ
158 #else
159 #define OMAP_MMC1_BASE          0xfffb7800
160 #define OMAP_MMC1_INT           INT_MMC
161 #endif
162 #define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
163
164 static struct omap_mmc_conf mmc1_conf;
165
166 static u64 mmc1_dmamask = 0xffffffff;
167
168 static struct resource mmc1_resources[] = {
169         {
170                 .start          = OMAP_MMC1_BASE,
171                 .end            = OMAP_MMC1_BASE + 0x7f,
172                 .flags          = IORESOURCE_MEM,
173         },
174         {
175                 .start          = OMAP_MMC1_INT,
176                 .flags          = IORESOURCE_IRQ,
177         },
178 };
179
180 static struct platform_device mmc_omap_device1 = {
181         .name           = "mmci-omap",
182         .id             = 1,
183         .dev = {
184                 .dma_mask       = &mmc1_dmamask,
185                 .platform_data  = &mmc1_conf,
186         },
187         .num_resources  = ARRAY_SIZE(mmc1_resources),
188         .resource       = mmc1_resources,
189 };
190
191 #ifdef  CONFIG_ARCH_OMAP16XX
192
193 static struct omap_mmc_conf mmc2_conf;
194
195 static u64 mmc2_dmamask = 0xffffffff;
196
197
198 static struct resource mmc2_resources[] = {
199         {
200                 .start          = OMAP_MMC2_BASE,
201                 .end            = OMAP_MMC2_BASE + 0x7f,
202                 .flags          = IORESOURCE_MEM,
203         },
204         {
205                 .start          = INT_1610_MMC2,
206                 .flags          = IORESOURCE_IRQ,
207         },
208 };
209
210 static struct platform_device mmc_omap_device2 = {
211         .name           = "mmci-omap",
212         .id             = 2,
213         .dev = {
214                 .dma_mask       = &mmc2_dmamask,
215                 .platform_data  = &mmc2_conf,
216         },
217         .num_resources  = ARRAY_SIZE(mmc2_resources),
218         .resource       = mmc2_resources,
219 };
220 #endif
221
222 static void __init omap_init_mmc(void)
223 {
224         const struct omap_mmc_config    *mmc_conf;
225         const struct omap_mmc_conf      *mmc;
226
227         /* REVISIT: 2430 has HS MMC */
228         if (cpu_is_omap2430() || cpu_is_omap34xx())
229                 return;
230
231         /* NOTE:  assumes MMC was never (wrongly) enabled */
232         mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
233         if (!mmc_conf)
234                 return;
235
236         /* block 1 is always available and has just one pinout option */
237         mmc = &mmc_conf->mmc[0];
238         if (mmc->enabled) {
239                 if (cpu_is_omap24xx()) {
240                         omap_cfg_reg(H18_24XX_MMC_CMD);
241                         omap_cfg_reg(H15_24XX_MMC_CLKI);
242                         omap_cfg_reg(G19_24XX_MMC_CLKO);
243                         omap_cfg_reg(F20_24XX_MMC_DAT0);
244                         omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
245                         omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
246                 } else {
247                         omap_cfg_reg(MMC_CMD);
248                         omap_cfg_reg(MMC_CLK);
249                         omap_cfg_reg(MMC_DAT0);
250                         if (cpu_is_omap1710()) {
251                                 omap_cfg_reg(M15_1710_MMC_CLKI);
252                                 omap_cfg_reg(P19_1710_MMC_CMDDIR);
253                                 omap_cfg_reg(P20_1710_MMC_DATDIR0);
254                         }
255                 }
256                 if (mmc->wire4) {
257                         if (cpu_is_omap24xx()) {
258                                 omap_cfg_reg(H14_24XX_MMC_DAT1);
259                                 omap_cfg_reg(E19_24XX_MMC_DAT2);
260                                 omap_cfg_reg(D19_24XX_MMC_DAT3);
261                                 omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
262                                 omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
263                                 omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
264                         } else {
265                                 omap_cfg_reg(MMC_DAT1);
266                                 /* NOTE:  DAT2 can be on W10 (here) or M15 */
267                                 if (!mmc->nomux)
268                                         omap_cfg_reg(MMC_DAT2);
269                                 omap_cfg_reg(MMC_DAT3);
270                         }
271                 }
272                 if (mmc->internal_clock) {
273                         /*
274                          * Use internal loop-back in MMC/SDIO
275                          * Module Input Clock selection
276                          */
277                         if (cpu_is_omap24xx()) {
278                                 u32 v = omap_readl(OMAP2_CONTROL_DEVCONF);
279                                 v |= (1 << 24);
280                                 omap_writel(v, OMAP2_CONTROL_DEVCONF);
281                         }
282                 }
283                 mmc1_conf = *mmc;
284                 (void) platform_device_register(&mmc_omap_device1);
285         }
286
287 #ifdef  CONFIG_ARCH_OMAP16XX
288         /* block 2 is on newer chips, and has many pinout options */
289         mmc = &mmc_conf->mmc[1];
290         if (mmc->enabled) {
291                 if (!mmc->nomux) {
292                         omap_cfg_reg(Y8_1610_MMC2_CMD);
293                         omap_cfg_reg(Y10_1610_MMC2_CLK);
294                         omap_cfg_reg(R18_1610_MMC2_CLKIN);
295                         omap_cfg_reg(W8_1610_MMC2_DAT0);
296                         if (mmc->wire4) {
297                                 omap_cfg_reg(V8_1610_MMC2_DAT1);
298                                 omap_cfg_reg(W15_1610_MMC2_DAT2);
299                                 omap_cfg_reg(R10_1610_MMC2_DAT3);
300                         }
301
302                         /* These are needed for the level shifter */
303                         omap_cfg_reg(V9_1610_MMC2_CMDDIR);
304                         omap_cfg_reg(V5_1610_MMC2_DATDIR0);
305                         omap_cfg_reg(W19_1610_MMC2_DATDIR1);
306                 }
307
308                 /* Feedback clock must be set on OMAP-1710 MMC2 */
309                 if (cpu_is_omap1710())
310                         omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
311                                      MOD_CONF_CTRL_1);
312                 mmc2_conf = *mmc;
313                 (void) platform_device_register(&mmc_omap_device2);
314         }
315 #endif
316         return;
317 }
318 #else
319 static inline void omap_init_mmc(void) {}
320 #endif
321
322 /*-------------------------------------------------------------------------*/
323
324 /* Numbering for the SPI-capable controllers when used for SPI:
325  * spi          = 1
326  * uwire        = 2
327  * mmc1..2      = 3..4
328  * mcbsp1..3    = 5..7
329  */
330
331 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
332
333 #define OMAP_UWIRE_BASE         0xfffb3000
334
335 static struct resource uwire_resources[] = {
336         {
337                 .start          = OMAP_UWIRE_BASE,
338                 .end            = OMAP_UWIRE_BASE + 0x20,
339                 .flags          = IORESOURCE_MEM,
340         },
341 };
342
343 static struct platform_device omap_uwire_device = {
344         .name      = "omap_uwire",
345         .id          = -1,
346         .num_resources  = ARRAY_SIZE(uwire_resources),
347         .resource       = uwire_resources,
348 };
349
350 static void omap_init_uwire(void)
351 {
352         /* FIXME define and use a boot tag; not all boards will be hooking
353          * up devices to the microwire controller, and multi-board configs
354          * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
355          */
356
357         /* board-specific code must configure chipselects (only a few
358          * are normally used) and SCLK/SDI/SDO (each has two choices).
359          */
360         (void) platform_device_register(&omap_uwire_device);
361 }
362 #else
363 static inline void omap_init_uwire(void) {}
364 #endif
365
366 /*-------------------------------------------------------------------------*/
367
368 #if     defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
369
370 #if defined(CONFIG_ARCH_OMAP34XX)
371 #define OMAP_WDT_BASE           0x48314000
372 #elif defined(CONFIG_ARCH_OMAP24XX)
373
374 #ifdef CONFIG_ARCH_OMAP2430
375 /* WDT2 */
376 #define OMAP_WDT_BASE           0x49016000
377 #else
378 #define OMAP_WDT_BASE           0x48022000
379 #endif
380
381 #else
382 #define OMAP_WDT_BASE           0xfffeb000
383 #endif
384
385 static struct resource wdt_resources[] = {
386         {
387                 .start          = OMAP_WDT_BASE,
388                 .end            = OMAP_WDT_BASE + 0x4f,
389                 .flags          = IORESOURCE_MEM,
390         },
391 };
392
393 static struct platform_device omap_wdt_device = {
394         .name      = "omap_wdt",
395         .id          = -1,
396         .num_resources  = ARRAY_SIZE(wdt_resources),
397         .resource       = wdt_resources,
398 };
399
400 static void omap_init_wdt(void)
401 {
402         (void) platform_device_register(&omap_wdt_device);
403 }
404 #else
405 static inline void omap_init_wdt(void) {}
406 #endif
407
408 /*-------------------------------------------------------------------------*/
409
410 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
411
412 #ifdef CONFIG_ARCH_OMAP24XX
413 #define OMAP_RNG_BASE           0x480A0000
414 #else
415 #define OMAP_RNG_BASE           0xfffe5000
416 #endif
417
418 static struct resource rng_resources[] = {
419         {
420                 .start          = OMAP_RNG_BASE,
421                 .end            = OMAP_RNG_BASE + 0x4f,
422                 .flags          = IORESOURCE_MEM,
423         },
424 };
425
426 static struct platform_device omap_rng_device = {
427         .name      = "omap_rng",
428         .id          = -1,
429         .num_resources  = ARRAY_SIZE(rng_resources),
430         .resource       = rng_resources,
431 };
432
433 static void omap_init_rng(void)
434 {
435         (void) platform_device_register(&omap_rng_device);
436 }
437 #else
438 static inline void omap_init_rng(void) {}
439 #endif
440
441 /*
442  * This gets called after board-specific INIT_MACHINE, and initializes most
443  * on-chip peripherals accessible on this board (except for few like USB):
444  *
445  *  (a) Does any "standard config" pin muxing needed.  Board-specific
446  *      code will have muxed GPIO pins and done "nonstandard" setup;
447  *      that code could live in the boot loader.
448  *  (b) Populating board-specific platform_data with the data drivers
449  *      rely on to handle wiring variations.
450  *  (c) Creating platform devices as meaningful on this board and
451  *      with this kernel configuration.
452  *
453  * Claiming GPIOs, and setting their direction and initial values, is the
454  * responsibility of the device drivers.  So is responding to probe().
455  *
456  * Board-specific knowlege like creating devices or pin setup is to be
457  * kept out of drivers as much as possible.  In particular, pin setup
458  * may be handled by the boot loader, and drivers should expect it will
459  * normally have been done by the time they're probed.
460  */
461 static int __init omap_init_devices(void)
462 {
463         /* please keep these calls, and their implementations above,
464          * in alphabetical order so they're easier to sort through.
465          */
466         omap_init_dsp();
467         omap_init_kp();
468         omap_init_mmc();
469         omap_init_uwire();
470         omap_init_wdt();
471         omap_init_rng();
472         return 0;
473 }
474 arch_initcall(omap_init_devices);