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1 /*
2  *  linux/arch/arm/mach-realview/realview_eb.c
3  *
4  *  Copyright (C) 2004 ARM Limited
5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26
27 #include <asm/hardware.h>
28 #include <asm/io.h>
29 #include <asm/irq.h>
30 #include <asm/leds.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/hardware/icst307.h>
34 #include <asm/hardware/cache-l2x0.h>
35
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/mmc.h>
39
40 #include <asm/arch/board-eb.h>
41 #include <asm/arch/irqs.h>
42
43 #include "core.h"
44 #include "clock.h"
45
46 static struct map_desc realview_eb_io_desc[] __initdata = {
47         {
48                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
49                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
50                 .length         = SZ_4K,
51                 .type           = MT_DEVICE,
52         }, {
53                 .virtual        = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
54                 .pfn            = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
55                 .length         = SZ_4K,
56                 .type           = MT_DEVICE,
57         }, {
58                 .virtual        = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
59                 .pfn            = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
60                 .length         = SZ_4K,
61                 .type           = MT_DEVICE,
62         }, {
63                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
64                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
65                 .length         = SZ_4K,
66                 .type           = MT_DEVICE,
67         }, {
68                 .virtual        = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
69                 .pfn            = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
70                 .length         = SZ_4K,
71                 .type           = MT_DEVICE,
72         }, {
73                 .virtual        = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
74                 .pfn            = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
75                 .length         = SZ_4K,
76                 .type           = MT_DEVICE,
77         },
78 #ifdef CONFIG_DEBUG_LL
79         {
80                 .virtual        = IO_ADDRESS(REALVIEW_UART0_BASE),
81                 .pfn            = __phys_to_pfn(REALVIEW_UART0_BASE),
82                 .length         = SZ_4K,
83                 .type           = MT_DEVICE,
84         }
85 #endif
86 };
87
88 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
89         {
90                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
91                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
92                 .length         = SZ_4K,
93                 .type           = MT_DEVICE,
94         }, {
95                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
96                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
97                 .length         = SZ_4K,
98                 .type           = MT_DEVICE,
99         }, {
100                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
101                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
102                 .length         = SZ_8K,
103                 .type           = MT_DEVICE,
104         }
105 };
106
107 static void __init realview_eb_map_io(void)
108 {
109         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
110         if (core_tile_eb11mp())
111                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
112 }
113
114 /*
115  * RealView EB AMBA devices
116  */
117
118 /*
119  * These devices are connected via the core APB bridge
120  */
121 #define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
122 #define GPIO2_DMA       { 0, 0 }
123 #define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
124 #define GPIO3_DMA       { 0, 0 }
125
126 #define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
127 #define AACI_DMA        { 0x80, 0x81 }
128 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
129 #define MMCI0_DMA       { 0x84, 0 }
130 #define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
131 #define KMI0_DMA        { 0, 0 }
132 #define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
133 #define KMI1_DMA        { 0, 0 }
134
135 /*
136  * These devices are connected directly to the multi-layer AHB switch
137  */
138 #define SMC_IRQ         { NO_IRQ, NO_IRQ }
139 #define SMC_DMA         { 0, 0 }
140 #define MPMC_IRQ        { NO_IRQ, NO_IRQ }
141 #define MPMC_DMA        { 0, 0 }
142 #define CLCD_IRQ        { IRQ_EB_CLCD, NO_IRQ }
143 #define CLCD_DMA        { 0, 0 }
144 #define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
145 #define DMAC_DMA        { 0, 0 }
146
147 /*
148  * These devices are connected via the core APB bridge
149  */
150 #define SCTL_IRQ        { NO_IRQ, NO_IRQ }
151 #define SCTL_DMA        { 0, 0 }
152 #define WATCHDOG_IRQ    { IRQ_EB_WDOG, NO_IRQ }
153 #define WATCHDOG_DMA    { 0, 0 }
154 #define GPIO0_IRQ       { IRQ_EB_GPIO0, NO_IRQ }
155 #define GPIO0_DMA       { 0, 0 }
156 #define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
157 #define GPIO1_DMA       { 0, 0 }
158 #define RTC_IRQ         { IRQ_EB_RTC, NO_IRQ }
159 #define RTC_DMA         { 0, 0 }
160
161 /*
162  * These devices are connected via the DMA APB bridge
163  */
164 #define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
165 #define SCI_DMA         { 7, 6 }
166 #define UART0_IRQ       { IRQ_EB_UART0, NO_IRQ }
167 #define UART0_DMA       { 15, 14 }
168 #define UART1_IRQ       { IRQ_EB_UART1, NO_IRQ }
169 #define UART1_DMA       { 13, 12 }
170 #define UART2_IRQ       { IRQ_EB_UART2, NO_IRQ }
171 #define UART2_DMA       { 11, 10 }
172 #define UART3_IRQ       { IRQ_EB_UART3, NO_IRQ }
173 #define UART3_DMA       { 0x86, 0x87 }
174 #define SSP_IRQ         { IRQ_EB_SSP, NO_IRQ }
175 #define SSP_DMA         { 9, 8 }
176
177 /* FPGA Primecells */
178 AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
179 AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &realview_mmc0_plat_data);
180 AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
181 AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
182 AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
183
184 /* DevChip Primecells */
185 AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
186 AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
187 AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
188 AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
189 AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
190 AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    NULL);
191 AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    NULL);
192 AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    NULL);
193 AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
194 AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
195 AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
196 AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
197 AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
198 AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      NULL);
199
200 static struct amba_device *amba_devs[] __initdata = {
201         &dmac_device,
202         &uart0_device,
203         &uart1_device,
204         &uart2_device,
205         &uart3_device,
206         &smc_device,
207         &clcd_device,
208         &sctl_device,
209         &wdog_device,
210         &gpio0_device,
211         &gpio1_device,
212         &gpio2_device,
213         &rtc_device,
214         &sci0_device,
215         &ssp0_device,
216         &aaci_device,
217         &mmc0_device,
218         &kmi0_device,
219         &kmi1_device,
220 };
221
222 /*
223  * RealView EB platform devices
224  */
225
226 static struct resource realview_eb_smc91x_resources[] = {
227         [0] = {
228                 .start          = REALVIEW_ETH_BASE,
229                 .end            = REALVIEW_ETH_BASE + SZ_64K - 1,
230                 .flags          = IORESOURCE_MEM,
231         },
232         [1] = {
233                 .start          = IRQ_EB_ETH,
234                 .end            = IRQ_EB_ETH,
235                 .flags          = IORESOURCE_IRQ,
236         },
237 };
238
239 static struct platform_device realview_eb_smc91x_device = {
240         .name           = "smc91x",
241         .id             = 0,
242         .num_resources  = ARRAY_SIZE(realview_eb_smc91x_resources),
243         .resource       = realview_eb_smc91x_resources,
244 };
245
246 static void __init gic_init_irq(void)
247 {
248         if (core_tile_eb11mp()) {
249                 unsigned int pldctrl;
250
251                 /* new irq mode */
252                 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
253                 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
254                 pldctrl |= 0x00800000;
255                 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
256                 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
257
258                 /* core tile GIC, primary */
259                 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
260                 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
261                 gic_cpu_init(0, gic_cpu_base_addr);
262
263 #ifndef CONFIG_REALVIEW_MPCORE_REVB
264                 /* board GIC, secondary */
265                 gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
266                 gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
267                 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
268 #endif
269         } else {
270                 /* board GIC, primary */
271                 gic_cpu_base_addr = __io_address(REALVIEW_GIC_CPU_BASE);
272                 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
273                 gic_cpu_init(0, gic_cpu_base_addr);
274         }
275 }
276
277 /*
278  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
279  */
280 static void realview_eb11mp_fixup(void)
281 {
282         /* AMBA devices */
283         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
284         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
285         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
286         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
287         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
288         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
289         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
290         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
291         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
292         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
293         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
294         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
295         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
296         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
297         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
298         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
299         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
300         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
301
302         /* platform devices */
303         realview_eb_smc91x_resources[1].start   = IRQ_EB11MP_ETH;
304         realview_eb_smc91x_resources[1].end     = IRQ_EB11MP_ETH;
305 }
306
307 static void __init realview_eb_init(void)
308 {
309         int i;
310
311         if (core_tile_eb11mp()) {
312                 realview_eb11mp_fixup();
313
314                 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
315                  * Bits:  .... ...0 0111 1001 0000 .... .... .... */
316                 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
317         }
318
319         clk_register(&realview_clcd_clk);
320
321         platform_device_register(&realview_flash_device);
322         platform_device_register(&realview_eb_smc91x_device);
323         platform_device_register(&realview_i2c_device);
324
325         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
326                 struct amba_device *d = amba_devs[i];
327                 amba_device_register(d, &iomem_resource);
328         }
329
330 #ifdef CONFIG_LEDS
331         leds_event = realview_leds_event;
332 #endif
333 }
334
335 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
336         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
337         .phys_io        = REALVIEW_UART0_BASE,
338         .io_pg_offst    = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
339         .boot_params    = 0x00000100,
340         .map_io         = realview_eb_map_io,
341         .init_irq       = gic_init_irq,
342         .timer          = &realview_timer,
343         .init_machine   = realview_eb_init,
344 MACHINE_END