arch/arm/mach-realview/realview_eb.c

   1 /*
   2  *  linux/arch/arm/mach-realview/realview_eb.c
   3  *
   4  *  Copyright (C) 2004 ARM Limited
   5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/sysdev.h>
  25 #include <linux/amba/bus.h>
  26
  27 #include <asm/hardware.h>
  28 #include <asm/io.h>
  29 #include <asm/irq.h>
  30 #include <asm/leds.h>
  31 #include <asm/mach-types.h>
  32 #include <asm/hardware/gic.h>
  33 #include <asm/hardware/icst307.h>
  34 #include <asm/hardware/cache-l2x0.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/mmc.h>
  39
  40 #include <asm/arch/board-eb.h>
  41 #include <asm/arch/irqs.h>
  42
  43 #include "core.h"
  44 #include "clock.h"
  45
  46 static struct map_desc realview_eb_io_desc[] __initdata = {
  47         {
  48                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
  49                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
  50                 .length         = SZ_4K,
  51                 .type           = MT_DEVICE,
  52         }, {
  53                 .virtual        = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
  54                 .pfn            = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
  55                 .length         = SZ_4K,
  56                 .type           = MT_DEVICE,
  57         }, {
  58                 .virtual        = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
  59                 .pfn            = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
  60                 .length         = SZ_4K,
  61                 .type           = MT_DEVICE,
  62         },
  63 #ifdef CONFIG_REALVIEW_MPCORE
  64         {
  65                 .virtual        = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
  66                 .pfn            = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
  67                 .length         = SZ_4K,
  68                 .type           = MT_DEVICE,
  69         }, {
  70                 .virtual        = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
  71                 .pfn            = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
  72                 .length         = SZ_4K,
  73                 .type           = MT_DEVICE,
  74         }, {
  75                 .virtual        = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
  76                 .pfn            = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
  77                 .length         = SZ_8K,
  78                 .type           = MT_DEVICE,
  79         },
  80 #endif
  81         {
  82                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
  83                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
  84                 .length         = SZ_4K,
  85                 .type           = MT_DEVICE,
  86         }, {
  87                 .virtual        = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
  88                 .pfn            = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
  89                 .length         = SZ_4K,
  90                 .type           = MT_DEVICE,
  91         }, {
  92                 .virtual        = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
  93                 .pfn            = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
  94                 .length         = SZ_4K,
  95                 .type           = MT_DEVICE,
  96         },
  97 #ifdef CONFIG_DEBUG_LL
  98         {
  99                 .virtual        = IO_ADDRESS(REALVIEW_UART0_BASE),
 100                 .pfn            = __phys_to_pfn(REALVIEW_UART0_BASE),
 101                 .length         = SZ_4K,
 102                 .type           = MT_DEVICE,
 103         }
 104 #endif
 105 };
 106
 107 static void __init realview_eb_map_io(void)
 108 {
 109         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
 110 }
 111
 112 /*
 113  * RealView EB AMBA devices
 114  */
 115
 116 /*
 117  * These devices are connected via the core APB bridge
 118  */
 119 #define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
 120 #define GPIO2_DMA       { 0, 0 }
 121 #define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
 122 #define GPIO3_DMA       { 0, 0 }
 123
 124 #define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
 125 #define AACI_DMA        { 0x80, 0x81 }
 126 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
 127 #define MMCI0_DMA       { 0x84, 0 }
 128 #define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
 129 #define KMI0_DMA        { 0, 0 }
 130 #define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
 131 #define KMI1_DMA        { 0, 0 }
 132
 133 /*
 134  * These devices are connected directly to the multi-layer AHB switch
 135  */
 136 #define SMC_IRQ         { NO_IRQ, NO_IRQ }
 137 #define SMC_DMA         { 0, 0 }
 138 #define MPMC_IRQ        { NO_IRQ, NO_IRQ }
 139 #define MPMC_DMA        { 0, 0 }
 140 #define CLCD_IRQ        { IRQ_EB_CLCD, NO_IRQ }
 141 #define CLCD_DMA        { 0, 0 }
 142 #define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
 143 #define DMAC_DMA        { 0, 0 }
 144
 145 /*
 146  * These devices are connected via the core APB bridge
 147  */
 148 #define SCTL_IRQ        { NO_IRQ, NO_IRQ }
 149 #define SCTL_DMA        { 0, 0 }
 150 #define WATCHDOG_IRQ    { IRQ_EB_WDOG, NO_IRQ }
 151 #define WATCHDOG_DMA    { 0, 0 }
 152 #define GPIO0_IRQ       { IRQ_EB_GPIO0, NO_IRQ }
 153 #define GPIO0_DMA       { 0, 0 }
 154 #define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
 155 #define GPIO1_DMA       { 0, 0 }
 156 #define RTC_IRQ         { IRQ_EB_RTC, NO_IRQ }
 157 #define RTC_DMA         { 0, 0 }
 158
 159 /*
 160  * These devices are connected via the DMA APB bridge
 161  */
 162 #define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
 163 #define SCI_DMA         { 7, 6 }
 164 #define UART0_IRQ       { IRQ_EB_UART0, NO_IRQ }
 165 #define UART0_DMA       { 15, 14 }
 166 #define UART1_IRQ       { IRQ_EB_UART1, NO_IRQ }
 167 #define UART1_DMA       { 13, 12 }
 168 #define UART2_IRQ       { IRQ_EB_UART2, NO_IRQ }
 169 #define UART2_DMA       { 11, 10 }
 170 #define UART3_IRQ       { IRQ_EB_UART3, NO_IRQ }
 171 #define UART3_DMA       { 0x86, 0x87 }
 172 #define SSP_IRQ         { IRQ_EB_SSP, NO_IRQ }
 173 #define SSP_DMA         { 9, 8 }
 174
 175 /* FPGA Primecells */
 176 AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);
 177 AMBA_DEVICE(mmc0,  "fpga:05", MMCI0,    &realview_mmc0_plat_data);
 178 AMBA_DEVICE(kmi0,  "fpga:06", KMI0,     NULL);
 179 AMBA_DEVICE(kmi1,  "fpga:07", KMI1,     NULL);
 180 AMBA_DEVICE(uart3, "fpga:09", UART3,    NULL);
 181
 182 /* DevChip Primecells */
 183 AMBA_DEVICE(smc,   "dev:00",  SMC,      NULL);
 184 AMBA_DEVICE(clcd,  "dev:20",  CLCD,     &clcd_plat_data);
 185 AMBA_DEVICE(dmac,  "dev:30",  DMAC,     NULL);
 186 AMBA_DEVICE(sctl,  "dev:e0",  SCTL,     NULL);
 187 AMBA_DEVICE(wdog,  "dev:e1",  WATCHDOG, NULL);
 188 AMBA_DEVICE(gpio0, "dev:e4",  GPIO0,    NULL);
 189 AMBA_DEVICE(gpio1, "dev:e5",  GPIO1,    NULL);
 190 AMBA_DEVICE(gpio2, "dev:e6",  GPIO2,    NULL);
 191 AMBA_DEVICE(rtc,   "dev:e8",  RTC,      NULL);
 192 AMBA_DEVICE(sci0,  "dev:f0",  SCI,      NULL);
 193 AMBA_DEVICE(uart0, "dev:f1",  UART0,    NULL);
 194 AMBA_DEVICE(uart1, "dev:f2",  UART1,    NULL);
 195 AMBA_DEVICE(uart2, "dev:f3",  UART2,    NULL);
 196 AMBA_DEVICE(ssp0,  "dev:f4",  SSP,      NULL);
 197
 198 static struct amba_device *amba_devs[] __initdata = {
 199         &dmac_device,
 200         &uart0_device,
 201         &uart1_device,
 202         &uart2_device,
 203         &uart3_device,
 204         &smc_device,
 205         &clcd_device,
 206         &sctl_device,
 207         &wdog_device,
 208         &gpio0_device,
 209         &gpio1_device,
 210         &gpio2_device,
 211         &rtc_device,
 212         &sci0_device,
 213         &ssp0_device,
 214         &aaci_device,
 215         &mmc0_device,
 216         &kmi0_device,
 217         &kmi1_device,
 218 };
 219
 220 /*
 221  * RealView EB platform devices
 222  */
 223
 224 static struct resource realview_eb_smc91x_resources[] = {
 225         [0] = {
 226                 .start          = REALVIEW_ETH_BASE,
 227                 .end            = REALVIEW_ETH_BASE + SZ_64K - 1,
 228                 .flags          = IORESOURCE_MEM,
 229         },
 230         [1] = {
 231                 .start          = IRQ_EB_ETH,
 232                 .end            = IRQ_EB_ETH,
 233                 .flags          = IORESOURCE_IRQ,
 234         },
 235 };
 236
 237 static struct platform_device realview_eb_smc91x_device = {
 238         .name           = "smc91x",
 239         .id             = 0,
 240         .num_resources  = ARRAY_SIZE(realview_eb_smc91x_resources),
 241         .resource       = realview_eb_smc91x_resources,
 242 };
 243
 244 static void __init gic_init_irq(void)
 245 {
 246 #ifdef CONFIG_REALVIEW_MPCORE
 247         unsigned int pldctrl;
 248         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
 249         pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
 250         pldctrl |= 0x00800000;  /* New irq mode */
 251         writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
 252         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 253 #endif
 254         gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
 255         gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
 256 #if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
 257         gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
 258         gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
 259         gic_cascade_irq(1, IRQ_EB_IRQ1);
 260 #endif
 261 }
 262
 263 #ifdef CONFIG_REALVIEW_MPCORE
 264 /*
 265  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
 266  */
 267 static void realview_eb11mp_fixup(void)
 268 {
 269         /* AMBA devices */
 270         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
 271         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
 272         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
 273         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
 274         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
 275         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
 276         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
 277         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
 278         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
 279         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
 280         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
 281         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
 282         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
 283         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
 284         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
 285         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
 286         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
 287         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
 288
 289         /* platform devices */
 290         realview_eb_smc91x_resources[1].start   = IRQ_EB11MP_ETH;
 291         realview_eb_smc91x_resources[1].end     = IRQ_EB11MP_ETH;
 292 }
 293 #endif
 294
 295 static void __init realview_eb_init(void)
 296 {
 297         int i;
 298
 299 #ifdef CONFIG_REALVIEW_MPCORE
 300         realview_eb11mp_fixup();
 301
 302         /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
 303          * Bits:  .... ...0 0111 1001 0000 .... .... .... */
 304         l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
 305 #endif
 306         clk_register(&realview_clcd_clk);
 307
 308         platform_device_register(&realview_flash_device);
 309         platform_device_register(&realview_eb_smc91x_device);
 310         platform_device_register(&realview_i2c_device);
 311
 312         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
 313                 struct amba_device *d = amba_devs[i];
 314                 amba_device_register(d, &iomem_resource);
 315         }
 316
 317 #ifdef CONFIG_LEDS
 318         leds_event = realview_leds_event;
 319 #endif
 320 }
 321
 322 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
 323         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
 324         .phys_io        = REALVIEW_UART0_BASE,
 325         .io_pg_offst    = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
 326         .boot_params    = 0x00000100,
 327         .map_io         = realview_eb_map_io,
 328         .init_irq       = gic_init_irq,
 329         .timer          = &realview_timer,
 330         .init_machine   = realview_eb_init,
 331 MACHINE_END