2 * linux/arch/arm/mach-pxa/pxa27x.c
4 * Author: Nicolas Pitre
5 * Created: Nov 05, 2002
6 * Copyright: MontaVista Software Inc.
8 * Code specific to PXA27x aka Bulverde.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/suspend.h>
18 #include <linux/platform_device.h>
19 #include <linux/sysdev.h>
21 #include <mach/hardware.h>
23 #include <mach/irqs.h>
24 #include <mach/pxa-regs.h>
25 #include <mach/pxa2xx-regs.h>
26 #include <mach/mfp-pxa27x.h>
27 #include <mach/reset.h>
28 #include <mach/ohci.h>
37 /* Crystal clock: 13MHz */
38 #define BASE_CLK 13000000
41 * Get the clock frequency as reflected by CCSR and the turbo flag.
42 * We assume these values have been applied via a fcs.
43 * If info is not 0 we also display the current settings.
45 unsigned int pxa27x_get_clk_frequency_khz(int info)
47 unsigned long ccsr, clkcfg;
48 unsigned int l, L, m, M, n2, N, S;
52 cccr_a = CCCR & (1 << 25);
54 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
55 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
56 t = clkcfg & (1 << 0);
57 ht = clkcfg & (1 << 2);
58 b = clkcfg & (1 << 3);
62 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
66 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
70 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
71 L / 1000000, (L % 1000000) / 10000, l );
72 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
73 N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
75 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
76 M / 1000000, (M % 1000000) / 10000, m );
77 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
78 S / 1000000, (S % 1000000) / 10000 );
81 return (t) ? (N/1000) : (L/1000);
85 * Return the current mem clock frequency in units of 10kHz as
86 * reflected by CCCR[A], B, and L
88 unsigned int pxa27x_get_memclk_frequency_10khz(void)
90 unsigned long ccsr, clkcfg;
91 unsigned int l, L, m, M;
95 cccr_a = CCCR & (1 << 25);
97 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
98 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
99 b = clkcfg & (1 << 3);
102 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
105 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
111 * Return the current LCD clock frequency in units of 10kHz as
113 static unsigned int pxa27x_get_lcdclk_frequency_10khz(void)
116 unsigned int l, L, k, K;
121 k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
129 static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
131 return pxa27x_get_lcdclk_frequency_10khz() * 10000;
134 static const struct clkops clk_pxa27x_lcd_ops = {
135 .enable = clk_cken_enable,
136 .disable = clk_cken_disable,
137 .getrate = clk_pxa27x_lcd_getrate,
140 static struct clk pxa27x_clks[] = {
141 INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
142 INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
144 INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
145 INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
146 INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
148 INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev),
149 INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
150 INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa27x_device_udc.dev),
151 INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev),
152 INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
154 INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
155 INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
156 INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
158 INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
159 INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
160 INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
161 INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
162 INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
164 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
165 INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
168 INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL),
169 INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
170 INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
171 INIT_CKEN("IMCLK", IM, 0, 0, NULL),
172 INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL),
178 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
179 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
182 * List of global PXA peripheral registers to preserve.
183 * More ones like CP and general purpose register values are preserved
184 * with the stack pointer in sleep.S.
186 enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
190 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
191 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
204 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
206 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
208 SAVE(GAFR0_L); SAVE(GAFR0_U);
209 SAVE(GAFR1_L); SAVE(GAFR1_U);
210 SAVE(GAFR2_L); SAVE(GAFR2_U);
211 SAVE(GAFR3_L); SAVE(GAFR3_U);
214 SAVE(PWER); SAVE(PCFR); SAVE(PRER);
215 SAVE(PFER); SAVE(PKWR);
221 void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
223 /* restore registers */
224 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
225 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
226 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
227 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
228 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
231 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
232 RESTORE(PFER); RESTORE(PKWR);
234 PSSR = PSSR_RDH | PSSR_PH;
241 void pxa27x_cpu_pm_enter(suspend_state_t state)
243 extern void pxa_cpu_standby(void);
245 /* ensure voltage-change sequencer not initiated, which hangs */
248 /* Clear edge-detect status register. */
251 /* Clear reset status */
252 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
255 case PM_SUSPEND_STANDBY:
259 pxa27x_cpu_suspend(PWRMODE_SLEEP);
264 static int pxa27x_cpu_pm_valid(suspend_state_t state)
266 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
269 static int pxa27x_cpu_pm_prepare(void)
271 /* set resume return address */
272 PSPR = virt_to_phys(pxa_cpu_resume);
276 static void pxa27x_cpu_pm_finish(void)
278 /* ensure not to come back here if it wasn't intended */
282 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
283 .save_count = SLEEP_SAVE_COUNT,
284 .save = pxa27x_cpu_pm_save,
285 .restore = pxa27x_cpu_pm_restore,
286 .valid = pxa27x_cpu_pm_valid,
287 .enter = pxa27x_cpu_pm_enter,
288 .prepare = pxa27x_cpu_pm_prepare,
289 .finish = pxa27x_cpu_pm_finish,
292 static void __init pxa27x_init_pm(void)
294 pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
297 static inline void pxa27x_init_pm(void) {}
300 /* PXA27x: Various gpios can issue wakeup events. This logic only
301 * handles the simple cases, not the WEMUX2 and WEMUX3 options
303 static int pxa27x_set_wake(unsigned int irq, unsigned int on)
305 int gpio = IRQ_TO_GPIO(irq);
308 if (gpio >= 0 && gpio < 128)
309 return gpio_set_wake(gpio, on);
311 if (irq == IRQ_KEYPAD)
312 return keypad_set_wake(on);
333 void __init pxa27x_init_irq(void)
335 pxa_init_irq(34, pxa27x_set_wake);
336 pxa_init_gpio(128, pxa27x_set_wake);
340 * device registration specific to PXA27x.
343 static struct resource i2c_power_resources[] = {
347 .flags = IORESOURCE_MEM,
351 .flags = IORESOURCE_IRQ,
355 struct platform_device pxa27x_device_i2c_power = {
356 .name = "pxa2xx-i2c",
358 .resource = i2c_power_resources,
359 .num_resources = ARRAY_SIZE(i2c_power_resources),
362 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
367 pxa27x_device_i2c_power.dev.platform_data = info;
370 static struct platform_device *devices[] __initdata = {
377 &pxa27x_device_i2c_power,
385 static struct sys_device pxa27x_sysdev[] = {
387 .cls = &pxa_irq_sysclass,
389 .cls = &pxa_gpio_sysclass,
393 static int __init pxa27x_init(void)
397 if (cpu_is_pxa27x()) {
401 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
403 if ((ret = pxa_init_dma(32)))
408 for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) {
409 ret = sysdev_register(&pxa27x_sysdev[i]);
411 pr_err("failed to register sysdev[%d]\n", i);
414 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
420 postcore_initcall(pxa27x_init);