arch/arm/mach-pxa/lpd270.c

   1 /*
   2  * linux/arch/arm/mach-pxa/lpd270.c
   3  *
   4  * Support for the LogicPD PXA270 Card Engine.
   5  * Derived from the mainstone code, which carries these notices:
   6  *
   7  * Author:      Nicolas Pitre
   8  * Created:     Nov 05, 2002
   9  * Copyright:   MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/pwm_backlight.h>
  27
  28 #include <asm/types.h>
  29 #include <asm/setup.h>
  30 #include <asm/memory.h>
  31 #include <asm/mach-types.h>
  32 #include <mach/hardware.h>
  33 #include <asm/irq.h>
  34 #include <asm/sizes.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/irq.h>
  39 #include <asm/mach/flash.h>
  40
  41 #include <mach/pxa27x.h>
  42 #include <mach/lpd270.h>
  43 #include <mach/audio.h>
  44 #include <mach/pxafb.h>
  45 #include <mach/mmc.h>
  46 #include <mach/irda.h>
  47 #include <mach/ohci.h>
  48
  49 #include "generic.h"
  50 #include "devices.h"
  51
  52 static unsigned long lpd270_pin_config[] __initdata = {
  53         /* Chip Selects */
  54         GPIO15_nCS_1,   /* Mainboard Flash */
  55         GPIO78_nCS_2,   /* CPLD + Ethernet */
  56
  57         /* LCD - 16bpp Active TFT */
  58         GPIO58_LCD_LDD_0,
  59         GPIO59_LCD_LDD_1,
  60         GPIO60_LCD_LDD_2,
  61         GPIO61_LCD_LDD_3,
  62         GPIO62_LCD_LDD_4,
  63         GPIO63_LCD_LDD_5,
  64         GPIO64_LCD_LDD_6,
  65         GPIO65_LCD_LDD_7,
  66         GPIO66_LCD_LDD_8,
  67         GPIO67_LCD_LDD_9,
  68         GPIO68_LCD_LDD_10,
  69         GPIO69_LCD_LDD_11,
  70         GPIO70_LCD_LDD_12,
  71         GPIO71_LCD_LDD_13,
  72         GPIO72_LCD_LDD_14,
  73         GPIO73_LCD_LDD_15,
  74         GPIO74_LCD_FCLK,
  75         GPIO75_LCD_LCLK,
  76         GPIO76_LCD_PCLK,
  77         GPIO77_LCD_BIAS,
  78         GPIO16_PWM0_OUT,        /* Backlight */
  79
  80         /* USB Host */
  81         GPIO88_USBH1_PWR,
  82         GPIO89_USBH1_PEN,
  83
  84         /* AC97 */
  85         GPIO45_AC97_SYSCLK,
  86
  87         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  88 };
  89
  90 static unsigned int lpd270_irq_enabled;
  91
  92 static void lpd270_mask_irq(unsigned int irq)
  93 {
  94         int lpd270_irq = irq - LPD270_IRQ(0);
  95
  96         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
  97
  98         lpd270_irq_enabled &= ~(1 << lpd270_irq);
  99         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 100 }
 101
 102 static void lpd270_unmask_irq(unsigned int irq)
 103 {
 104         int lpd270_irq = irq - LPD270_IRQ(0);
 105
 106         lpd270_irq_enabled |= 1 << lpd270_irq;
 107         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 108 }
 109
 110 static struct irq_chip lpd270_irq_chip = {
 111         .name           = "CPLD",
 112         .ack            = lpd270_mask_irq,
 113         .mask           = lpd270_mask_irq,
 114         .unmask         = lpd270_unmask_irq,
 115 };
 116
 117 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 118 {
 119         unsigned long pending;
 120
 121         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
 122         do {
 123                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
 124                 if (likely(pending)) {
 125                         irq = LPD270_IRQ(0) + __ffs(pending);
 126                         generic_handle_irq(irq);
 127
 128                         pending = __raw_readw(LPD270_INT_STATUS) &
 129                                                 lpd270_irq_enabled;
 130                 }
 131         } while (pending);
 132 }
 133
 134 static void __init lpd270_init_irq(void)
 135 {
 136         int irq;
 137
 138         pxa27x_init_irq();
 139
 140         __raw_writew(0, LPD270_INT_MASK);
 141         __raw_writew(0, LPD270_INT_STATUS);
 142
 143         /* setup extra LogicPD PXA270 irqs */
 144         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
 145                 set_irq_chip(irq, &lpd270_irq_chip);
 146                 set_irq_handler(irq, handle_level_irq);
 147                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 148         }
 149         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
 150         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 151 }
 152
 153
 154 #ifdef CONFIG_PM
 155 static int lpd270_irq_resume(struct sys_device *dev)
 156 {
 157         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 158         return 0;
 159 }
 160
 161 static struct sysdev_class lpd270_irq_sysclass = {
 162         .name = "cpld_irq",
 163         .resume = lpd270_irq_resume,
 164 };
 165
 166 static struct sys_device lpd270_irq_device = {
 167         .cls = &lpd270_irq_sysclass,
 168 };
 169
 170 static int __init lpd270_irq_device_init(void)
 171 {
 172         int ret = -ENODEV;
 173         if (machine_is_logicpd_pxa270()) {
 174                 ret = sysdev_class_register(&lpd270_irq_sysclass);
 175                 if (ret == 0)
 176                         ret = sysdev_register(&lpd270_irq_device);
 177         }
 178         return ret;
 179 }
 180
 181 device_initcall(lpd270_irq_device_init);
 182 #endif
 183
 184
 185 static struct resource smc91x_resources[] = {
 186         [0] = {
 187                 .start  = LPD270_ETH_PHYS,
 188                 .end    = (LPD270_ETH_PHYS + 0xfffff),
 189                 .flags  = IORESOURCE_MEM,
 190         },
 191         [1] = {
 192                 .start  = LPD270_ETHERNET_IRQ,
 193                 .end    = LPD270_ETHERNET_IRQ,
 194                 .flags  = IORESOURCE_IRQ,
 195         },
 196 };
 197
 198 static struct platform_device smc91x_device = {
 199         .name           = "smc91x",
 200         .id             = 0,
 201         .num_resources  = ARRAY_SIZE(smc91x_resources),
 202         .resource       = smc91x_resources,
 203 };
 204
 205 static struct resource lpd270_flash_resources[] = {
 206         [0] = {
 207                 .start  = PXA_CS0_PHYS,
 208                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 209                 .flags  = IORESOURCE_MEM,
 210         },
 211         [1] = {
 212                 .start  = PXA_CS1_PHYS,
 213                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 214                 .flags  = IORESOURCE_MEM,
 215         },
 216 };
 217
 218 static struct mtd_partition lpd270_flash0_partitions[] = {
 219         {
 220                 .name =         "Bootloader",
 221                 .size =         0x00040000,
 222                 .offset =       0,
 223                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 224         }, {
 225                 .name =         "Kernel",
 226                 .size =         0x00400000,
 227                 .offset =       0x00040000,
 228         }, {
 229                 .name =         "Filesystem",
 230                 .size =         MTDPART_SIZ_FULL,
 231                 .offset =       0x00440000
 232         },
 233 };
 234
 235 static struct flash_platform_data lpd270_flash_data[2] = {
 236         {
 237                 .name           = "processor-flash",
 238                 .map_name       = "cfi_probe",
 239                 .parts          = lpd270_flash0_partitions,
 240                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
 241         }, {
 242                 .name           = "mainboard-flash",
 243                 .map_name       = "cfi_probe",
 244                 .parts          = NULL,
 245                 .nr_parts       = 0,
 246         }
 247 };
 248
 249 static struct platform_device lpd270_flash_device[2] = {
 250         {
 251                 .name           = "pxa2xx-flash",
 252                 .id             = 0,
 253                 .dev = {
 254                         .platform_data  = &lpd270_flash_data[0],
 255                 },
 256                 .resource       = &lpd270_flash_resources[0],
 257                 .num_resources  = 1,
 258         }, {
 259                 .name           = "pxa2xx-flash",
 260                 .id             = 1,
 261                 .dev = {
 262                         .platform_data  = &lpd270_flash_data[1],
 263                 },
 264                 .resource       = &lpd270_flash_resources[1],
 265                 .num_resources  = 1,
 266         },
 267 };
 268
 269 static struct platform_pwm_backlight_data lpd270_backlight_data = {
 270         .pwm_id         = 0,
 271         .max_brightness = 1,
 272         .dft_brightness = 1,
 273         .pwm_period_ns  = 78770,
 274 };
 275
 276 static struct platform_device lpd270_backlight_device = {
 277         .name           = "pwm-backlight",
 278         .dev            = {
 279                 .parent = &pxa27x_device_pwm0.dev,
 280                 .platform_data = &lpd270_backlight_data,
 281         },
 282 };
 283
 284 /* 5.7" TFT QVGA (LoLo display number 1) */
 285 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 286         .pixclock               = 150000,
 287         .xres                   = 320,
 288         .yres                   = 240,
 289         .bpp                    = 16,
 290         .hsync_len              = 0x14,
 291         .left_margin            = 0x28,
 292         .right_margin           = 0x0a,
 293         .vsync_len              = 0x02,
 294         .upper_margin           = 0x08,
 295         .lower_margin           = 0x14,
 296         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 297 };
 298
 299 static struct pxafb_mach_info sharp_lq057q3dc02 = {
 300         .modes                  = &sharp_lq057q3dc02_mode,
 301         .num_modes              = 1,
 302         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 303                                   LCD_ALTERNATE_MAPPING,
 304 };
 305
 306 /* 12.1" TFT SVGA (LoLo display number 2) */
 307 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 308         .pixclock               = 50000,
 309         .xres                   = 800,
 310         .yres                   = 600,
 311         .bpp                    = 16,
 312         .hsync_len              = 0x05,
 313         .left_margin            = 0x52,
 314         .right_margin           = 0x05,
 315         .vsync_len              = 0x04,
 316         .upper_margin           = 0x14,
 317         .lower_margin           = 0x0a,
 318         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 319 };
 320
 321 static struct pxafb_mach_info sharp_lq121s1dg31 = {
 322         .modes                  = &sharp_lq121s1dg31_mode,
 323         .num_modes              = 1,
 324         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 325                                   LCD_ALTERNATE_MAPPING,
 326 };
 327
 328 /* 3.6" TFT QVGA (LoLo display number 3) */
 329 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 330         .pixclock               = 150000,
 331         .xres                   = 320,
 332         .yres                   = 240,
 333         .bpp                    = 16,
 334         .hsync_len              = 0x0e,
 335         .left_margin            = 0x04,
 336         .right_margin           = 0x0a,
 337         .vsync_len              = 0x03,
 338         .upper_margin           = 0x03,
 339         .lower_margin           = 0x03,
 340         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 341 };
 342
 343 static struct pxafb_mach_info sharp_lq036q1da01 = {
 344         .modes                  = &sharp_lq036q1da01_mode,
 345         .num_modes              = 1,
 346         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 347                                   LCD_ALTERNATE_MAPPING,
 348 };
 349
 350 /* 6.4" TFT VGA (LoLo display number 5) */
 351 static struct pxafb_mode_info sharp_lq64d343_mode = {
 352         .pixclock               = 25000,
 353         .xres                   = 640,
 354         .yres                   = 480,
 355         .bpp                    = 16,
 356         .hsync_len              = 0x31,
 357         .left_margin            = 0x89,
 358         .right_margin           = 0x19,
 359         .vsync_len              = 0x12,
 360         .upper_margin           = 0x22,
 361         .lower_margin           = 0x00,
 362         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 363 };
 364
 365 static struct pxafb_mach_info sharp_lq64d343 = {
 366         .modes                  = &sharp_lq64d343_mode,
 367         .num_modes              = 1,
 368         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 369                                   LCD_ALTERNATE_MAPPING,
 370 };
 371
 372 /* 10.4" TFT VGA (LoLo display number 7) */
 373 static struct pxafb_mode_info sharp_lq10d368_mode = {
 374         .pixclock               = 25000,
 375         .xres                   = 640,
 376         .yres                   = 480,
 377         .bpp                    = 16,
 378         .hsync_len              = 0x31,
 379         .left_margin            = 0x89,
 380         .right_margin           = 0x19,
 381         .vsync_len              = 0x12,
 382         .upper_margin           = 0x22,
 383         .lower_margin           = 0x00,
 384         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 385 };
 386
 387 static struct pxafb_mach_info sharp_lq10d368 = {
 388         .modes                  = &sharp_lq10d368_mode,
 389         .num_modes              = 1,
 390         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 391                                   LCD_ALTERNATE_MAPPING,
 392 };
 393
 394 /* 3.5" TFT QVGA (LoLo display number 8) */
 395 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 396         .pixclock               = 150000,
 397         .xres                   = 240,
 398         .yres                   = 320,
 399         .bpp                    = 16,
 400         .hsync_len              = 0x0e,
 401         .left_margin            = 0x0a,
 402         .right_margin           = 0x0a,
 403         .vsync_len              = 0x03,
 404         .upper_margin           = 0x05,
 405         .lower_margin           = 0x14,
 406         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 407 };
 408
 409 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 410         .modes                  = &sharp_lq035q7db02_20_mode,
 411         .num_modes              = 1,
 412         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 413                                   LCD_ALTERNATE_MAPPING,
 414 };
 415
 416 static struct pxafb_mach_info *lpd270_lcd_to_use;
 417
 418 static int __init lpd270_set_lcd(char *str)
 419 {
 420         if (!strnicmp(str, "lq057q3dc02", 11)) {
 421                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
 422         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
 423                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
 424         } else if (!strnicmp(str, "lq036q1da01", 11)) {
 425                 lpd270_lcd_to_use = &sharp_lq036q1da01;
 426         } else if (!strnicmp(str, "lq64d343", 8)) {
 427                 lpd270_lcd_to_use = &sharp_lq64d343;
 428         } else if (!strnicmp(str, "lq10d368", 8)) {
 429                 lpd270_lcd_to_use = &sharp_lq10d368;
 430         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 431                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 432         } else {
 433                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 434         }
 435
 436         return 1;
 437 }
 438
 439 __setup("lcd=", lpd270_set_lcd);
 440
 441 static struct platform_device *platform_devices[] __initdata = {
 442         &smc91x_device,
 443         &lpd270_backlight_device,
 444         &lpd270_flash_device[0],
 445         &lpd270_flash_device[1],
 446 };
 447
 448 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
 449         .port_mode      = PMM_PERPORT_MODE,
 450         .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 451 };
 452
 453 static void __init lpd270_init(void)
 454 {
 455         pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
 456
 457         lpd270_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
 458         lpd270_flash_data[1].width = 4;
 459
 460         /*
 461          * System bus arbiter setting:
 462          * - Core_Park
 463          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 464          */
 465         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 466
 467         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 468
 469         pxa_set_ac97_info(NULL);
 470
 471         if (lpd270_lcd_to_use != NULL)
 472                 set_pxa_fb_info(lpd270_lcd_to_use);
 473
 474         pxa_set_ohci_info(&lpd270_ohci_platform_data);
 475 }
 476
 477
 478 static struct map_desc lpd270_io_desc[] __initdata = {
 479         {
 480                 .virtual        = LPD270_CPLD_VIRT,
 481                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
 482                 .length         = LPD270_CPLD_SIZE,
 483                 .type           = MT_DEVICE,
 484         },
 485 };
 486
 487 static void __init lpd270_map_io(void)
 488 {
 489         pxa_map_io();
 490         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 491
 492         /* for use I SRAM as framebuffer.  */
 493         PSLR |= 0x00000F04;
 494         PCFR  = 0x00000066;
 495 }
 496
 497 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
 498         /* Maintainer: Peter Barada */
 499         .phys_io        = 0x40000000,
 500         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 501         .boot_params    = 0xa0000100,
 502         .map_io         = lpd270_map_io,
 503         .init_irq       = lpd270_init_irq,
 504         .timer          = &pxa_timer,
 505         .init_machine   = lpd270_init,
 506 MACHINE_END