2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mbus.h>
18 #include <linux/mv643xx_eth.h>
19 #include <linux/mv643xx_i2c.h>
20 #include <linux/ata_platform.h>
21 #include <linux/spi/orion_spi.h>
24 #include <asm/setup.h>
25 #include <asm/timex.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <mach/hardware.h>
30 #include <mach/orion5x.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/time.h>
37 /*****************************************************************************
39 ****************************************************************************/
40 static struct map_desc orion5x_io_desc[] __initdata = {
42 .virtual = ORION5X_REGS_VIRT_BASE,
43 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
44 .length = ORION5X_REGS_SIZE,
47 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
48 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
49 .length = ORION5X_PCIE_IO_SIZE,
52 .virtual = ORION5X_PCI_IO_VIRT_BASE,
53 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
54 .length = ORION5X_PCI_IO_SIZE,
57 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
58 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59 .length = ORION5X_PCIE_WA_SIZE,
64 void __init orion5x_map_io(void)
66 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
70 /*****************************************************************************
72 ****************************************************************************/
73 static struct orion_ehci_data orion5x_ehci_data = {
74 .dram = &orion5x_mbus_dram_info,
77 static u64 ehci_dmamask = 0xffffffffUL;
80 /*****************************************************************************
82 ****************************************************************************/
83 static struct resource orion5x_ehci0_resources[] = {
85 .start = ORION5X_USB0_PHYS_BASE,
86 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
87 .flags = IORESOURCE_MEM,
89 .start = IRQ_ORION5X_USB0_CTRL,
90 .end = IRQ_ORION5X_USB0_CTRL,
91 .flags = IORESOURCE_IRQ,
95 static struct platform_device orion5x_ehci0 = {
99 .dma_mask = &ehci_dmamask,
100 .coherent_dma_mask = 0xffffffff,
101 .platform_data = &orion5x_ehci_data,
103 .resource = orion5x_ehci0_resources,
104 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
107 void __init orion5x_ehci0_init(void)
109 platform_device_register(&orion5x_ehci0);
113 /*****************************************************************************
115 ****************************************************************************/
116 static struct resource orion5x_ehci1_resources[] = {
118 .start = ORION5X_USB1_PHYS_BASE,
119 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
120 .flags = IORESOURCE_MEM,
122 .start = IRQ_ORION5X_USB1_CTRL,
123 .end = IRQ_ORION5X_USB1_CTRL,
124 .flags = IORESOURCE_IRQ,
128 static struct platform_device orion5x_ehci1 = {
129 .name = "orion-ehci",
132 .dma_mask = &ehci_dmamask,
133 .coherent_dma_mask = 0xffffffff,
134 .platform_data = &orion5x_ehci_data,
136 .resource = orion5x_ehci1_resources,
137 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
140 void __init orion5x_ehci1_init(void)
142 platform_device_register(&orion5x_ehci1);
146 /*****************************************************************************
148 ****************************************************************************/
149 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
150 .dram = &orion5x_mbus_dram_info,
153 static struct resource orion5x_eth_shared_resources[] = {
155 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
156 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
157 .flags = IORESOURCE_MEM,
159 .start = IRQ_ORION5X_ETH_ERR,
160 .end = IRQ_ORION5X_ETH_ERR,
161 .flags = IORESOURCE_IRQ,
165 static struct platform_device orion5x_eth_shared = {
166 .name = MV643XX_ETH_SHARED_NAME,
169 .platform_data = &orion5x_eth_shared_data,
171 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
172 .resource = orion5x_eth_shared_resources,
175 static struct resource orion5x_eth_resources[] = {
178 .start = IRQ_ORION5X_ETH_SUM,
179 .end = IRQ_ORION5X_ETH_SUM,
180 .flags = IORESOURCE_IRQ,
184 static struct platform_device orion5x_eth = {
185 .name = MV643XX_ETH_NAME,
188 .resource = orion5x_eth_resources,
191 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
193 eth_data->shared = &orion5x_eth_shared;
194 orion5x_eth.dev.platform_data = eth_data;
196 platform_device_register(&orion5x_eth_shared);
197 platform_device_register(&orion5x_eth);
201 /*****************************************************************************
203 ****************************************************************************/
204 static struct resource orion5x_switch_resources[] = {
208 .flags = IORESOURCE_IRQ,
212 static struct platform_device orion5x_switch_device = {
216 .resource = orion5x_switch_resources,
219 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
222 orion5x_switch_resources[0].start = irq;
223 orion5x_switch_resources[0].end = irq;
224 orion5x_switch_device.num_resources = 1;
227 d->mii_bus = &orion5x_eth_shared.dev;
228 d->netdev = &orion5x_eth.dev;
229 orion5x_switch_device.dev.platform_data = d;
231 platform_device_register(&orion5x_switch_device);
235 /*****************************************************************************
237 ****************************************************************************/
238 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
239 .freq_m = 8, /* assumes 166 MHz TCLK */
241 .timeout = 1000, /* Default timeout of 1 second */
244 static struct resource orion5x_i2c_resources[] = {
247 .start = I2C_PHYS_BASE,
248 .end = I2C_PHYS_BASE + 0x1f,
249 .flags = IORESOURCE_MEM,
252 .start = IRQ_ORION5X_I2C,
253 .end = IRQ_ORION5X_I2C,
254 .flags = IORESOURCE_IRQ,
258 static struct platform_device orion5x_i2c = {
259 .name = MV64XXX_I2C_CTLR_NAME,
261 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
262 .resource = orion5x_i2c_resources,
264 .platform_data = &orion5x_i2c_pdata,
268 void __init orion5x_i2c_init(void)
270 platform_device_register(&orion5x_i2c);
274 /*****************************************************************************
276 ****************************************************************************/
277 static struct resource orion5x_sata_resources[] = {
280 .start = ORION5X_SATA_PHYS_BASE,
281 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
282 .flags = IORESOURCE_MEM,
285 .start = IRQ_ORION5X_SATA,
286 .end = IRQ_ORION5X_SATA,
287 .flags = IORESOURCE_IRQ,
291 static struct platform_device orion5x_sata = {
295 .coherent_dma_mask = 0xffffffff,
297 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
298 .resource = orion5x_sata_resources,
301 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
303 sata_data->dram = &orion5x_mbus_dram_info;
304 orion5x_sata.dev.platform_data = sata_data;
305 platform_device_register(&orion5x_sata);
309 /*****************************************************************************
311 ****************************************************************************/
312 static struct orion_spi_info orion5x_spi_plat_data = {
316 static struct resource orion5x_spi_resources[] = {
319 .start = SPI_PHYS_BASE,
320 .end = SPI_PHYS_BASE + 0x1f,
321 .flags = IORESOURCE_MEM,
325 static struct platform_device orion5x_spi = {
329 .platform_data = &orion5x_spi_plat_data,
331 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
332 .resource = orion5x_spi_resources,
335 void __init orion5x_spi_init()
337 platform_device_register(&orion5x_spi);
341 /*****************************************************************************
343 ****************************************************************************/
344 static struct plat_serial8250_port orion5x_uart0_data[] = {
346 .mapbase = UART0_PHYS_BASE,
347 .membase = (char *)UART0_VIRT_BASE,
348 .irq = IRQ_ORION5X_UART0,
349 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
357 static struct resource orion5x_uart0_resources[] = {
359 .start = UART0_PHYS_BASE,
360 .end = UART0_PHYS_BASE + 0xff,
361 .flags = IORESOURCE_MEM,
363 .start = IRQ_ORION5X_UART0,
364 .end = IRQ_ORION5X_UART0,
365 .flags = IORESOURCE_IRQ,
369 static struct platform_device orion5x_uart0 = {
370 .name = "serial8250",
371 .id = PLAT8250_DEV_PLATFORM,
373 .platform_data = orion5x_uart0_data,
375 .resource = orion5x_uart0_resources,
376 .num_resources = ARRAY_SIZE(orion5x_uart0_resources),
379 void __init orion5x_uart0_init(void)
381 platform_device_register(&orion5x_uart0);
385 /*****************************************************************************
387 ****************************************************************************/
388 static struct plat_serial8250_port orion5x_uart1_data[] = {
390 .mapbase = UART1_PHYS_BASE,
391 .membase = (char *)UART1_VIRT_BASE,
392 .irq = IRQ_ORION5X_UART1,
393 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
401 static struct resource orion5x_uart1_resources[] = {
403 .start = UART1_PHYS_BASE,
404 .end = UART1_PHYS_BASE + 0xff,
405 .flags = IORESOURCE_MEM,
407 .start = IRQ_ORION5X_UART1,
408 .end = IRQ_ORION5X_UART1,
409 .flags = IORESOURCE_IRQ,
413 static struct platform_device orion5x_uart1 = {
414 .name = "serial8250",
415 .id = PLAT8250_DEV_PLATFORM1,
417 .platform_data = orion5x_uart1_data,
419 .resource = orion5x_uart1_resources,
420 .num_resources = ARRAY_SIZE(orion5x_uart1_resources),
423 void __init orion5x_uart1_init(void)
425 platform_device_register(&orion5x_uart1);
429 /*****************************************************************************
431 ****************************************************************************/
432 static struct resource orion5x_xor_shared_resources[] = {
435 .start = ORION5X_XOR_PHYS_BASE,
436 .end = ORION5X_XOR_PHYS_BASE + 0xff,
437 .flags = IORESOURCE_MEM,
440 .start = ORION5X_XOR_PHYS_BASE + 0x200,
441 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
442 .flags = IORESOURCE_MEM,
446 static struct platform_device orion5x_xor_shared = {
447 .name = MV_XOR_SHARED_NAME,
449 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
450 .resource = orion5x_xor_shared_resources,
453 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
455 static struct resource orion5x_xor0_resources[] = {
457 .start = IRQ_ORION5X_XOR0,
458 .end = IRQ_ORION5X_XOR0,
459 .flags = IORESOURCE_IRQ,
463 static struct mv_xor_platform_data orion5x_xor0_data = {
464 .shared = &orion5x_xor_shared,
466 .pool_size = PAGE_SIZE,
469 static struct platform_device orion5x_xor0_channel = {
472 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
473 .resource = orion5x_xor0_resources,
475 .dma_mask = &orion5x_xor_dmamask,
476 .coherent_dma_mask = DMA_64BIT_MASK,
477 .platform_data = (void *)&orion5x_xor0_data,
481 static struct resource orion5x_xor1_resources[] = {
483 .start = IRQ_ORION5X_XOR1,
484 .end = IRQ_ORION5X_XOR1,
485 .flags = IORESOURCE_IRQ,
489 static struct mv_xor_platform_data orion5x_xor1_data = {
490 .shared = &orion5x_xor_shared,
492 .pool_size = PAGE_SIZE,
495 static struct platform_device orion5x_xor1_channel = {
498 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
499 .resource = orion5x_xor1_resources,
501 .dma_mask = &orion5x_xor_dmamask,
502 .coherent_dma_mask = DMA_64BIT_MASK,
503 .platform_data = (void *)&orion5x_xor1_data,
507 void __init orion5x_xor_init(void)
509 platform_device_register(&orion5x_xor_shared);
512 * two engines can't do memset simultaneously, this limitation
513 * satisfied by removing memset support from one of the engines.
515 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
516 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
517 platform_device_register(&orion5x_xor0_channel);
519 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
520 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
521 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
522 platform_device_register(&orion5x_xor1_channel);
526 /*****************************************************************************
528 ****************************************************************************/
531 int __init orion5x_find_tclk(void)
535 orion5x_pcie_id(&dev, &rev);
536 if (dev == MV88F6183_DEV_ID &&
537 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
543 static void orion5x_timer_init(void)
545 orion5x_tclk = orion5x_find_tclk();
546 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
549 struct sys_timer orion5x_timer = {
550 .init = orion5x_timer_init,
554 /*****************************************************************************
556 ****************************************************************************/
558 * Identify device ID and rev from PCIe configuration header space '0'.
560 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
562 orion5x_pcie_id(dev, rev);
564 if (*dev == MV88F5281_DEV_ID) {
565 if (*rev == MV88F5281_REV_D2) {
566 *dev_name = "MV88F5281-D2";
567 } else if (*rev == MV88F5281_REV_D1) {
568 *dev_name = "MV88F5281-D1";
569 } else if (*rev == MV88F5281_REV_D0) {
570 *dev_name = "MV88F5281-D0";
572 *dev_name = "MV88F5281-Rev-Unsupported";
574 } else if (*dev == MV88F5182_DEV_ID) {
575 if (*rev == MV88F5182_REV_A2) {
576 *dev_name = "MV88F5182-A2";
578 *dev_name = "MV88F5182-Rev-Unsupported";
580 } else if (*dev == MV88F5181_DEV_ID) {
581 if (*rev == MV88F5181_REV_B1) {
582 *dev_name = "MV88F5181-Rev-B1";
583 } else if (*rev == MV88F5181L_REV_A1) {
584 *dev_name = "MV88F5181L-Rev-A1";
586 *dev_name = "MV88F5181(L)-Rev-Unsupported";
588 } else if (*dev == MV88F6183_DEV_ID) {
589 if (*rev == MV88F6183_REV_B0) {
590 *dev_name = "MV88F6183-Rev-B0";
592 *dev_name = "MV88F6183-Rev-Unsupported";
595 *dev_name = "Device-Unknown";
599 void __init orion5x_init(void)
604 orion5x_id(&dev, &rev, &dev_name);
605 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
607 orion5x_eth_shared_data.t_clk = orion5x_tclk;
608 orion5x_spi_plat_data.tclk = orion5x_tclk;
609 orion5x_uart0_data[0].uartclk = orion5x_tclk;
610 orion5x_uart1_data[0].uartclk = orion5x_tclk;
613 * Setup Orion address map
615 orion5x_setup_cpu_mbus_bridge();
618 * Don't issue "Wait for Interrupt" instruction if we are
619 * running on D0 5281 silicon.
621 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
622 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
628 * Many orion-based systems have buggy bootloader implementations.
629 * This is a common fixup for bogus memory tags.
631 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
632 char **from, struct meminfo *meminfo)
634 for (; t->hdr.size; t = tag_next(t))
635 if (t->hdr.tag == ATAG_MEM &&
636 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
637 t->u.mem.start & ~PAGE_MASK)) {
639 "Clearing invalid memory bank %dKB@0x%08x\n",
640 t->u.mem.size / 1024, t->u.mem.start);