arch/arm/mach-orion5x/common.c

   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <linux/spi/orion_spi.h>
  22 #include <net/dsa.h>
  23 #include <asm/page.h>
  24 #include <asm/setup.h>
  25 #include <asm/timex.h>
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/time.h>
  29 #include <mach/hardware.h>
  30 #include <mach/orion5x.h>
  31 #include <plat/ehci-orion.h>
  32 #include <plat/mv_xor.h>
  33 #include <plat/orion_nand.h>
  34 #include <plat/time.h>
  35 #include "common.h"
  36
  37 /*****************************************************************************
  38  * I/O Address Mapping
  39  ****************************************************************************/
  40 static struct map_desc orion5x_io_desc[] __initdata = {
  41         {
  42                 .virtual        = ORION5X_REGS_VIRT_BASE,
  43                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  44                 .length         = ORION5X_REGS_SIZE,
  45                 .type           = MT_DEVICE,
  46         }, {
  47                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  48                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  49                 .length         = ORION5X_PCIE_IO_SIZE,
  50                 .type           = MT_DEVICE,
  51         }, {
  52                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  53                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  54                 .length         = ORION5X_PCI_IO_SIZE,
  55                 .type           = MT_DEVICE,
  56         }, {
  57                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  58                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  59                 .length         = ORION5X_PCIE_WA_SIZE,
  60                 .type           = MT_DEVICE,
  61         },
  62 };
  63
  64 void __init orion5x_map_io(void)
  65 {
  66         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  67 }
  68
  69
  70 /*****************************************************************************
  71  * EHCI
  72  ****************************************************************************/
  73 static struct orion_ehci_data orion5x_ehci_data = {
  74         .dram           = &orion5x_mbus_dram_info,
  75 };
  76
  77 static u64 ehci_dmamask = 0xffffffffUL;
  78
  79
  80 /*****************************************************************************
  81  * EHCI0
  82  ****************************************************************************/
  83 static struct resource orion5x_ehci0_resources[] = {
  84         {
  85                 .start  = ORION5X_USB0_PHYS_BASE,
  86                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  87                 .flags  = IORESOURCE_MEM,
  88         }, {
  89                 .start  = IRQ_ORION5X_USB0_CTRL,
  90                 .end    = IRQ_ORION5X_USB0_CTRL,
  91                 .flags  = IORESOURCE_IRQ,
  92         },
  93 };
  94
  95 static struct platform_device orion5x_ehci0 = {
  96         .name           = "orion-ehci",
  97         .id             = 0,
  98         .dev            = {
  99                 .dma_mask               = &ehci_dmamask,
 100                 .coherent_dma_mask      = 0xffffffff,
 101                 .platform_data          = &orion5x_ehci_data,
 102         },
 103         .resource       = orion5x_ehci0_resources,
 104         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 105 };
 106
 107 void __init orion5x_ehci0_init(void)
 108 {
 109         platform_device_register(&orion5x_ehci0);
 110 }
 111
 112
 113 /*****************************************************************************
 114  * EHCI1
 115  ****************************************************************************/
 116 static struct resource orion5x_ehci1_resources[] = {
 117         {
 118                 .start  = ORION5X_USB1_PHYS_BASE,
 119                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 120                 .flags  = IORESOURCE_MEM,
 121         }, {
 122                 .start  = IRQ_ORION5X_USB1_CTRL,
 123                 .end    = IRQ_ORION5X_USB1_CTRL,
 124                 .flags  = IORESOURCE_IRQ,
 125         },
 126 };
 127
 128 static struct platform_device orion5x_ehci1 = {
 129         .name           = "orion-ehci",
 130         .id             = 1,
 131         .dev            = {
 132                 .dma_mask               = &ehci_dmamask,
 133                 .coherent_dma_mask      = 0xffffffff,
 134                 .platform_data          = &orion5x_ehci_data,
 135         },
 136         .resource       = orion5x_ehci1_resources,
 137         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 138 };
 139
 140 void __init orion5x_ehci1_init(void)
 141 {
 142         platform_device_register(&orion5x_ehci1);
 143 }
 144
 145
 146 /*****************************************************************************
 147  * GigE
 148  ****************************************************************************/
 149 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 150         .dram           = &orion5x_mbus_dram_info,
 151 };
 152
 153 static struct resource orion5x_eth_shared_resources[] = {
 154         {
 155                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 156                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 157                 .flags  = IORESOURCE_MEM,
 158         }, {
 159                 .start  = IRQ_ORION5X_ETH_ERR,
 160                 .end    = IRQ_ORION5X_ETH_ERR,
 161                 .flags  = IORESOURCE_IRQ,
 162         },
 163 };
 164
 165 static struct platform_device orion5x_eth_shared = {
 166         .name           = MV643XX_ETH_SHARED_NAME,
 167         .id             = 0,
 168         .dev            = {
 169                 .platform_data  = &orion5x_eth_shared_data,
 170         },
 171         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
 172         .resource       = orion5x_eth_shared_resources,
 173 };
 174
 175 static struct resource orion5x_eth_resources[] = {
 176         {
 177                 .name   = "eth irq",
 178                 .start  = IRQ_ORION5X_ETH_SUM,
 179                 .end    = IRQ_ORION5X_ETH_SUM,
 180                 .flags  = IORESOURCE_IRQ,
 181         },
 182 };
 183
 184 static struct platform_device orion5x_eth = {
 185         .name           = MV643XX_ETH_NAME,
 186         .id             = 0,
 187         .num_resources  = 1,
 188         .resource       = orion5x_eth_resources,
 189 };
 190
 191 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 192 {
 193         eth_data->shared = &orion5x_eth_shared;
 194         orion5x_eth.dev.platform_data = eth_data;
 195
 196         platform_device_register(&orion5x_eth_shared);
 197         platform_device_register(&orion5x_eth);
 198 }
 199
 200
 201 /*****************************************************************************
 202  * Ethernet switch
 203  ****************************************************************************/
 204 static struct resource orion5x_switch_resources[] = {
 205         {
 206                 .start  = 0,
 207                 .end    = 0,
 208                 .flags  = IORESOURCE_IRQ,
 209         },
 210 };
 211
 212 static struct platform_device orion5x_switch_device = {
 213         .name           = "dsa",
 214         .id             = 0,
 215         .num_resources  = 0,
 216         .resource       = orion5x_switch_resources,
 217 };
 218
 219 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
 220 {
 221         if (irq != NO_IRQ) {
 222                 orion5x_switch_resources[0].start = irq;
 223                 orion5x_switch_resources[0].end = irq;
 224                 orion5x_switch_device.num_resources = 1;
 225         }
 226
 227         d->mii_bus = &orion5x_eth_shared.dev;
 228         d->netdev = &orion5x_eth.dev;
 229         orion5x_switch_device.dev.platform_data = d;
 230
 231         platform_device_register(&orion5x_switch_device);
 232 }
 233
 234
 235 /*****************************************************************************
 236  * I2C
 237  ****************************************************************************/
 238 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 239         .freq_m         = 8, /* assumes 166 MHz TCLK */
 240         .freq_n         = 3,
 241         .timeout        = 1000, /* Default timeout of 1 second */
 242 };
 243
 244 static struct resource orion5x_i2c_resources[] = {
 245         {
 246                 .name   = "i2c base",
 247                 .start  = I2C_PHYS_BASE,
 248                 .end    = I2C_PHYS_BASE + 0x1f,
 249                 .flags  = IORESOURCE_MEM,
 250         }, {
 251                 .name   = "i2c irq",
 252                 .start  = IRQ_ORION5X_I2C,
 253                 .end    = IRQ_ORION5X_I2C,
 254                 .flags  = IORESOURCE_IRQ,
 255         },
 256 };
 257
 258 static struct platform_device orion5x_i2c = {
 259         .name           = MV64XXX_I2C_CTLR_NAME,
 260         .id             = 0,
 261         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 262         .resource       = orion5x_i2c_resources,
 263         .dev            = {
 264                 .platform_data  = &orion5x_i2c_pdata,
 265         },
 266 };
 267
 268 void __init orion5x_i2c_init(void)
 269 {
 270         platform_device_register(&orion5x_i2c);
 271 }
 272
 273
 274 /*****************************************************************************
 275  * SATA
 276  ****************************************************************************/
 277 static struct resource orion5x_sata_resources[] = {
 278         {
 279                 .name   = "sata base",
 280                 .start  = ORION5X_SATA_PHYS_BASE,
 281                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 282                 .flags  = IORESOURCE_MEM,
 283         }, {
 284                 .name   = "sata irq",
 285                 .start  = IRQ_ORION5X_SATA,
 286                 .end    = IRQ_ORION5X_SATA,
 287                 .flags  = IORESOURCE_IRQ,
 288         },
 289 };
 290
 291 static struct platform_device orion5x_sata = {
 292         .name           = "sata_mv",
 293         .id             = 0,
 294         .dev            = {
 295                 .coherent_dma_mask      = 0xffffffff,
 296         },
 297         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 298         .resource       = orion5x_sata_resources,
 299 };
 300
 301 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 302 {
 303         sata_data->dram = &orion5x_mbus_dram_info;
 304         orion5x_sata.dev.platform_data = sata_data;
 305         platform_device_register(&orion5x_sata);
 306 }
 307
 308
 309 /*****************************************************************************
 310  * SPI
 311  ****************************************************************************/
 312 static struct orion_spi_info orion5x_spi_plat_data = {
 313         .tclk           = 0,
 314 };
 315
 316 static struct resource orion5x_spi_resources[] = {
 317         {
 318                 .name   = "spi base",
 319                 .start  = SPI_PHYS_BASE,
 320                 .end    = SPI_PHYS_BASE + 0x1f,
 321                 .flags  = IORESOURCE_MEM,
 322         },
 323 };
 324
 325 static struct platform_device orion5x_spi = {
 326         .name           = "orion_spi",
 327         .id             = 0,
 328         .dev            = {
 329                 .platform_data  = &orion5x_spi_plat_data,
 330         },
 331         .num_resources  = ARRAY_SIZE(orion5x_spi_resources),
 332         .resource       = orion5x_spi_resources,
 333 };
 334
 335 void __init orion5x_spi_init()
 336 {
 337         platform_device_register(&orion5x_spi);
 338 }
 339
 340
 341 /*****************************************************************************
 342  * UART0
 343  ****************************************************************************/
 344 static struct plat_serial8250_port orion5x_uart0_data[] = {
 345         {
 346                 .mapbase        = UART0_PHYS_BASE,
 347                 .membase        = (char *)UART0_VIRT_BASE,
 348                 .irq            = IRQ_ORION5X_UART0,
 349                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 350                 .iotype         = UPIO_MEM,
 351                 .regshift       = 2,
 352                 .uartclk        = 0,
 353         }, {
 354         },
 355 };
 356
 357 static struct resource orion5x_uart0_resources[] = {
 358         {
 359                 .start          = UART0_PHYS_BASE,
 360                 .end            = UART0_PHYS_BASE + 0xff,
 361                 .flags          = IORESOURCE_MEM,
 362         }, {
 363                 .start          = IRQ_ORION5X_UART0,
 364                 .end            = IRQ_ORION5X_UART0,
 365                 .flags          = IORESOURCE_IRQ,
 366         },
 367 };
 368
 369 static struct platform_device orion5x_uart0 = {
 370         .name                   = "serial8250",
 371         .id                     = PLAT8250_DEV_PLATFORM,
 372         .dev                    = {
 373                 .platform_data  = orion5x_uart0_data,
 374         },
 375         .resource               = orion5x_uart0_resources,
 376         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
 377 };
 378
 379 void __init orion5x_uart0_init(void)
 380 {
 381         platform_device_register(&orion5x_uart0);
 382 }
 383
 384
 385 /*****************************************************************************
 386  * UART1
 387  ****************************************************************************/
 388 static struct plat_serial8250_port orion5x_uart1_data[] = {
 389         {
 390                 .mapbase        = UART1_PHYS_BASE,
 391                 .membase        = (char *)UART1_VIRT_BASE,
 392                 .irq            = IRQ_ORION5X_UART1,
 393                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 394                 .iotype         = UPIO_MEM,
 395                 .regshift       = 2,
 396                 .uartclk        = 0,
 397         }, {
 398         },
 399 };
 400
 401 static struct resource orion5x_uart1_resources[] = {
 402         {
 403                 .start          = UART1_PHYS_BASE,
 404                 .end            = UART1_PHYS_BASE + 0xff,
 405                 .flags          = IORESOURCE_MEM,
 406         }, {
 407                 .start          = IRQ_ORION5X_UART1,
 408                 .end            = IRQ_ORION5X_UART1,
 409                 .flags          = IORESOURCE_IRQ,
 410         },
 411 };
 412
 413 static struct platform_device orion5x_uart1 = {
 414         .name                   = "serial8250",
 415         .id                     = PLAT8250_DEV_PLATFORM1,
 416         .dev                    = {
 417                 .platform_data  = orion5x_uart1_data,
 418         },
 419         .resource               = orion5x_uart1_resources,
 420         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
 421 };
 422
 423 void __init orion5x_uart1_init(void)
 424 {
 425         platform_device_register(&orion5x_uart1);
 426 }
 427
 428
 429 /*****************************************************************************
 430  * XOR engine
 431  ****************************************************************************/
 432 static struct resource orion5x_xor_shared_resources[] = {
 433         {
 434                 .name   = "xor low",
 435                 .start  = ORION5X_XOR_PHYS_BASE,
 436                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
 437                 .flags  = IORESOURCE_MEM,
 438         }, {
 439                 .name   = "xor high",
 440                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
 441                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
 442                 .flags  = IORESOURCE_MEM,
 443         },
 444 };
 445
 446 static struct platform_device orion5x_xor_shared = {
 447         .name           = MV_XOR_SHARED_NAME,
 448         .id             = 0,
 449         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
 450         .resource       = orion5x_xor_shared_resources,
 451 };
 452
 453 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
 454
 455 static struct resource orion5x_xor0_resources[] = {
 456         [0] = {
 457                 .start  = IRQ_ORION5X_XOR0,
 458                 .end    = IRQ_ORION5X_XOR0,
 459                 .flags  = IORESOURCE_IRQ,
 460         },
 461 };
 462
 463 static struct mv_xor_platform_data orion5x_xor0_data = {
 464         .shared         = &orion5x_xor_shared,
 465         .hw_id          = 0,
 466         .pool_size      = PAGE_SIZE,
 467 };
 468
 469 static struct platform_device orion5x_xor0_channel = {
 470         .name           = MV_XOR_NAME,
 471         .id             = 0,
 472         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
 473         .resource       = orion5x_xor0_resources,
 474         .dev            = {
 475                 .dma_mask               = &orion5x_xor_dmamask,
 476                 .coherent_dma_mask      = DMA_64BIT_MASK,
 477                 .platform_data          = (void *)&orion5x_xor0_data,
 478         },
 479 };
 480
 481 static struct resource orion5x_xor1_resources[] = {
 482         [0] = {
 483                 .start  = IRQ_ORION5X_XOR1,
 484                 .end    = IRQ_ORION5X_XOR1,
 485                 .flags  = IORESOURCE_IRQ,
 486         },
 487 };
 488
 489 static struct mv_xor_platform_data orion5x_xor1_data = {
 490         .shared         = &orion5x_xor_shared,
 491         .hw_id          = 1,
 492         .pool_size      = PAGE_SIZE,
 493 };
 494
 495 static struct platform_device orion5x_xor1_channel = {
 496         .name           = MV_XOR_NAME,
 497         .id             = 1,
 498         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
 499         .resource       = orion5x_xor1_resources,
 500         .dev            = {
 501                 .dma_mask               = &orion5x_xor_dmamask,
 502                 .coherent_dma_mask      = DMA_64BIT_MASK,
 503                 .platform_data          = (void *)&orion5x_xor1_data,
 504         },
 505 };
 506
 507 void __init orion5x_xor_init(void)
 508 {
 509         platform_device_register(&orion5x_xor_shared);
 510
 511         /*
 512          * two engines can't do memset simultaneously, this limitation
 513          * satisfied by removing memset support from one of the engines.
 514          */
 515         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
 516         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
 517         platform_device_register(&orion5x_xor0_channel);
 518
 519         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
 520         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
 521         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
 522         platform_device_register(&orion5x_xor1_channel);
 523 }
 524
 525
 526 /*****************************************************************************
 527  * Time handling
 528  ****************************************************************************/
 529 int orion5x_tclk;
 530
 531 int __init orion5x_find_tclk(void)
 532 {
 533         u32 dev, rev;
 534
 535         orion5x_pcie_id(&dev, &rev);
 536         if (dev == MV88F6183_DEV_ID &&
 537             (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
 538                 return 133333333;
 539
 540         return 166666667;
 541 }
 542
 543 static void orion5x_timer_init(void)
 544 {
 545         orion5x_tclk = orion5x_find_tclk();
 546         orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
 547 }
 548
 549 struct sys_timer orion5x_timer = {
 550         .init = orion5x_timer_init,
 551 };
 552
 553
 554 /*****************************************************************************
 555  * General
 556  ****************************************************************************/
 557 /*
 558  * Identify device ID and rev from PCIe configuration header space '0'.
 559  */
 560 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 561 {
 562         orion5x_pcie_id(dev, rev);
 563
 564         if (*dev == MV88F5281_DEV_ID) {
 565                 if (*rev == MV88F5281_REV_D2) {
 566                         *dev_name = "MV88F5281-D2";
 567                 } else if (*rev == MV88F5281_REV_D1) {
 568                         *dev_name = "MV88F5281-D1";
 569                 } else if (*rev == MV88F5281_REV_D0) {
 570                         *dev_name = "MV88F5281-D0";
 571                 } else {
 572                         *dev_name = "MV88F5281-Rev-Unsupported";
 573                 }
 574         } else if (*dev == MV88F5182_DEV_ID) {
 575                 if (*rev == MV88F5182_REV_A2) {
 576                         *dev_name = "MV88F5182-A2";
 577                 } else {
 578                         *dev_name = "MV88F5182-Rev-Unsupported";
 579                 }
 580         } else if (*dev == MV88F5181_DEV_ID) {
 581                 if (*rev == MV88F5181_REV_B1) {
 582                         *dev_name = "MV88F5181-Rev-B1";
 583                 } else if (*rev == MV88F5181L_REV_A1) {
 584                         *dev_name = "MV88F5181L-Rev-A1";
 585                 } else {
 586                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
 587                 }
 588         } else if (*dev == MV88F6183_DEV_ID) {
 589                 if (*rev == MV88F6183_REV_B0) {
 590                         *dev_name = "MV88F6183-Rev-B0";
 591                 } else {
 592                         *dev_name = "MV88F6183-Rev-Unsupported";
 593                 }
 594         } else {
 595                 *dev_name = "Device-Unknown";
 596         }
 597 }
 598
 599 void __init orion5x_init(void)
 600 {
 601         char *dev_name;
 602         u32 dev, rev;
 603
 604         orion5x_id(&dev, &rev, &dev_name);
 605         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
 606
 607         orion5x_eth_shared_data.t_clk = orion5x_tclk;
 608         orion5x_spi_plat_data.tclk = orion5x_tclk;
 609         orion5x_uart0_data[0].uartclk = orion5x_tclk;
 610         orion5x_uart1_data[0].uartclk = orion5x_tclk;
 611
 612         /*
 613          * Setup Orion address map
 614          */
 615         orion5x_setup_cpu_mbus_bridge();
 616
 617         /*
 618          * Don't issue "Wait for Interrupt" instruction if we are
 619          * running on D0 5281 silicon.
 620          */
 621         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
 622                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 623                 disable_hlt();
 624         }
 625 }
 626
 627 /*
 628  * Many orion-based systems have buggy bootloader implementations.
 629  * This is a common fixup for bogus memory tags.
 630  */
 631 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 632                             char **from, struct meminfo *meminfo)
 633 {
 634         for (; t->hdr.size; t = tag_next(t))
 635                 if (t->hdr.tag == ATAG_MEM &&
 636                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 637                      t->u.mem.start & ~PAGE_MASK)) {
 638                         printk(KERN_WARNING
 639                                "Clearing invalid memory bank %dKB@0x%08x\n",
 640                                t->u.mem.size / 1024, t->u.mem.start);
 641                         t->hdr.tag = 0;
 642                 }
 643 }