arch/arm/mach-orion5x/common.c

   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <linux/spi/orion_spi.h>
  22 #include <asm/page.h>
  23 #include <asm/setup.h>
  24 #include <asm/timex.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach/time.h>
  28 #include <mach/hardware.h>
  29 #include <mach/orion5x.h>
  30 #include <plat/ehci-orion.h>
  31 #include <plat/mv_xor.h>
  32 #include <plat/orion_nand.h>
  33 #include <plat/time.h>
  34 #include "common.h"
  35
  36 /*****************************************************************************
  37  * I/O Address Mapping
  38  ****************************************************************************/
  39 static struct map_desc orion5x_io_desc[] __initdata = {
  40         {
  41                 .virtual        = ORION5X_REGS_VIRT_BASE,
  42                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  43                 .length         = ORION5X_REGS_SIZE,
  44                 .type           = MT_DEVICE,
  45         }, {
  46                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  47                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  48                 .length         = ORION5X_PCIE_IO_SIZE,
  49                 .type           = MT_DEVICE,
  50         }, {
  51                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  52                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  53                 .length         = ORION5X_PCI_IO_SIZE,
  54                 .type           = MT_DEVICE,
  55         }, {
  56                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  57                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  58                 .length         = ORION5X_PCIE_WA_SIZE,
  59                 .type           = MT_DEVICE,
  60         },
  61 };
  62
  63 void __init orion5x_map_io(void)
  64 {
  65         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  66 }
  67
  68
  69 /*****************************************************************************
  70  * EHCI
  71  ****************************************************************************/
  72 static struct orion_ehci_data orion5x_ehci_data = {
  73         .dram           = &orion5x_mbus_dram_info,
  74 };
  75
  76 static u64 ehci_dmamask = 0xffffffffUL;
  77
  78
  79 /*****************************************************************************
  80  * EHCI0
  81  ****************************************************************************/
  82 static struct resource orion5x_ehci0_resources[] = {
  83         {
  84                 .start  = ORION5X_USB0_PHYS_BASE,
  85                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  86                 .flags  = IORESOURCE_MEM,
  87         }, {
  88                 .start  = IRQ_ORION5X_USB0_CTRL,
  89                 .end    = IRQ_ORION5X_USB0_CTRL,
  90                 .flags  = IORESOURCE_IRQ,
  91         },
  92 };
  93
  94 static struct platform_device orion5x_ehci0 = {
  95         .name           = "orion-ehci",
  96         .id             = 0,
  97         .dev            = {
  98                 .dma_mask               = &ehci_dmamask,
  99                 .coherent_dma_mask      = 0xffffffff,
 100                 .platform_data          = &orion5x_ehci_data,
 101         },
 102         .resource       = orion5x_ehci0_resources,
 103         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 104 };
 105
 106 void __init orion5x_ehci0_init(void)
 107 {
 108         platform_device_register(&orion5x_ehci0);
 109 }
 110
 111
 112 /*****************************************************************************
 113  * EHCI1
 114  ****************************************************************************/
 115 static struct resource orion5x_ehci1_resources[] = {
 116         {
 117                 .start  = ORION5X_USB1_PHYS_BASE,
 118                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 119                 .flags  = IORESOURCE_MEM,
 120         }, {
 121                 .start  = IRQ_ORION5X_USB1_CTRL,
 122                 .end    = IRQ_ORION5X_USB1_CTRL,
 123                 .flags  = IORESOURCE_IRQ,
 124         },
 125 };
 126
 127 static struct platform_device orion5x_ehci1 = {
 128         .name           = "orion-ehci",
 129         .id             = 1,
 130         .dev            = {
 131                 .dma_mask               = &ehci_dmamask,
 132                 .coherent_dma_mask      = 0xffffffff,
 133                 .platform_data          = &orion5x_ehci_data,
 134         },
 135         .resource       = orion5x_ehci1_resources,
 136         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 137 };
 138
 139 void __init orion5x_ehci1_init(void)
 140 {
 141         platform_device_register(&orion5x_ehci1);
 142 }
 143
 144
 145 /*****************************************************************************
 146  * GigE
 147  ****************************************************************************/
 148 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 149         .dram           = &orion5x_mbus_dram_info,
 150 };
 151
 152 static struct resource orion5x_eth_shared_resources[] = {
 153         {
 154                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 155                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 156                 .flags  = IORESOURCE_MEM,
 157         }, {
 158                 .start  = IRQ_ORION5X_ETH_ERR,
 159                 .end    = IRQ_ORION5X_ETH_ERR,
 160                 .flags  = IORESOURCE_IRQ,
 161         },
 162 };
 163
 164 static struct platform_device orion5x_eth_shared = {
 165         .name           = MV643XX_ETH_SHARED_NAME,
 166         .id             = 0,
 167         .dev            = {
 168                 .platform_data  = &orion5x_eth_shared_data,
 169         },
 170         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
 171         .resource       = orion5x_eth_shared_resources,
 172 };
 173
 174 static struct resource orion5x_eth_resources[] = {
 175         {
 176                 .name   = "eth irq",
 177                 .start  = IRQ_ORION5X_ETH_SUM,
 178                 .end    = IRQ_ORION5X_ETH_SUM,
 179                 .flags  = IORESOURCE_IRQ,
 180         },
 181 };
 182
 183 static struct platform_device orion5x_eth = {
 184         .name           = MV643XX_ETH_NAME,
 185         .id             = 0,
 186         .num_resources  = 1,
 187         .resource       = orion5x_eth_resources,
 188 };
 189
 190 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 191 {
 192         eth_data->shared = &orion5x_eth_shared;
 193         orion5x_eth.dev.platform_data = eth_data;
 194
 195         platform_device_register(&orion5x_eth_shared);
 196         platform_device_register(&orion5x_eth);
 197 }
 198
 199
 200 /*****************************************************************************
 201  * I2C
 202  ****************************************************************************/
 203 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 204         .freq_m         = 8, /* assumes 166 MHz TCLK */
 205         .freq_n         = 3,
 206         .timeout        = 1000, /* Default timeout of 1 second */
 207 };
 208
 209 static struct resource orion5x_i2c_resources[] = {
 210         {
 211                 .name   = "i2c base",
 212                 .start  = I2C_PHYS_BASE,
 213                 .end    = I2C_PHYS_BASE + 0x1f,
 214                 .flags  = IORESOURCE_MEM,
 215         }, {
 216                 .name   = "i2c irq",
 217                 .start  = IRQ_ORION5X_I2C,
 218                 .end    = IRQ_ORION5X_I2C,
 219                 .flags  = IORESOURCE_IRQ,
 220         },
 221 };
 222
 223 static struct platform_device orion5x_i2c = {
 224         .name           = MV64XXX_I2C_CTLR_NAME,
 225         .id             = 0,
 226         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 227         .resource       = orion5x_i2c_resources,
 228         .dev            = {
 229                 .platform_data  = &orion5x_i2c_pdata,
 230         },
 231 };
 232
 233 void __init orion5x_i2c_init(void)
 234 {
 235         platform_device_register(&orion5x_i2c);
 236 }
 237
 238
 239 /*****************************************************************************
 240  * SATA
 241  ****************************************************************************/
 242 static struct resource orion5x_sata_resources[] = {
 243         {
 244                 .name   = "sata base",
 245                 .start  = ORION5X_SATA_PHYS_BASE,
 246                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 247                 .flags  = IORESOURCE_MEM,
 248         }, {
 249                 .name   = "sata irq",
 250                 .start  = IRQ_ORION5X_SATA,
 251                 .end    = IRQ_ORION5X_SATA,
 252                 .flags  = IORESOURCE_IRQ,
 253         },
 254 };
 255
 256 static struct platform_device orion5x_sata = {
 257         .name           = "sata_mv",
 258         .id             = 0,
 259         .dev            = {
 260                 .coherent_dma_mask      = 0xffffffff,
 261         },
 262         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 263         .resource       = orion5x_sata_resources,
 264 };
 265
 266 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 267 {
 268         sata_data->dram = &orion5x_mbus_dram_info;
 269         orion5x_sata.dev.platform_data = sata_data;
 270         platform_device_register(&orion5x_sata);
 271 }
 272
 273
 274 /*****************************************************************************
 275  * SPI
 276  ****************************************************************************/
 277 static struct orion_spi_info orion5x_spi_plat_data = {
 278         .tclk           = 0,
 279 };
 280
 281 static struct resource orion5x_spi_resources[] = {
 282         {
 283                 .name   = "spi base",
 284                 .start  = SPI_PHYS_BASE,
 285                 .end    = SPI_PHYS_BASE + 0x1f,
 286                 .flags  = IORESOURCE_MEM,
 287         },
 288 };
 289
 290 static struct platform_device orion5x_spi = {
 291         .name           = "orion_spi",
 292         .id             = 0,
 293         .dev            = {
 294                 .platform_data  = &orion5x_spi_plat_data,
 295         },
 296         .num_resources  = ARRAY_SIZE(orion5x_spi_resources),
 297         .resource       = orion5x_spi_resources,
 298 };
 299
 300 void __init orion5x_spi_init()
 301 {
 302         platform_device_register(&orion5x_spi);
 303 }
 304
 305
 306 /*****************************************************************************
 307  * UART0
 308  ****************************************************************************/
 309 static struct plat_serial8250_port orion5x_uart0_data[] = {
 310         {
 311                 .mapbase        = UART0_PHYS_BASE,
 312                 .membase        = (char *)UART0_VIRT_BASE,
 313                 .irq            = IRQ_ORION5X_UART0,
 314                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 315                 .iotype         = UPIO_MEM,
 316                 .regshift       = 2,
 317                 .uartclk        = 0,
 318         }, {
 319         },
 320 };
 321
 322 static struct resource orion5x_uart0_resources[] = {
 323         {
 324                 .start          = UART0_PHYS_BASE,
 325                 .end            = UART0_PHYS_BASE + 0xff,
 326                 .flags          = IORESOURCE_MEM,
 327         }, {
 328                 .start          = IRQ_ORION5X_UART0,
 329                 .end            = IRQ_ORION5X_UART0,
 330                 .flags          = IORESOURCE_IRQ,
 331         },
 332 };
 333
 334 static struct platform_device orion5x_uart0 = {
 335         .name                   = "serial8250",
 336         .id                     = PLAT8250_DEV_PLATFORM,
 337         .dev                    = {
 338                 .platform_data  = orion5x_uart0_data,
 339         },
 340         .resource               = orion5x_uart0_resources,
 341         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
 342 };
 343
 344 void __init orion5x_uart0_init(void)
 345 {
 346         platform_device_register(&orion5x_uart0);
 347 }
 348
 349
 350 /*****************************************************************************
 351  * UART1
 352  ****************************************************************************/
 353 static struct plat_serial8250_port orion5x_uart1_data[] = {
 354         {
 355                 .mapbase        = UART1_PHYS_BASE,
 356                 .membase        = (char *)UART1_VIRT_BASE,
 357                 .irq            = IRQ_ORION5X_UART1,
 358                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 359                 .iotype         = UPIO_MEM,
 360                 .regshift       = 2,
 361                 .uartclk        = 0,
 362         }, {
 363         },
 364 };
 365
 366 static struct resource orion5x_uart1_resources[] = {
 367         {
 368                 .start          = UART1_PHYS_BASE,
 369                 .end            = UART1_PHYS_BASE + 0xff,
 370                 .flags          = IORESOURCE_MEM,
 371         }, {
 372                 .start          = IRQ_ORION5X_UART1,
 373                 .end            = IRQ_ORION5X_UART1,
 374                 .flags          = IORESOURCE_IRQ,
 375         },
 376 };
 377
 378 static struct platform_device orion5x_uart1 = {
 379         .name                   = "serial8250",
 380         .id                     = PLAT8250_DEV_PLATFORM1,
 381         .dev                    = {
 382                 .platform_data  = orion5x_uart1_data,
 383         },
 384         .resource               = orion5x_uart1_resources,
 385         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
 386 };
 387
 388 void __init orion5x_uart1_init(void)
 389 {
 390         platform_device_register(&orion5x_uart1);
 391 }
 392
 393
 394 /*****************************************************************************
 395  * XOR engine
 396  ****************************************************************************/
 397 static struct resource orion5x_xor_shared_resources[] = {
 398         {
 399                 .name   = "xor low",
 400                 .start  = ORION5X_XOR_PHYS_BASE,
 401                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
 402                 .flags  = IORESOURCE_MEM,
 403         }, {
 404                 .name   = "xor high",
 405                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
 406                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
 407                 .flags  = IORESOURCE_MEM,
 408         },
 409 };
 410
 411 static struct platform_device orion5x_xor_shared = {
 412         .name           = MV_XOR_SHARED_NAME,
 413         .id             = 0,
 414         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
 415         .resource       = orion5x_xor_shared_resources,
 416 };
 417
 418 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
 419
 420 static struct resource orion5x_xor0_resources[] = {
 421         [0] = {
 422                 .start  = IRQ_ORION5X_XOR0,
 423                 .end    = IRQ_ORION5X_XOR0,
 424                 .flags  = IORESOURCE_IRQ,
 425         },
 426 };
 427
 428 static struct mv_xor_platform_data orion5x_xor0_data = {
 429         .shared         = &orion5x_xor_shared,
 430         .hw_id          = 0,
 431         .pool_size      = PAGE_SIZE,
 432 };
 433
 434 static struct platform_device orion5x_xor0_channel = {
 435         .name           = MV_XOR_NAME,
 436         .id             = 0,
 437         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
 438         .resource       = orion5x_xor0_resources,
 439         .dev            = {
 440                 .dma_mask               = &orion5x_xor_dmamask,
 441                 .coherent_dma_mask      = DMA_64BIT_MASK,
 442                 .platform_data          = (void *)&orion5x_xor0_data,
 443         },
 444 };
 445
 446 static struct resource orion5x_xor1_resources[] = {
 447         [0] = {
 448                 .start  = IRQ_ORION5X_XOR1,
 449                 .end    = IRQ_ORION5X_XOR1,
 450                 .flags  = IORESOURCE_IRQ,
 451         },
 452 };
 453
 454 static struct mv_xor_platform_data orion5x_xor1_data = {
 455         .shared         = &orion5x_xor_shared,
 456         .hw_id          = 1,
 457         .pool_size      = PAGE_SIZE,
 458 };
 459
 460 static struct platform_device orion5x_xor1_channel = {
 461         .name           = MV_XOR_NAME,
 462         .id             = 1,
 463         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
 464         .resource       = orion5x_xor1_resources,
 465         .dev            = {
 466                 .dma_mask               = &orion5x_xor_dmamask,
 467                 .coherent_dma_mask      = DMA_64BIT_MASK,
 468                 .platform_data          = (void *)&orion5x_xor1_data,
 469         },
 470 };
 471
 472 void __init orion5x_xor_init(void)
 473 {
 474         platform_device_register(&orion5x_xor_shared);
 475
 476         /*
 477          * two engines can't do memset simultaneously, this limitation
 478          * satisfied by removing memset support from one of the engines.
 479          */
 480         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
 481         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
 482         platform_device_register(&orion5x_xor0_channel);
 483
 484         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
 485         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
 486         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
 487         platform_device_register(&orion5x_xor1_channel);
 488 }
 489
 490
 491 /*****************************************************************************
 492  * Time handling
 493  ****************************************************************************/
 494 int orion5x_tclk;
 495
 496 int __init orion5x_find_tclk(void)
 497 {
 498         u32 dev, rev;
 499
 500         orion5x_pcie_id(&dev, &rev);
 501         if (dev == MV88F6183_DEV_ID &&
 502             (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
 503                 return 133333333;
 504
 505         return 166666667;
 506 }
 507
 508 static void orion5x_timer_init(void)
 509 {
 510         orion5x_tclk = orion5x_find_tclk();
 511         orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
 512 }
 513
 514 struct sys_timer orion5x_timer = {
 515         .init = orion5x_timer_init,
 516 };
 517
 518
 519 /*****************************************************************************
 520  * General
 521  ****************************************************************************/
 522 /*
 523  * Identify device ID and rev from PCIe configuration header space '0'.
 524  */
 525 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 526 {
 527         orion5x_pcie_id(dev, rev);
 528
 529         if (*dev == MV88F5281_DEV_ID) {
 530                 if (*rev == MV88F5281_REV_D2) {
 531                         *dev_name = "MV88F5281-D2";
 532                 } else if (*rev == MV88F5281_REV_D1) {
 533                         *dev_name = "MV88F5281-D1";
 534                 } else if (*rev == MV88F5281_REV_D0) {
 535                         *dev_name = "MV88F5281-D0";
 536                 } else {
 537                         *dev_name = "MV88F5281-Rev-Unsupported";
 538                 }
 539         } else if (*dev == MV88F5182_DEV_ID) {
 540                 if (*rev == MV88F5182_REV_A2) {
 541                         *dev_name = "MV88F5182-A2";
 542                 } else {
 543                         *dev_name = "MV88F5182-Rev-Unsupported";
 544                 }
 545         } else if (*dev == MV88F5181_DEV_ID) {
 546                 if (*rev == MV88F5181_REV_B1) {
 547                         *dev_name = "MV88F5181-Rev-B1";
 548                 } else if (*rev == MV88F5181L_REV_A1) {
 549                         *dev_name = "MV88F5181L-Rev-A1";
 550                 } else {
 551                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
 552                 }
 553         } else if (*dev == MV88F6183_DEV_ID) {
 554                 if (*rev == MV88F6183_REV_B0) {
 555                         *dev_name = "MV88F6183-Rev-B0";
 556                 } else {
 557                         *dev_name = "MV88F6183-Rev-Unsupported";
 558                 }
 559         } else {
 560                 *dev_name = "Device-Unknown";
 561         }
 562 }
 563
 564 void __init orion5x_init(void)
 565 {
 566         char *dev_name;
 567         u32 dev, rev;
 568
 569         orion5x_id(&dev, &rev, &dev_name);
 570         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
 571
 572         orion5x_eth_shared_data.t_clk = orion5x_tclk;
 573         orion5x_spi_plat_data.tclk = orion5x_tclk;
 574         orion5x_uart0_data[0].uartclk = orion5x_tclk;
 575         orion5x_uart1_data[0].uartclk = orion5x_tclk;
 576
 577         /*
 578          * Setup Orion address map
 579          */
 580         orion5x_setup_cpu_mbus_bridge();
 581
 582         /*
 583          * Don't issue "Wait for Interrupt" instruction if we are
 584          * running on D0 5281 silicon.
 585          */
 586         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
 587                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 588                 disable_hlt();
 589         }
 590 }
 591
 592 /*
 593  * Many orion-based systems have buggy bootloader implementations.
 594  * This is a common fixup for bogus memory tags.
 595  */
 596 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 597                             char **from, struct meminfo *meminfo)
 598 {
 599         for (; t->hdr.size; t = tag_next(t))
 600                 if (t->hdr.tag == ATAG_MEM &&
 601                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 602                      t->u.mem.start & ~PAGE_MASK)) {
 603                         printk(KERN_WARNING
 604                                "Clearing invalid memory bank %dKB@0x%08x\n",
 605                                t->u.mem.size / 1024, t->u.mem.start);
 606                         t->hdr.tag = 0;
 607                 }
 608 }