arch/arm/mach-orion5x/common.c

   1 /*
   2  * arch/arm/mach-orion5x/common.c
   3  *
   4  * Core functions for Marvell Orion 5x SoCs
   5  *
   6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/mbus.h>
  18 #include <linux/mv643xx_eth.h>
  19 #include <linux/mv643xx_i2c.h>
  20 #include <linux/ata_platform.h>
  21 #include <asm/page.h>
  22 #include <asm/setup.h>
  23 #include <asm/timex.h>
  24 #include <asm/mach/arch.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/hardware.h>
  28 #include <mach/orion5x.h>
  29 #include <plat/ehci-orion.h>
  30 #include <plat/mv_xor.h>
  31 #include <plat/orion_nand.h>
  32 #include <plat/time.h>
  33 #include "common.h"
  34
  35 /*****************************************************************************
  36  * I/O Address Mapping
  37  ****************************************************************************/
  38 static struct map_desc orion5x_io_desc[] __initdata = {
  39         {
  40                 .virtual        = ORION5X_REGS_VIRT_BASE,
  41                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  42                 .length         = ORION5X_REGS_SIZE,
  43                 .type           = MT_DEVICE,
  44         }, {
  45                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  47                 .length         = ORION5X_PCIE_IO_SIZE,
  48                 .type           = MT_DEVICE,
  49         }, {
  50                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
  51                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  52                 .length         = ORION5X_PCI_IO_SIZE,
  53                 .type           = MT_DEVICE,
  54         }, {
  55                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
  56                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  57                 .length         = ORION5X_PCIE_WA_SIZE,
  58                 .type           = MT_DEVICE,
  59         },
  60 };
  61
  62 void __init orion5x_map_io(void)
  63 {
  64         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  65 }
  66
  67
  68 /*****************************************************************************
  69  * EHCI
  70  ****************************************************************************/
  71 static struct orion_ehci_data orion5x_ehci_data = {
  72         .dram           = &orion5x_mbus_dram_info,
  73 };
  74
  75 static u64 ehci_dmamask = 0xffffffffUL;
  76
  77
  78 /*****************************************************************************
  79  * EHCI0
  80  ****************************************************************************/
  81 static struct resource orion5x_ehci0_resources[] = {
  82         {
  83                 .start  = ORION5X_USB0_PHYS_BASE,
  84                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  85                 .flags  = IORESOURCE_MEM,
  86         }, {
  87                 .start  = IRQ_ORION5X_USB0_CTRL,
  88                 .end    = IRQ_ORION5X_USB0_CTRL,
  89                 .flags  = IORESOURCE_IRQ,
  90         },
  91 };
  92
  93 static struct platform_device orion5x_ehci0 = {
  94         .name           = "orion-ehci",
  95         .id             = 0,
  96         .dev            = {
  97                 .dma_mask               = &ehci_dmamask,
  98                 .coherent_dma_mask      = 0xffffffff,
  99                 .platform_data          = &orion5x_ehci_data,
 100         },
 101         .resource       = orion5x_ehci0_resources,
 102         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
 103 };
 104
 105 void __init orion5x_ehci0_init(void)
 106 {
 107         platform_device_register(&orion5x_ehci0);
 108 }
 109
 110
 111 /*****************************************************************************
 112  * EHCI1
 113  ****************************************************************************/
 114 static struct resource orion5x_ehci1_resources[] = {
 115         {
 116                 .start  = ORION5X_USB1_PHYS_BASE,
 117                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
 118                 .flags  = IORESOURCE_MEM,
 119         }, {
 120                 .start  = IRQ_ORION5X_USB1_CTRL,
 121                 .end    = IRQ_ORION5X_USB1_CTRL,
 122                 .flags  = IORESOURCE_IRQ,
 123         },
 124 };
 125
 126 static struct platform_device orion5x_ehci1 = {
 127         .name           = "orion-ehci",
 128         .id             = 1,
 129         .dev            = {
 130                 .dma_mask               = &ehci_dmamask,
 131                 .coherent_dma_mask      = 0xffffffff,
 132                 .platform_data          = &orion5x_ehci_data,
 133         },
 134         .resource       = orion5x_ehci1_resources,
 135         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
 136 };
 137
 138 void __init orion5x_ehci1_init(void)
 139 {
 140         platform_device_register(&orion5x_ehci1);
 141 }
 142
 143
 144 /*****************************************************************************
 145  * GigE
 146  ****************************************************************************/
 147 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
 148         .dram           = &orion5x_mbus_dram_info,
 149 };
 150
 151 static struct resource orion5x_eth_shared_resources[] = {
 152         {
 153                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
 154                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
 155                 .flags  = IORESOURCE_MEM,
 156         }, {
 157                 .start  = IRQ_ORION5X_ETH_ERR,
 158                 .end    = IRQ_ORION5X_ETH_ERR,
 159                 .flags  = IORESOURCE_IRQ,
 160         },
 161 };
 162
 163 static struct platform_device orion5x_eth_shared = {
 164         .name           = MV643XX_ETH_SHARED_NAME,
 165         .id             = 0,
 166         .dev            = {
 167                 .platform_data  = &orion5x_eth_shared_data,
 168         },
 169         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
 170         .resource       = orion5x_eth_shared_resources,
 171 };
 172
 173 static struct resource orion5x_eth_resources[] = {
 174         {
 175                 .name   = "eth irq",
 176                 .start  = IRQ_ORION5X_ETH_SUM,
 177                 .end    = IRQ_ORION5X_ETH_SUM,
 178                 .flags  = IORESOURCE_IRQ,
 179         },
 180 };
 181
 182 static struct platform_device orion5x_eth = {
 183         .name           = MV643XX_ETH_NAME,
 184         .id             = 0,
 185         .num_resources  = 1,
 186         .resource       = orion5x_eth_resources,
 187 };
 188
 189 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 190 {
 191         eth_data->shared = &orion5x_eth_shared;
 192         orion5x_eth.dev.platform_data = eth_data;
 193
 194         platform_device_register(&orion5x_eth_shared);
 195         platform_device_register(&orion5x_eth);
 196 }
 197
 198
 199 /*****************************************************************************
 200  * I2C
 201  ****************************************************************************/
 202 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
 203         .freq_m         = 8, /* assumes 166 MHz TCLK */
 204         .freq_n         = 3,
 205         .timeout        = 1000, /* Default timeout of 1 second */
 206 };
 207
 208 static struct resource orion5x_i2c_resources[] = {
 209         {
 210                 .name   = "i2c base",
 211                 .start  = I2C_PHYS_BASE,
 212                 .end    = I2C_PHYS_BASE + 0x1f,
 213                 .flags  = IORESOURCE_MEM,
 214         }, {
 215                 .name   = "i2c irq",
 216                 .start  = IRQ_ORION5X_I2C,
 217                 .end    = IRQ_ORION5X_I2C,
 218                 .flags  = IORESOURCE_IRQ,
 219         },
 220 };
 221
 222 static struct platform_device orion5x_i2c = {
 223         .name           = MV64XXX_I2C_CTLR_NAME,
 224         .id             = 0,
 225         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
 226         .resource       = orion5x_i2c_resources,
 227         .dev            = {
 228                 .platform_data  = &orion5x_i2c_pdata,
 229         },
 230 };
 231
 232 void __init orion5x_i2c_init(void)
 233 {
 234         platform_device_register(&orion5x_i2c);
 235 }
 236
 237
 238 /*****************************************************************************
 239  * SATA
 240  ****************************************************************************/
 241 static struct resource orion5x_sata_resources[] = {
 242         {
 243                 .name   = "sata base",
 244                 .start  = ORION5X_SATA_PHYS_BASE,
 245                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         }, {
 248                 .name   = "sata irq",
 249                 .start  = IRQ_ORION5X_SATA,
 250                 .end    = IRQ_ORION5X_SATA,
 251                 .flags  = IORESOURCE_IRQ,
 252         },
 253 };
 254
 255 static struct platform_device orion5x_sata = {
 256         .name           = "sata_mv",
 257         .id             = 0,
 258         .dev            = {
 259                 .coherent_dma_mask      = 0xffffffff,
 260         },
 261         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
 262         .resource       = orion5x_sata_resources,
 263 };
 264
 265 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 266 {
 267         sata_data->dram = &orion5x_mbus_dram_info;
 268         orion5x_sata.dev.platform_data = sata_data;
 269         platform_device_register(&orion5x_sata);
 270 }
 271
 272
 273 /*****************************************************************************
 274  * UART0
 275  ****************************************************************************/
 276 static struct plat_serial8250_port orion5x_uart0_data[] = {
 277         {
 278                 .mapbase        = UART0_PHYS_BASE,
 279                 .membase        = (char *)UART0_VIRT_BASE,
 280                 .irq            = IRQ_ORION5X_UART0,
 281                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 282                 .iotype         = UPIO_MEM,
 283                 .regshift       = 2,
 284                 .uartclk        = 0,
 285         }, {
 286         },
 287 };
 288
 289 static struct resource orion5x_uart0_resources[] = {
 290         {
 291                 .start          = UART0_PHYS_BASE,
 292                 .end            = UART0_PHYS_BASE + 0xff,
 293                 .flags          = IORESOURCE_MEM,
 294         }, {
 295                 .start          = IRQ_ORION5X_UART0,
 296                 .end            = IRQ_ORION5X_UART0,
 297                 .flags          = IORESOURCE_IRQ,
 298         },
 299 };
 300
 301 static struct platform_device orion5x_uart0 = {
 302         .name                   = "serial8250",
 303         .id                     = PLAT8250_DEV_PLATFORM,
 304         .dev                    = {
 305                 .platform_data  = orion5x_uart0_data,
 306         },
 307         .resource               = orion5x_uart0_resources,
 308         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
 309 };
 310
 311 void __init orion5x_uart0_init(void)
 312 {
 313         platform_device_register(&orion5x_uart0);
 314 }
 315
 316
 317 /*****************************************************************************
 318  * UART1
 319  ****************************************************************************/
 320 static struct plat_serial8250_port orion5x_uart1_data[] = {
 321         {
 322                 .mapbase        = UART1_PHYS_BASE,
 323                 .membase        = (char *)UART1_VIRT_BASE,
 324                 .irq            = IRQ_ORION5X_UART1,
 325                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
 326                 .iotype         = UPIO_MEM,
 327                 .regshift       = 2,
 328                 .uartclk        = 0,
 329         }, {
 330         },
 331 };
 332
 333 static struct resource orion5x_uart1_resources[] = {
 334         {
 335                 .start          = UART1_PHYS_BASE,
 336                 .end            = UART1_PHYS_BASE + 0xff,
 337                 .flags          = IORESOURCE_MEM,
 338         }, {
 339                 .start          = IRQ_ORION5X_UART1,
 340                 .end            = IRQ_ORION5X_UART1,
 341                 .flags          = IORESOURCE_IRQ,
 342         },
 343 };
 344
 345 static struct platform_device orion5x_uart1 = {
 346         .name                   = "serial8250",
 347         .id                     = PLAT8250_DEV_PLATFORM1,
 348         .dev                    = {
 349                 .platform_data  = orion5x_uart1_data,
 350         },
 351         .resource               = orion5x_uart1_resources,
 352         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
 353 };
 354
 355 void __init orion5x_uart1_init(void)
 356 {
 357         platform_device_register(&orion5x_uart1);
 358 }
 359
 360
 361 /*****************************************************************************
 362  * XOR engine
 363  ****************************************************************************/
 364 static struct resource orion5x_xor_shared_resources[] = {
 365         {
 366                 .name   = "xor low",
 367                 .start  = ORION5X_XOR_PHYS_BASE,
 368                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
 369                 .flags  = IORESOURCE_MEM,
 370         }, {
 371                 .name   = "xor high",
 372                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
 373                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
 374                 .flags  = IORESOURCE_MEM,
 375         },
 376 };
 377
 378 static struct platform_device orion5x_xor_shared = {
 379         .name           = MV_XOR_SHARED_NAME,
 380         .id             = 0,
 381         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
 382         .resource       = orion5x_xor_shared_resources,
 383 };
 384
 385 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
 386
 387 static struct resource orion5x_xor0_resources[] = {
 388         [0] = {
 389                 .start  = IRQ_ORION5X_XOR0,
 390                 .end    = IRQ_ORION5X_XOR0,
 391                 .flags  = IORESOURCE_IRQ,
 392         },
 393 };
 394
 395 static struct mv_xor_platform_data orion5x_xor0_data = {
 396         .shared         = &orion5x_xor_shared,
 397         .hw_id          = 0,
 398         .pool_size      = PAGE_SIZE,
 399 };
 400
 401 static struct platform_device orion5x_xor0_channel = {
 402         .name           = MV_XOR_NAME,
 403         .id             = 0,
 404         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
 405         .resource       = orion5x_xor0_resources,
 406         .dev            = {
 407                 .dma_mask               = &orion5x_xor_dmamask,
 408                 .coherent_dma_mask      = DMA_64BIT_MASK,
 409                 .platform_data          = (void *)&orion5x_xor0_data,
 410         },
 411 };
 412
 413 static struct resource orion5x_xor1_resources[] = {
 414         [0] = {
 415                 .start  = IRQ_ORION5X_XOR1,
 416                 .end    = IRQ_ORION5X_XOR1,
 417                 .flags  = IORESOURCE_IRQ,
 418         },
 419 };
 420
 421 static struct mv_xor_platform_data orion5x_xor1_data = {
 422         .shared         = &orion5x_xor_shared,
 423         .hw_id          = 1,
 424         .pool_size      = PAGE_SIZE,
 425 };
 426
 427 static struct platform_device orion5x_xor1_channel = {
 428         .name           = MV_XOR_NAME,
 429         .id             = 1,
 430         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
 431         .resource       = orion5x_xor1_resources,
 432         .dev            = {
 433                 .dma_mask               = &orion5x_xor_dmamask,
 434                 .coherent_dma_mask      = DMA_64BIT_MASK,
 435                 .platform_data          = (void *)&orion5x_xor1_data,
 436         },
 437 };
 438
 439 void __init orion5x_xor_init(void)
 440 {
 441         platform_device_register(&orion5x_xor_shared);
 442
 443         /*
 444          * two engines can't do memset simultaneously, this limitation
 445          * satisfied by removing memset support from one of the engines.
 446          */
 447         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
 448         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
 449         platform_device_register(&orion5x_xor0_channel);
 450
 451         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
 452         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
 453         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
 454         platform_device_register(&orion5x_xor1_channel);
 455 }
 456
 457
 458 /*****************************************************************************
 459  * Time handling
 460  ****************************************************************************/
 461 int orion5x_tclk;
 462
 463 int __init orion5x_find_tclk(void)
 464 {
 465         return 166666667;
 466 }
 467
 468 static void orion5x_timer_init(void)
 469 {
 470         orion5x_tclk = orion5x_find_tclk();
 471         orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
 472 }
 473
 474 struct sys_timer orion5x_timer = {
 475         .init = orion5x_timer_init,
 476 };
 477
 478
 479 /*****************************************************************************
 480  * General
 481  ****************************************************************************/
 482 /*
 483  * Identify device ID and rev from PCIe configuration header space '0'.
 484  */
 485 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
 486 {
 487         orion5x_pcie_id(dev, rev);
 488
 489         if (*dev == MV88F5281_DEV_ID) {
 490                 if (*rev == MV88F5281_REV_D2) {
 491                         *dev_name = "MV88F5281-D2";
 492                 } else if (*rev == MV88F5281_REV_D1) {
 493                         *dev_name = "MV88F5281-D1";
 494                 } else if (*rev == MV88F5281_REV_D0) {
 495                         *dev_name = "MV88F5281-D0";
 496                 } else {
 497                         *dev_name = "MV88F5281-Rev-Unsupported";
 498                 }
 499         } else if (*dev == MV88F5182_DEV_ID) {
 500                 if (*rev == MV88F5182_REV_A2) {
 501                         *dev_name = "MV88F5182-A2";
 502                 } else {
 503                         *dev_name = "MV88F5182-Rev-Unsupported";
 504                 }
 505         } else if (*dev == MV88F5181_DEV_ID) {
 506                 if (*rev == MV88F5181_REV_B1) {
 507                         *dev_name = "MV88F5181-Rev-B1";
 508                 } else if (*rev == MV88F5181L_REV_A1) {
 509                         *dev_name = "MV88F5181L-Rev-A1";
 510                 } else {
 511                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
 512                 }
 513         } else {
 514                 *dev_name = "Device-Unknown";
 515         }
 516 }
 517
 518 void __init orion5x_init(void)
 519 {
 520         char *dev_name;
 521         u32 dev, rev;
 522
 523         orion5x_id(&dev, &rev, &dev_name);
 524         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
 525
 526         orion5x_eth_shared_data.t_clk = orion5x_tclk;
 527         orion5x_uart0_data[0].uartclk = orion5x_tclk;
 528         orion5x_uart1_data[0].uartclk = orion5x_tclk;
 529
 530         /*
 531          * Setup Orion address map
 532          */
 533         orion5x_setup_cpu_mbus_bridge();
 534
 535         /*
 536          * Don't issue "Wait for Interrupt" instruction if we are
 537          * running on D0 5281 silicon.
 538          */
 539         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
 540                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
 541                 disable_hlt();
 542         }
 543 }
 544
 545 /*
 546  * Many orion-based systems have buggy bootloader implementations.
 547  * This is a common fixup for bogus memory tags.
 548  */
 549 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
 550                             char **from, struct meminfo *meminfo)
 551 {
 552         for (; t->hdr.size; t = tag_next(t))
 553                 if (t->hdr.tag == ATAG_MEM &&
 554                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
 555                      t->u.mem.start & ~PAGE_MASK)) {
 556                         printk(KERN_WARNING
 557                                "Clearing invalid memory bank %dKB@0x%08x\n",
 558                                t->u.mem.size / 1024, t->u.mem.start);
 559                         t->hdr.tag = 0;
 560                 }
 561 }