arch/arm/mach-omap2/usb-tusb6010.c

   1 /*
   2  * linux/arch/arm/mach-omap/omap2/usb-tusb6010.c
   3  *
   4  * Copyright (C) 2006 Nokia Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/errno.h>
  13 #include <linux/delay.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <linux/usb/musb.h>
  17
  18 #include <asm/arch/gpmc.h>
  19 #include <asm/arch/gpio.h>
  20
  21
  22 static u8               async_cs, sync_cs;
  23 static unsigned         refclk_psec;
  24
  25
  26 /* t2_ps, when quantized to fclk units, must happen no earlier than
  27  * the clock after after t1_NS.
  28  *
  29  * Return a possibly updated value of t2_ps, converted to nsec.
  30  */
  31 static unsigned
  32 next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)
  33 {
  34         unsigned        t1_ps = t1_NS * 1000;
  35         unsigned        t1_f, t2_f;
  36
  37         if ((t1_ps + fclk_ps) < t2_ps)
  38                 return t2_ps / 1000;
  39
  40         t1_f = (t1_ps + fclk_ps - 1) / fclk_ps;
  41         t2_f = (t2_ps + fclk_ps - 1) / fclk_ps;
  42
  43         if (t1_f >= t2_f)
  44                 t2_f = t1_f + 1;
  45
  46         return (t2_f * fclk_ps) / 1000;
  47 }
  48
  49 /* NOTE:  timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
  50
  51 static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)
  52 {
  53         struct gpmc_timings     t;
  54         unsigned                t_acsnh_advnh = sysclk_ps + 3000;
  55         unsigned                tmp;
  56
  57         memset(&t, 0, sizeof(t));
  58
  59         /* CS_ON = t_acsnh_acsnl */
  60         t.cs_on = 8;
  61         /* ADV_ON = t_acsnh_advnh - t_advn */
  62         t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps);
  63
  64         /*
  65          * READ ... from omap2420 TRM fig 12-13
  66          */
  67
  68         /* ADV_RD_OFF = t_acsnh_advnh */
  69         t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps);
  70
  71         /* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */
  72         t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps);
  73
  74         /* ACCESS = counters continue only after nRDY */
  75         tmp = t.oe_on * 1000 + 300;
  76         t.access = next_clk(t.oe_on, tmp, fclk_ps);
  77
  78         /* OE_OFF = after data gets sampled */
  79         tmp = t.access * 1000;
  80         t.oe_off = next_clk(t.access, tmp, fclk_ps);
  81
  82         t.cs_rd_off = t.oe_off;
  83
  84         tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */;
  85         t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
  86
  87         /*
  88          * WRITE ... from omap2420 TRM fig 12-15
  89          */
  90
  91         /* ADV_WR_OFF = t_acsnh_advnh */
  92         t.adv_wr_off = t.adv_rd_off;
  93
  94         /* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */
  95         t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps);
  96
  97         /* WE_OFF = after data gets sampled */
  98         tmp = t.we_on * 1000 + 300;
  99         t.we_off = next_clk(t.we_on, tmp, fclk_ps);
 100
 101         t.cs_wr_off = t.we_off;
 102
 103         tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;
 104         t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
 105
 106         return gpmc_cs_set_timings(async_cs, &t);
 107 }
 108
 109 static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)
 110 {
 111         struct gpmc_timings     t;
 112         unsigned                t_scsnh_advnh = sysclk_ps + 3000;
 113         unsigned                tmp;
 114
 115         memset(&t, 0, sizeof(t));
 116         t.cs_on = 8;
 117
 118         /* ADV_ON = t_acsnh_advnh - t_advn */
 119         t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps);
 120
 121         /* GPMC_CLK rate = fclk rate / div */
 122         t.sync_clk = 12 /* 11.1 nsec */;
 123         tmp = (t.sync_clk * 1000 + fclk_ps - 1) / fclk_ps;
 124         if (tmp > 4)
 125                 return -ERANGE;
 126         if (tmp <= 0)
 127                 tmp = 1;
 128         t.page_burst_access = (fclk_ps * tmp) / 1000;
 129
 130         /*
 131          * READ ... based on omap2420 TRM fig 12-19, 12-20
 132          */
 133
 134         /* ADV_RD_OFF = t_scsnh_advnh */
 135         t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps);
 136
 137         /* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */
 138         tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps);
 139         t.oe_on = next_clk(t.adv_on, tmp, fclk_ps);
 140
 141         /* ACCESS = number of clock cycles after t_adv_eon */
 142         tmp = (t.oe_on * 1000) + (5 * fclk_ps);
 143         t.access = next_clk(t.oe_on, tmp, fclk_ps);
 144
 145         /* OE_OFF = after data gets sampled */
 146         tmp = (t.access * 1000) + (1 * fclk_ps);
 147         t.oe_off = next_clk(t.access, tmp, fclk_ps);
 148
 149         t.cs_rd_off = t.oe_off;
 150
 151         tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */;
 152         t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);
 153
 154         /*
 155          * WRITE ... based on omap2420 TRM fig 12-21
 156          */
 157
 158         /* ADV_WR_OFF = t_scsnh_advnh */
 159         t.adv_wr_off = t.adv_rd_off;
 160
 161         /* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */
 162         tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps);
 163         t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps);
 164
 165         /* WE_OFF = number of clock cycles after t_adv_wen */
 166         tmp = (t.we_on * 1000) + (6 * fclk_ps);
 167         t.we_off = next_clk(t.we_on, tmp, fclk_ps);
 168
 169         t.cs_wr_off = t.we_off;
 170
 171         tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;
 172         t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);
 173
 174         return gpmc_cs_set_timings(sync_cs, &t);
 175 }
 176
 177 extern unsigned long gpmc_get_fclk_period(void);
 178
 179 /* tusb driver calls this when it changes the chip's clocking */
 180 int tusb6010_platform_retime(unsigned is_refclk)
 181 {
 182         static const char       error[] =
 183                 KERN_ERR "tusb6010 %s retime error %d\n";
 184
 185         unsigned        fclk_ps = gpmc_get_fclk_period();
 186         unsigned        sysclk_ps;
 187         int             status;
 188
 189         if (!refclk_psec)
 190                 return -ENODEV;
 191
 192         sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
 193
 194         status = tusb_set_async_mode(sysclk_ps, fclk_ps);
 195         if (status < 0) {
 196                 printk(error, "async", status);
 197                 goto done;
 198         }
 199         status = tusb_set_sync_mode(sysclk_ps, fclk_ps);
 200         if (status < 0)
 201                 printk(error, "sync", status);
 202 done:
 203         return status;
 204 }
 205 EXPORT_SYMBOL_GPL(tusb6010_platform_retime);
 206
 207 static struct resource tusb_resources[] = {
 208         /* Order is significant!  The start/end fields
 209          * are updated during setup..
 210          */
 211         { /* Asynchronous access */
 212                 .flags  = IORESOURCE_MEM,
 213         },
 214         { /* Synchronous access */
 215                 .flags  = IORESOURCE_MEM,
 216         },
 217         { /* IRQ */
 218                 .flags  = IORESOURCE_IRQ,
 219         },
 220 };
 221
 222 static u64 tusb_dmamask = ~(u32)0;
 223
 224 static struct platform_device tusb_device = {
 225         .name           = "musb_hdrc",
 226         .id             = -1,
 227         .dev = {
 228                 .dma_mask               = &tusb_dmamask,
 229                 .coherent_dma_mask      = 0xffffffff,
 230         },
 231         .num_resources  = ARRAY_SIZE(tusb_resources),
 232         .resource       = tusb_resources,
 233 };
 234
 235
 236 /* this may be called only from board-*.c setup code */
 237 int __init
 238 tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
 239                 unsigned ps_refclk, unsigned waitpin,
 240                 unsigned async, unsigned sync,
 241                 unsigned irq, unsigned dmachan)
 242 {
 243         int             status;
 244         static char     error[] __initdata =
 245                 KERN_ERR "tusb6010 init error %d, %d\n";
 246
 247         /* ASYNC region, primarily for PIO */
 248         status = gpmc_cs_request(async, SZ_16M, (unsigned long *)
 249                                 &tusb_resources[0].start);
 250         if (status < 0) {
 251                 printk(error, 1, status);
 252                 return status;
 253         }
 254         tusb_resources[0].end = tusb_resources[0].start + 0x9ff;
 255         async_cs = async;
 256         gpmc_cs_write_reg(async, GPMC_CS_CONFIG1,
 257                           GPMC_CONFIG1_PAGE_LEN(2)
 258                         | GPMC_CONFIG1_WAIT_READ_MON
 259                         | GPMC_CONFIG1_WAIT_WRITE_MON
 260                         | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
 261                         | GPMC_CONFIG1_READTYPE_ASYNC
 262                         | GPMC_CONFIG1_WRITETYPE_ASYNC
 263                         | GPMC_CONFIG1_DEVICESIZE_16
 264                         | GPMC_CONFIG1_DEVICETYPE_NOR
 265                         | GPMC_CONFIG1_MUXADDDATA);
 266
 267
 268         /* SYNC region, primarily for DMA */
 269         status = gpmc_cs_request(sync, SZ_16M, (unsigned long *)
 270                                 &tusb_resources[1].start);
 271         if (status < 0) {
 272                 printk(error, 2, status);
 273                 return status;
 274         }
 275         tusb_resources[1].end = tusb_resources[1].start + 0x9ff;
 276         sync_cs = sync;
 277         gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1,
 278                           GPMC_CONFIG1_READMULTIPLE_SUPP
 279                         | GPMC_CONFIG1_READTYPE_SYNC
 280                         | GPMC_CONFIG1_WRITEMULTIPLE_SUPP
 281                         | GPMC_CONFIG1_WRITETYPE_SYNC
 282                         | GPMC_CONFIG1_CLKACTIVATIONTIME(1)
 283                         | GPMC_CONFIG1_PAGE_LEN(2)
 284                         | GPMC_CONFIG1_WAIT_READ_MON
 285                         | GPMC_CONFIG1_WAIT_WRITE_MON
 286                         | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin)
 287                         | GPMC_CONFIG1_DEVICESIZE_16
 288                         | GPMC_CONFIG1_DEVICETYPE_NOR
 289                         | GPMC_CONFIG1_MUXADDDATA
 290                         /* fclk divider gets set later */
 291                         );
 292
 293         /* IRQ */
 294         status = omap_request_gpio(irq);
 295         if (status < 0) {
 296                 printk(error, 3, status);
 297                 return status;
 298         }
 299         omap_set_gpio_direction(irq, 1);
 300         tusb_resources[2].start = irq + IH_GPIO_BASE;
 301
 302         /* set up memory timings ... can speed them up later */
 303         if (!ps_refclk) {
 304                 printk(error, 4, status);
 305                 return -ENODEV;
 306         }
 307         refclk_psec = ps_refclk;
 308         status = tusb6010_platform_retime(1);
 309         if (status < 0) {
 310                 printk(error, 5, status);
 311                 return status;
 312         }
 313
 314         /* finish device setup ... */
 315         if (!data) {
 316                 printk(error, 6, status);
 317                 return -ENODEV;
 318         }
 319         data->multipoint = 1;
 320         tusb_device.dev.platform_data = data;
 321
 322         /* REVISIT let the driver know what DMA channels work */
 323         if (!dmachan)
 324                 tusb_device.dev.dma_mask = NULL;
 325
 326         /* so far so good ... register the device */
 327         status = platform_device_register(&tusb_device);
 328         if (status < 0) {
 329                 printk(error, 7, status);
 330                 return status;
 331         }
 332         return 0;
 333 }