2 * linux/arch/arm/mach-omap2/timer-gp.c
4 * OMAP2 GP timer support.
6 * Copyright (C) 2005 Nokia Corporation
7 * Author: Paul Mundt <paul.mundt@nokia.com>
8 * Juha Yrjölä <juha.yrjola@nokia.com>
10 * Some parts based off of TI's 24xx code:
12 * Copyright (C) 2004 Texas Instruments, Inc.
14 * Roughly modelled after the OMAP1 MPU timer code.
16 * This file is subject to the terms and conditions of the GNU General Public
17 * License. See the file "COPYING" in the main directory of this archive
20 #include <linux/init.h>
21 #include <linux/time.h>
22 #include <linux/interrupt.h>
23 #include <asm/mach/time.h>
24 #include <asm/delay.h>
27 #define OMAP2_GP_TIMER1_BASE 0x48028000
28 #define OMAP2_GP_TIMER2_BASE 0x4802a000
29 #define OMAP2_GP_TIMER3_BASE 0x48078000
30 #define OMAP2_GP_TIMER4_BASE 0x4807a000
32 #define GP_TIMER_TIDR 0x00
33 #define GP_TIMER_TISR 0x18
34 #define GP_TIMER_TIER 0x1c
35 #define GP_TIMER_TCLR 0x24
36 #define GP_TIMER_TCRR 0x28
37 #define GP_TIMER_TLDR 0x2c
38 #define GP_TIMER_TSICR 0x40
40 #define OS_TIMER_NR 1 /* GP timer 2 */
42 static unsigned long timer_base[] = {
43 IO_ADDRESS(OMAP2_GP_TIMER1_BASE),
44 IO_ADDRESS(OMAP2_GP_TIMER2_BASE),
45 IO_ADDRESS(OMAP2_GP_TIMER3_BASE),
46 IO_ADDRESS(OMAP2_GP_TIMER4_BASE),
49 static inline unsigned int timer_read_reg(int nr, unsigned int reg)
51 return __raw_readl(timer_base[nr] + reg);
54 static inline void timer_write_reg(int nr, unsigned int reg, unsigned int val)
56 __raw_writel(val, timer_base[nr] + reg);
59 static inline void omap2_gp_timer_start(int nr, unsigned long load_val)
63 tmp = 0xffffffff - load_val;
65 timer_write_reg(nr, GP_TIMER_TLDR, tmp);
66 timer_write_reg(nr, GP_TIMER_TCRR, tmp);
67 timer_write_reg(nr, GP_TIMER_TIER, 1 << 1);
68 timer_write_reg(nr, GP_TIMER_TCLR, (1 << 5) | (1 << 1) | 1);
71 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
74 write_seqlock(&xtime_lock);
76 timer_write_reg(OS_TIMER_NR, GP_TIMER_TISR, 1 << 1);
79 write_sequnlock(&xtime_lock);
84 static struct irqaction omap2_gp_timer_irq = {
86 .flags = SA_INTERRUPT,
87 .handler = omap2_gp_timer_interrupt,
90 #define MPU_TIMER_TICK_PERIOD (192000 - 1)
92 static void __init omap2_gp_timer_init(void)
96 l = timer_read_reg(OS_TIMER_NR, GP_TIMER_TIDR);
97 printk(KERN_INFO "OMAP2 GP timer (HW version %d.%d)\n",
98 (l >> 4) & 0x0f, l & 0x0f);
100 setup_irq(38, &omap2_gp_timer_irq);
102 omap2_gp_timer_start(OS_TIMER_NR, MPU_TIMER_TICK_PERIOD);
105 struct sys_timer omap_timer = {
106 .init = omap2_gp_timer_init,