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OMAP: SERIAL: Provide function to enable/disable uart clocks
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1 /*
2  * arch/arm/mach-omap2/serial.c
3  *
4  * OMAP2 serial support.
5  *
6  * Copyright (C) 2005-2008 Nokia Corporation
7  * Author: Paul Mundt <paul.mundt@nokia.com>
8  *
9  * Based off of arch/arm/mach-omap/omap1/serial.c
10  *
11  * This file is subject to the terms and conditions of the GNU General Public
12  * License. See the file "COPYING" in the main directory of this archive
13  * for more details.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/serial_8250.h>
18 #include <linux/serial_reg.h>
19 #include <linux/clk.h>
20
21 #include <asm/io.h>
22
23 #include <asm/arch/common.h>
24 #include <asm/arch/board.h>
25
26 static struct clk *uart_ick[OMAP_MAX_NR_PORTS];
27 static struct clk *uart_fck[OMAP_MAX_NR_PORTS];
28
29 static struct plat_serial8250_port serial_platform_data[] = {
30         {
31                 .membase        = (char *)IO_ADDRESS(OMAP_UART1_BASE),
32                 .mapbase        = (unsigned long)OMAP_UART1_BASE,
33                 .irq            = 72,
34                 .flags          = UPF_BOOT_AUTOCONF,
35                 .iotype         = UPIO_MEM,
36                 .regshift       = 2,
37                 .uartclk        = OMAP24XX_BASE_BAUD * 16,
38         }, {
39                 .membase        = (char *)IO_ADDRESS(OMAP_UART2_BASE),
40                 .mapbase        = (unsigned long)OMAP_UART2_BASE,
41                 .irq            = 73,
42                 .flags          = UPF_BOOT_AUTOCONF,
43                 .iotype         = UPIO_MEM,
44                 .regshift       = 2,
45                 .uartclk        = OMAP24XX_BASE_BAUD * 16,
46         }, {
47                 .membase        = (char *)IO_ADDRESS(OMAP_UART3_BASE),
48                 .mapbase        = (unsigned long)OMAP_UART3_BASE,
49                 .irq            = 74,
50                 .flags          = UPF_BOOT_AUTOCONF,
51                 .iotype         = UPIO_MEM,
52                 .regshift       = 2,
53                 .uartclk        = OMAP24XX_BASE_BAUD * 16,
54         }, {
55                 .flags          = 0
56         }
57 };
58
59 static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
60                                            int offset)
61 {
62         offset <<= up->regshift;
63         return (unsigned int)__raw_readb(up->membase + offset);
64 }
65
66 static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
67                                     int value)
68 {
69         offset <<= p->regshift;
70         __raw_writeb(value, (unsigned long)(p->membase + offset));
71 }
72
73 /*
74  * Internal UARTs need to be initialized for the 8250 autoconfig to work
75  * properly. Note that the TX watermark initialization may not be needed
76  * once the 8250.c watermark handling code is merged.
77  */
78 static inline void __init omap_serial_reset(struct plat_serial8250_port *p)
79 {
80         serial_write_reg(p, UART_OMAP_MDR1, 0x07);
81         serial_write_reg(p, UART_OMAP_SCR, 0x08);
82         serial_write_reg(p, UART_OMAP_MDR1, 0x00);
83         serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0));
84 }
85
86 void omap_serial_enable_clocks(int enable)
87 {
88         int i;
89         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
90                 if (uart_ick[i])
91                         enable ? clk_enable(uart_ick[i]) :
92                                 clk_disable(uart_ick[i]);
93                 if (uart_fck[i])
94                         enable ? clk_enable(uart_fck[i]) :
95                                 clk_disable(uart_fck[i]);
96         }
97 }
98
99 void __init omap_serial_init(void)
100 {
101         int i;
102         const struct omap_uart_config *info;
103         char name[16];
104
105         /*
106          * Make sure the serial ports are muxed on at this point.
107          * You have to mux them off in device drivers later on
108          * if not needed.
109          */
110
111         info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
112
113         if (info == NULL)
114                 return;
115
116         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
117                 struct plat_serial8250_port *p = serial_platform_data + i;
118
119                 if (!(info->enabled_uarts & (1 << i))) {
120                         p->membase = 0;
121                         p->mapbase = 0;
122                         continue;
123                 }
124
125                 sprintf(name, "uart%d_ick", i+1);
126                 uart_ick[i] = clk_get(NULL, name);
127                 if (IS_ERR(uart_ick[i])) {
128                         printk(KERN_ERR "Could not get uart%d_ick\n", i+1);
129                         uart_ick[i] = NULL;
130                 }
131                 else
132                         clk_enable(uart_ick[i]);
133                 sprintf(name, "uart%d_fck", i+1);
134                 uart_fck[i] = clk_get(NULL, name);
135                 if (IS_ERR(uart_fck[i])) {
136                         printk(KERN_ERR "Could not get uart%d_fck\n", i+1);
137                         uart_ick[i] = NULL;
138                 }
139                 else
140                         clk_enable(uart_fck[i]);
141
142                 omap_serial_reset(p);
143         }
144 }
145
146 static struct platform_device serial_device = {
147         .name                   = "serial8250",
148         .id                     = PLAT8250_DEV_PLATFORM,
149         .dev                    = {
150                 .platform_data  = serial_platform_data,
151         },
152 };
153
154 static int __init omap_init(void)
155 {
156         return platform_device_register(&serial_device);
157 }
158 arch_initcall(omap_init);