arch/arm/mach-omap2/mmc-twl4030.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mmc-twl4030.c
   3  *
   4  * Copyright (C) 2007-2008 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Author: Texas Instruments
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/module.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/gpio.h>
  19 #include <linux/i2c/twl4030.h>
  20
  21 #include <mach/hardware.h>
  22 #include <mach/control.h>
  23 #include <mach/mmc.h>
  24 #include <mach/board.h>
  25
  26 #include "mmc-twl4030.h"
  27
  28 #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
  29
  30 #define LDO_CLR                 0x00
  31 #define VSEL_S2_CLR             0x40
  32
  33 #define VMMC1_DEV_GRP           0x27
  34 #define VMMC1_CLR               0x00
  35 #define VMMC1_315V              0x03
  36 #define VMMC1_300V              0x02
  37 #define VMMC1_285V              0x01
  38 #define VMMC1_185V              0x00
  39 #define VMMC1_DEDICATED         0x2A
  40
  41 #define VMMC2_DEV_GRP           0x2B
  42 #define VMMC2_CLR               0x40
  43 #define VMMC2_315V              0x0c
  44 #define VMMC2_300V              0x0b
  45 #define VMMC2_285V              0x0a
  46 #define VMMC2_260V              0x08
  47 #define VMMC2_185V              0x06
  48 #define VMMC2_DEDICATED         0x2E
  49
  50 #define VMMC_DEV_GRP_P1         0x20
  51
  52 static u16 control_pbias_offset;
  53
  54 static struct twl_mmc_controller {
  55         u16             control_devconf_offset;
  56         u32             devconf_loopback_clock;
  57         int             card_detect_gpio;
  58         unsigned        card_wp_gpio;
  59         u8              twl_vmmc_dev_grp;
  60         u8              twl_mmc_dedicated;
  61 } hsmmc[] = {
  62         {
  63                 .control_devconf_offset         = OMAP2_CONTROL_DEVCONF0,
  64                 .devconf_loopback_clock         = OMAP2_MMCSDIO1ADPCLKISEL,
  65                 .card_detect_gpio               = -EINVAL,
  66                 .twl_vmmc_dev_grp               = VMMC1_DEV_GRP,
  67                 .twl_mmc_dedicated              = VMMC1_DEDICATED,
  68         },
  69         {
  70                 /* control_devconf_offset set dynamically */
  71                 .devconf_loopback_clock         = OMAP2_MMCSDIO2ADPCLKISEL,
  72                 .card_detect_gpio               = -EINVAL,
  73                 .twl_vmmc_dev_grp               = VMMC2_DEV_GRP,
  74                 .twl_mmc_dedicated              = VMMC2_DEDICATED,
  75         },
  76 };
  77
  78 static int twl_mmc1_card_detect(int irq)
  79 {
  80         /* NOTE: assumes card detect signal is active-low */
  81         return !gpio_get_value_cansleep(hsmmc[0].card_detect_gpio);
  82 }
  83
  84 static int twl_mmc1_get_ro(struct device *dev, int slot)
  85 {
  86         /* NOTE: assumes write protect signal is active-high */
  87         return gpio_get_value_cansleep(hsmmc[0].card_wp_gpio);
  88 }
  89
  90 /*
  91  * MMC Slot Initialization.
  92  */
  93 static int twl_mmc1_late_init(struct device *dev)
  94 {
  95         struct omap_mmc_platform_data *mmc = dev->platform_data;
  96         int ret = 0;
  97
  98         ret = gpio_request(hsmmc[0].card_detect_gpio, "mmc0_cd");
  99         if (ret)
 100                 goto done;
 101         ret = gpio_direction_input(hsmmc[0].card_detect_gpio);
 102         if (ret)
 103                 goto err;
 104
 105         /* FIXME assumes this uses (a) TWL4030 and (b) GPIO-0 ...
 106          * but that's not actually required.
 107          */
 108         ret = twl4030_set_gpio_debounce(0, true);
 109         if (ret)
 110                 goto err;
 111
 112         return ret;
 113
 114 err:
 115         dev_err(dev, "Failed to configure TWL4030 card detect\n");
 116 done:
 117         mmc->slots[0].card_detect_irq = 0;
 118         mmc->slots[0].card_detect = NULL;
 119         return ret;
 120 }
 121
 122 static void twl_mmc1_cleanup(struct device *dev)
 123 {
 124         gpio_free(hsmmc[0].card_detect_gpio);
 125 }
 126
 127 #ifdef CONFIG_PM
 128
 129 static int twl_mmc_suspend(struct device *dev, int slot)
 130 {
 131         struct omap_mmc_platform_data *mmc = dev->platform_data;
 132
 133         disable_irq(mmc->slots[0].card_detect_irq);
 134         return 0;
 135 }
 136
 137 static int twl_mmc_resume(struct device *dev, int slot)
 138 {
 139         struct omap_mmc_platform_data *mmc = dev->platform_data;
 140
 141         enable_irq(mmc->slots[0].card_detect_irq);
 142         return 0;
 143 }
 144
 145 #else
 146 #define twl_mmc_suspend NULL
 147 #define twl_mmc_resume  NULL
 148 #endif
 149
 150 /*
 151  * Sets the MMC voltage in twl4030
 152  */
 153 static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd)
 154 {
 155         int ret;
 156         u8 vmmc, dev_grp_val;
 157
 158         switch (1 << vdd) {
 159         case MMC_VDD_35_36:
 160         case MMC_VDD_34_35:
 161         case MMC_VDD_33_34:
 162         case MMC_VDD_32_33:
 163         case MMC_VDD_31_32:
 164         case MMC_VDD_30_31:
 165                 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
 166                         vmmc = VMMC1_315V;
 167                 else
 168                         vmmc = VMMC2_315V;
 169                 break;
 170         case MMC_VDD_29_30:
 171                 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
 172                         vmmc = VMMC1_315V;
 173                 else
 174                         vmmc = VMMC2_300V;
 175                 break;
 176         case MMC_VDD_27_28:
 177         case MMC_VDD_26_27:
 178                 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
 179                         vmmc = VMMC1_285V;
 180                 else
 181                         vmmc = VMMC2_285V;
 182                 break;
 183         case MMC_VDD_25_26:
 184         case MMC_VDD_24_25:
 185         case MMC_VDD_23_24:
 186         case MMC_VDD_22_23:
 187         case MMC_VDD_21_22:
 188         case MMC_VDD_20_21:
 189                 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
 190                         vmmc = VMMC1_285V;
 191                 else
 192                         vmmc = VMMC2_260V;
 193                 break;
 194         case MMC_VDD_165_195:
 195                 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP)
 196                         vmmc = VMMC1_185V;
 197                 else
 198                         vmmc = VMMC2_185V;
 199                 break;
 200         default:
 201                 vmmc = 0;
 202                 break;
 203         }
 204
 205         if (vmmc)
 206                 dev_grp_val = VMMC_DEV_GRP_P1;  /* Power up */
 207         else
 208                 dev_grp_val = LDO_CLR;          /* Power down */
 209
 210         ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 211                                         dev_grp_val, c->twl_vmmc_dev_grp);
 212         if (ret)
 213                 return ret;
 214
 215         ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 216                                         vmmc, c->twl_mmc_dedicated);
 217
 218         return ret;
 219 }
 220
 221 static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
 222                                 int vdd)
 223 {
 224         u32 reg;
 225         int ret = 0;
 226         struct twl_mmc_controller *c = &hsmmc[0];
 227
 228         if (power_on) {
 229                 if (cpu_is_omap2430()) {
 230                         reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
 231                         if ((1 << vdd) >= MMC_VDD_30_31)
 232                                 reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
 233                         else
 234                                 reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
 235                         omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
 236                 }
 237
 238                 /* REVISIT: Loop back clock not needed for 2430? */
 239                 if (!cpu_is_omap2430()) {
 240                         reg = omap_ctrl_readl(c->control_devconf_offset);
 241                         reg |= OMAP2_MMCSDIO1ADPCLKISEL;
 242                         omap_ctrl_writel(reg, c->control_devconf_offset);
 243                 }
 244
 245                 reg = omap_ctrl_readl(control_pbias_offset);
 246                 reg |= OMAP2_PBIASSPEEDCTRL0;
 247                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
 248                 omap_ctrl_writel(reg, control_pbias_offset);
 249
 250                 ret = twl_mmc_set_voltage(c, vdd);
 251
 252                 /* 100ms delay required for PBIAS configuration */
 253                 msleep(100);
 254                 reg = omap_ctrl_readl(control_pbias_offset);
 255                 reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
 256                 if ((1 << vdd) <= MMC_VDD_165_195)
 257                         reg &= ~OMAP2_PBIASLITEVMODE0;
 258                 else
 259                         reg |= OMAP2_PBIASLITEVMODE0;
 260                 omap_ctrl_writel(reg, control_pbias_offset);
 261         } else {
 262                 reg = omap_ctrl_readl(control_pbias_offset);
 263                 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
 264                 omap_ctrl_writel(reg, control_pbias_offset);
 265
 266                 ret = twl_mmc_set_voltage(c, 0);
 267
 268                 /* 100ms delay required for PBIAS configuration */
 269                 msleep(100);
 270                 reg = omap_ctrl_readl(control_pbias_offset);
 271                 reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
 272                         OMAP2_PBIASLITEVMODE0);
 273                 omap_ctrl_writel(reg, control_pbias_offset);
 274         }
 275
 276         return ret;
 277 }
 278
 279 static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vdd)
 280 {
 281         int ret;
 282
 283         struct twl_mmc_controller *c = &hsmmc[1];
 284
 285         if (power_on) {
 286                 u32 reg;
 287
 288                 reg = omap_ctrl_readl(c->control_devconf_offset);
 289                 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
 290                 omap_ctrl_writel(reg, c->control_devconf_offset);
 291                 ret = twl_mmc_set_voltage(c, vdd);
 292         } else {
 293                 ret = twl_mmc_set_voltage(c, 0);
 294         }
 295
 296         return ret;
 297 }
 298
 299 static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC];
 300
 301 #define HSMMC_NAME_LEN  9
 302
 303 void __init hsmmc_init(struct twl4030_hsmmc_info *controllers)
 304 {
 305         struct twl4030_hsmmc_info *c;
 306
 307         if (cpu_is_omap2430()) {
 308                 control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
 309                 hsmmc[1].control_devconf_offset = OMAP243X_CONTROL_DEVCONF1;
 310         } else {
 311                 control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
 312                 hsmmc[1].control_devconf_offset = OMAP343X_CONTROL_DEVCONF1;
 313         }
 314
 315         for (c = controllers; c->mmc; c++) {
 316                 struct omap_mmc_platform_data *mmc;
 317                 char *name;
 318
 319                 mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
 320                 if (!mmc) {
 321                         pr_err("Cannot allocate memory for mmc device!\n");
 322                         return;
 323                 }
 324
 325                 name = kzalloc(HSMMC_NAME_LEN, GFP_KERNEL);
 326                 if (!name) {
 327                         kfree(mmc);
 328                         pr_err("Cannot allocate memory for mmc name!\n");
 329                         return;
 330                 }
 331
 332                 sprintf(name, "mmc%islot%i", c->mmc, 1);
 333                 mmc->slots[0].name = name;
 334                 mmc->nr_slots = 1;
 335                 mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
 336                                         MMC_VDD_26_27 | MMC_VDD_27_28 |
 337                                         MMC_VDD_29_30 |
 338                                         MMC_VDD_30_31 | MMC_VDD_31_32;
 339                 mmc->slots[0].wires = c->wires;
 340                 mmc->dma_mask = 0xffffffff;
 341
 342                 /* NOTE:  we assume OMAP's MMC1 and MMC2 use
 343                  * the TWL4030's VMMC1 and VMMC2, respectively;
 344                  * and that OMAP's MMC3 isn't used.
 345                  */
 346
 347                 switch (c->mmc) {
 348                 case 1:
 349                         mmc->slots[0].set_power = twl_mmc1_set_power;
 350                         if (gpio_is_valid(c->gpio_cd)) {
 351                                 mmc->slots[0].card_detect_irq =
 352                                                 gpio_to_irq(c->gpio_cd);
 353                                 mmc->suspend = twl_mmc_suspend;
 354                                 mmc->resume = twl_mmc_resume;
 355
 356                                 /* NOTE: hsmmc[0] is hard-wired ... */
 357                                 hsmmc[0].card_detect_gpio = c->gpio_cd;
 358                                 mmc->init = twl_mmc1_late_init;
 359                                 mmc->cleanup = twl_mmc1_cleanup;
 360                                 mmc->slots[0].card_detect =
 361                                                 twl_mmc1_card_detect;
 362                         }
 363                         if (gpio_is_valid(c->gpio_wp)) {
 364                                 gpio_request(c->gpio_wp, "mmc0_wp");
 365                                 gpio_direction_input(c->gpio_wp);
 366
 367                                 /* NOTE: hsmmc[0] is hard-wired ... */
 368                                 hsmmc[0].card_wp_gpio = c->gpio_wp;
 369                                 mmc->slots[0].get_ro = twl_mmc1_get_ro;
 370                         }
 371                         hsmmc_data[0] = mmc;
 372                         break;
 373                 case 2:
 374                         /* FIXME rework interfaces so that mmc2 (and mmc3) can
 375                          * be fully functional... hsmmc[] shouldn't hold gpios.
 376                          */
 377                         mmc->slots[0].set_power = twl_mmc2_set_power;
 378                         if (gpio_is_valid(c->gpio_cd))
 379                                 pr_warning("MMC2 detect nyet supported!\n");
 380                         if (gpio_is_valid(c->gpio_wp))
 381                                 pr_warning("MMC2 WP nyet supported!\n");
 382                         hsmmc_data[1] = mmc;
 383                         break;
 384                 default:
 385                         pr_err("MMC%d configuration not supported!\n", c->mmc);
 386                         return;
 387                 }
 388         }
 389
 390         omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
 391 }
 392
 393 #endif