arch/arm/mach-omap2/clockdomains.h

   1 /*
   2  * OMAP2/3 clockdomains
   3  *
   4  * Copyright (C) 2008 Texas Instruments, Inc.
   5  * Copyright (C) 2008 Nokia Corporation
   6  *
   7  * Written by Paul Walmsley
   8  */
   9
  10 #ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
  11 #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H
  12
  13 #include <mach/clockdomain.h>
  14
  15 /*
  16  * OMAP2/3-common clockdomains
  17  *
  18  * Even though the 2420 has a single PRCM module from the
  19  * interconnect's perspective, internally it does appear to have
  20  * separate PRM and CM clockdomains.  The usual test case is
  21  * sys_clkout/sys_clkout2.
  22  */
  23
  24 static struct clockdomain prm_clkdm = {
  25         .name           = "prm_clkdm",
  26         .pwrdm          = { .name = "wkup_pwrdm" },
  27         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
  28 };
  29
  30 static struct clockdomain cm_clkdm = {
  31         .name           = "cm_clkdm",
  32         .pwrdm          = { .name = "core_pwrdm" },
  33         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
  34 };
  35
  36 /*
  37  * 2420-only clockdomains
  38  */
  39
  40 #if defined(CONFIG_ARCH_OMAP2420)
  41
  42 static struct clockdomain mpu_2420_clkdm = {
  43         .name           = "mpu_clkdm",
  44         .pwrdm          = { .name = "mpu_pwrdm" },
  45         .flags          = CLKDM_CAN_HWSUP,
  46         .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
  47         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
  48 };
  49
  50 static struct clockdomain iva1_2420_clkdm = {
  51         .name           = "iva1_clkdm",
  52         .pwrdm          = { .name = "dsp_pwrdm" },
  53         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  54         .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
  55         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
  56 };
  57
  58 #endif  /* CONFIG_ARCH_OMAP2420 */
  59
  60
  61 /*
  62  * 2430-only clockdomains
  63  */
  64
  65 #if defined(CONFIG_ARCH_OMAP2430)
  66
  67 static struct clockdomain mpu_2430_clkdm = {
  68         .name           = "mpu_clkdm",
  69         .pwrdm          = { .name = "mpu_pwrdm" },
  70         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  71         .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
  72         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
  73 };
  74
  75 static struct clockdomain mdm_clkdm = {
  76         .name           = "mdm_clkdm",
  77         .pwrdm          = { .name = "mdm_pwrdm" },
  78         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  79         .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
  80         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
  81 };
  82
  83 #endif    /* CONFIG_ARCH_OMAP2430 */
  84
  85
  86 /*
  87  * 24XX-only clockdomains
  88  */
  89
  90 #if defined(CONFIG_ARCH_OMAP24XX)
  91
  92 static struct clockdomain dsp_clkdm = {
  93         .name           = "dsp_clkdm",
  94         .pwrdm          = { .name = "dsp_pwrdm" },
  95         .flags          = CLKDM_CAN_HWSUP_SWSUP,
  96         .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
  97         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
  98 };
  99
 100 static struct clockdomain gfx_24xx_clkdm = {
 101         .name           = "gfx_clkdm",
 102         .pwrdm          = { .name = "gfx_pwrdm" },
 103         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 104         .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
 105         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 106 };
 107
 108 static struct clockdomain core_l3_24xx_clkdm = {
 109         .name           = "core_l3_clkdm",
 110         .pwrdm          = { .name = "core_pwrdm" },
 111         .flags          = CLKDM_CAN_HWSUP,
 112         .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
 113         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 114 };
 115
 116 static struct clockdomain core_l4_24xx_clkdm = {
 117         .name           = "core_l4_clkdm",
 118         .pwrdm          = { .name = "core_pwrdm" },
 119         .flags          = CLKDM_CAN_HWSUP,
 120         .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
 121         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 122 };
 123
 124 static struct clockdomain dss_24xx_clkdm = {
 125         .name           = "dss_clkdm",
 126         .pwrdm          = { .name = "core_pwrdm" },
 127         .flags          = CLKDM_CAN_HWSUP,
 128         .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
 129         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
 130 };
 131
 132 #endif   /* CONFIG_ARCH_OMAP24XX */
 133
 134
 135 /*
 136  * 34xx clockdomains
 137  */
 138
 139 #if defined(CONFIG_ARCH_OMAP34XX)
 140
 141 static struct clockdomain mpu_34xx_clkdm = {
 142         .name           = "mpu_clkdm",
 143         .pwrdm          = { .name = "mpu_pwrdm" },
 144         .flags          = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
 145         .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
 146         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 147 };
 148
 149 static struct clockdomain neon_clkdm = {
 150         .name           = "neon_clkdm",
 151         .pwrdm          = { .name = "neon_pwrdm" },
 152         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 153         .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
 154         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 155 };
 156
 157 static struct clockdomain iva2_clkdm = {
 158         .name           = "iva2_clkdm",
 159         .pwrdm          = { .name = "iva2_pwrdm" },
 160         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 161         .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
 162         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 163 };
 164
 165 static struct clockdomain gfx_3430es1_clkdm = {
 166         .name           = "gfx_clkdm",
 167         .pwrdm          = { .name = "gfx_pwrdm" },
 168         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 169         .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
 170         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
 171 };
 172
 173 static struct clockdomain sgx_clkdm = {
 174         .name           = "sgx_clkdm",
 175         .pwrdm          = { .name = "sgx_pwrdm" },
 176         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 177         .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
 178         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 179 };
 180
 181 /*
 182  * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
 183  * then that information was removed from the 34xx ES2+ TRM.  It is
 184  * unclear whether the core is still there, but the clockdomain logic
 185  * is there, and must be programmed to an appropriate state if the
 186  * CORE clockdomain is to become inactive.
 187  */
 188 static struct clockdomain d2d_clkdm = {
 189         .name           = "d2d_clkdm",
 190         .pwrdm          = { .name = "core_pwrdm" },
 191         .flags          = CLKDM_CAN_HWSUP,
 192         .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
 193         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 194 };
 195
 196 static struct clockdomain core_l3_34xx_clkdm = {
 197         .name           = "core_l3_clkdm",
 198         .pwrdm          = { .name = "core_pwrdm" },
 199         .flags          = CLKDM_CAN_HWSUP,
 200         .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
 201         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 202 };
 203
 204 static struct clockdomain core_l4_34xx_clkdm = {
 205         .name           = "core_l4_clkdm",
 206         .pwrdm          = { .name = "core_pwrdm" },
 207         .flags          = CLKDM_CAN_HWSUP,
 208         .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
 209         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 210 };
 211
 212 static struct clockdomain dss_34xx_clkdm = {
 213         .name           = "dss_clkdm",
 214         .pwrdm          = { .name = "dss_pwrdm" },
 215         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 216         .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
 217         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 218 };
 219
 220 static struct clockdomain cam_clkdm = {
 221         .name           = "cam_clkdm",
 222         .pwrdm          = { .name = "cam_pwrdm" },
 223         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 224         .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
 225         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 226 };
 227
 228 static struct clockdomain usbhost_clkdm = {
 229         .name           = "usbhost_clkdm",
 230         .pwrdm          = { .name = "usbhost_pwrdm" },
 231         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 232         .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
 233         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 234 };
 235
 236 static struct clockdomain per_clkdm = {
 237         .name           = "per_clkdm",
 238         .pwrdm          = { .name = "per_pwrdm" },
 239         .flags          = CLKDM_CAN_HWSUP_SWSUP,
 240         .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
 241         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 242 };
 243
 244 static struct clockdomain emu_clkdm = {
 245         .name           = "emu_clkdm",
 246         .pwrdm          = { .name = "emu_pwrdm" },
 247         .flags          = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP,
 248         .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
 249         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 250 };
 251
 252 #endif   /* CONFIG_ARCH_OMAP34XX */
 253
 254 /*
 255  * Clockdomain-powerdomain hwsup dependencies (34XX only)
 256  */
 257
 258 static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = {
 259         {
 260                 .pwrdm     = { .name = "mpu_pwrdm" },
 261                 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 262         },
 263         {
 264                 .pwrdm     = { .name = "iva2_pwrdm" },
 265                 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 266         },
 267         {
 268                 .pwrdm     = { .name = NULL },
 269         }
 270 };
 271
 272 /*
 273  *
 274  */
 275
 276 static struct clockdomain *clockdomains_omap[] = {
 277
 278         &cm_clkdm,
 279         &prm_clkdm,
 280
 281 #ifdef CONFIG_ARCH_OMAP2420
 282         &mpu_2420_clkdm,
 283         &iva1_2420_clkdm,
 284 #endif
 285
 286 #ifdef CONFIG_ARCH_OMAP2430
 287         &mpu_2430_clkdm,
 288         &mdm_clkdm,
 289 #endif
 290
 291 #ifdef CONFIG_ARCH_OMAP24XX
 292         &dsp_clkdm,
 293         &gfx_24xx_clkdm,
 294         &core_l3_24xx_clkdm,
 295         &core_l4_24xx_clkdm,
 296         &dss_24xx_clkdm,
 297 #endif
 298
 299 #ifdef CONFIG_ARCH_OMAP34XX
 300         &mpu_34xx_clkdm,
 301         &neon_clkdm,
 302         &iva2_clkdm,
 303         &gfx_3430es1_clkdm,
 304         &sgx_clkdm,
 305         &d2d_clkdm,
 306         &core_l3_34xx_clkdm,
 307         &core_l4_34xx_clkdm,
 308         &dss_34xx_clkdm,
 309         &cam_clkdm,
 310         &usbhost_clkdm,
 311         &per_clkdm,
 312         &emu_clkdm,
 313 #endif
 314
 315         NULL,
 316 };
 317
 318 #endif