arch/arm/mach-omap2/board-3430sdp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/board-3430sdp.c
   3  *
   4  * Copyright (C) 2007 Texas Instruments
   5  *
   6  * Modified from mach-omap2/board-generic.c
   7  *
   8  * Initial code: Syed Mohammed Khasim
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/delay.h>
  19 #include <linux/input.h>
  20 #include <linux/err.h>
  21 #include <linux/spi/spi.h>
  22 #include <linux/spi/ads7846.h>
  23 #include <linux/i2c/twl4030.h>
  24 #include <linux/regulator/machine.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/hardware.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/map.h>
  31
  32 #include <mach/mcspi.h>
  33 #include <mach/gpio.h>
  34 #include <mach/mux.h>
  35 #include <mach/board.h>
  36 #include <mach/usb.h>
  37 #include <mach/common.h>
  38 #include <mach/dma.h>
  39 #include <mach/gpmc.h>
  40
  41 #include <mach/control.h>
  42
  43 #include "sdram-qimonda-hyb18m512160af-6.h"
  44 #include "mmc-twl4030.h"
  45
  46 #define CONFIG_DISABLE_HFCLK 1
  47
  48 #define SDP3430_ETHR_START              DEBUG_BASE
  49 #define SDP3430_ETHR_GPIO_IRQ_SDPV1     29
  50 #define SDP3430_ETHR_GPIO_IRQ_SDPV2     6
  51 #define SDP3430_SMC91X_CS               3
  52
  53 #define SDP3430_TS_GPIO_IRQ_SDPV1       3
  54 #define SDP3430_TS_GPIO_IRQ_SDPV2       2
  55
  56 #define ENABLE_VAUX3_DEDICATED  0x03
  57 #define ENABLE_VAUX3_DEV_GRP    0x20
  58
  59 #define ENABLE_VAUX3_DEDICATED  0x03
  60 #define ENABLE_VAUX3_DEV_GRP    0x20
  61
  62 #define TWL4030_MSECURE_GPIO 22
  63
  64 static struct resource sdp3430_smc91x_resources[] = {
  65         [0] = {
  66                 .flags  = IORESOURCE_MEM,
  67         },
  68         [1] = {
  69                 .start  = 0,
  70                 .end    = 0,
  71                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  72         },
  73 };
  74
  75 static struct platform_device sdp3430_smc91x_device = {
  76         .name           = "smc91x",
  77         .id             = -1,
  78         .num_resources  = ARRAY_SIZE(sdp3430_smc91x_resources),
  79         .resource       = sdp3430_smc91x_resources,
  80 };
  81
  82 static int sdp3430_keymap[] = {
  83         KEY(0, 0, KEY_LEFT),
  84         KEY(0, 1, KEY_RIGHT),
  85         KEY(0, 2, KEY_A),
  86         KEY(0, 3, KEY_B),
  87         KEY(0, 4, KEY_C),
  88         KEY(1, 0, KEY_DOWN),
  89         KEY(1, 1, KEY_UP),
  90         KEY(1, 2, KEY_E),
  91         KEY(1, 3, KEY_F),
  92         KEY(1, 4, KEY_G),
  93         KEY(2, 0, KEY_ENTER),
  94         KEY(2, 1, KEY_I),
  95         KEY(2, 2, KEY_J),
  96         KEY(2, 3, KEY_K),
  97         KEY(2, 4, KEY_3),
  98         KEY(3, 0, KEY_M),
  99         KEY(3, 1, KEY_N),
 100         KEY(3, 2, KEY_O),
 101         KEY(3, 3, KEY_P),
 102         KEY(3, 4, KEY_Q),
 103         KEY(4, 0, KEY_R),
 104         KEY(4, 1, KEY_4),
 105         KEY(4, 2, KEY_T),
 106         KEY(4, 3, KEY_U),
 107         KEY(4, 4, KEY_D),
 108         KEY(5, 0, KEY_V),
 109         KEY(5, 1, KEY_W),
 110         KEY(5, 2, KEY_L),
 111         KEY(5, 3, KEY_S),
 112         KEY(5, 4, KEY_H),
 113         0
 114 };
 115
 116 static struct twl4030_keypad_data sdp3430_kp_data = {
 117         .rows           = 5,
 118         .cols           = 6,
 119         .keymap         = sdp3430_keymap,
 120         .keymapsize     = ARRAY_SIZE(sdp3430_keymap),
 121         .rep            = 1,
 122 };
 123
 124 static int ts_gpio;     /* Needed for ads7846_get_pendown_state */
 125
 126 static int __init msecure_init(void)
 127 {
 128         int ret = 0;
 129
 130 #ifdef CONFIG_RTC_DRV_TWL4030
 131         /* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */
 132         if (omap_type() == OMAP2_DEVICE_TYPE_GP &&
 133                         omap_rev() < OMAP3430_REV_ES2_0) {
 134                 void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() +
 135                         0xA3C;
 136                 int mux_mask = 0x04;
 137                 u16 tmp;
 138
 139                 ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure");
 140                 if (ret < 0) {
 141                         printk(KERN_ERR "msecure_init: can't"
 142                                 "reserve GPIO:%d !\n", TWL4030_MSECURE_GPIO);
 143                         goto out;
 144                 }
 145                 /*
 146                  * TWL4030 will be in secure mode if msecure line from OMAP
 147                  * is low. Make msecure line high in order to change the
 148                  * TWL4030 RTC time and calender registers.
 149                  */
 150                 tmp = __raw_readw(msecure_pad_config_reg);
 151                 tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */
 152                 tmp |= mux_mask;/* To enable mux mode 03/04 = GPIO_RTC */
 153                 __raw_writew(tmp, msecure_pad_config_reg);
 154
 155                 gpio_direction_output(TWL4030_MSECURE_GPIO, 1);
 156         }
 157 out:
 158 #endif
 159         return ret;
 160 }
 161
 162 /**
 163  * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
 164  *
 165  * @return - void. If request gpio fails then Flag KERN_ERR.
 166  */
 167 static void ads7846_dev_init(void)
 168 {
 169         if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
 170                 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
 171                 return;
 172         }
 173
 174         gpio_direction_input(ts_gpio);
 175
 176         omap_set_gpio_debounce(ts_gpio, 1);
 177         omap_set_gpio_debounce_time(ts_gpio, 0xa);
 178 }
 179
 180 static int ads7846_get_pendown_state(void)
 181 {
 182         return !gpio_get_value(ts_gpio);
 183 }
 184
 185 /*
 186  * This enable(1)/disable(0) the voltage for TS: uses twl4030 calls
 187  */
 188 static int ads7846_vaux_control(int vaux_cntrl)
 189 {
 190         int ret = 0;
 191
 192         /* FIXME use regulator calls */
 193
 194 #ifdef CONFIG_TWL4030_CORE
 195         /* check for return value of ldo_use: if success it returns 0 */
 196         if (vaux_cntrl == VAUX_ENABLE) {
 197                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 198                         ENABLE_VAUX3_DEDICATED, TWL4030_VAUX3_DEDICATED))
 199                         return -EIO;
 200                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 201                         ENABLE_VAUX3_DEV_GRP, TWL4030_VAUX3_DEV_GRP))
 202                         return -EIO;
 203         } else if (vaux_cntrl == VAUX_DISABLE) {
 204                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 205                         0x00, TWL4030_VAUX3_DEDICATED))
 206                         return -EIO;
 207                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 208                         0x00, TWL4030_VAUX3_DEV_GRP))
 209                         return -EIO;
 210         }
 211 #else
 212         ret = -EIO;
 213 #endif
 214         return ret;
 215 }
 216
 217 static struct ads7846_platform_data tsc2046_config __initdata = {
 218         .get_pendown_state      = ads7846_get_pendown_state,
 219         .keep_vref_on           = 1,
 220         .vaux_control           = ads7846_vaux_control,
 221 };
 222
 223
 224 static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
 225         .turbo_mode     = 0,
 226         .single_channel = 1,    /* 0: slave, 1: master */
 227 };
 228
 229 static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
 230         [0] = {
 231                 /*
 232                  * TSC2046 operates at a max freqency of 2MHz, so
 233                  * operate slightly below at 1.5MHz
 234                  */
 235                 .modalias               = "ads7846",
 236                 .bus_num                = 1,
 237                 .chip_select            = 0,
 238                 .max_speed_hz           = 1500000,
 239                 .controller_data        = &tsc2046_mcspi_config,
 240                 .irq                    = 0,
 241                 .platform_data          = &tsc2046_config,
 242         },
 243 };
 244
 245 static struct platform_device sdp3430_lcd_device = {
 246         .name           = "sdp2430_lcd",
 247         .id             = -1,
 248 };
 249
 250 static struct regulator_consumer_supply sdp3430_vdac_supply = {
 251         .supply         = "vdac",
 252         .dev            = &sdp3430_lcd_device.dev,
 253 };
 254
 255 static struct regulator_consumer_supply sdp3430_vdvi_supply = {
 256         .supply         = "vdvi",
 257         .dev            = &sdp3430_lcd_device.dev,
 258 };
 259
 260 static struct platform_device *sdp3430_devices[] __initdata = {
 261         &sdp3430_smc91x_device,
 262         &sdp3430_lcd_device,
 263 };
 264
 265 static inline void __init sdp3430_init_smc91x(void)
 266 {
 267         int eth_cs;
 268         unsigned long cs_mem_base;
 269         int eth_gpio = 0;
 270
 271         eth_cs = SDP3430_SMC91X_CS;
 272
 273         if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
 274                 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
 275                 return;
 276         }
 277
 278         sdp3430_smc91x_resources[0].start = cs_mem_base + 0x300;
 279         sdp3430_smc91x_resources[0].end = cs_mem_base + 0x30f;
 280         udelay(100);
 281
 282         if (omap_rev() > OMAP3430_REV_ES1_0)
 283                 eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV2;
 284         else
 285                 eth_gpio = SDP3430_ETHR_GPIO_IRQ_SDPV1;
 286
 287         sdp3430_smc91x_resources[1].start = gpio_to_irq(eth_gpio);
 288
 289         if (gpio_request(eth_gpio, "SMC91x irq") < 0) {
 290                 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
 291                         eth_gpio);
 292                 return;
 293         }
 294         gpio_direction_input(eth_gpio);
 295 }
 296
 297 static void __init omap_3430sdp_init_irq(void)
 298 {
 299         omap2_init_common_hw(hyb18m512160af6_sdrc_params);
 300         omap_init_irq();
 301         omap_gpio_init();
 302         sdp3430_init_smc91x();
 303 }
 304
 305 static struct omap_uart_config sdp3430_uart_config __initdata = {
 306         .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
 307 };
 308
 309 static struct omap_lcd_config sdp3430_lcd_config __initdata = {
 310         .ctrl_name      = "internal",
 311 };
 312
 313 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
 314         { OMAP_TAG_UART,        &sdp3430_uart_config },
 315         { OMAP_TAG_LCD,         &sdp3430_lcd_config },
 316 };
 317
 318 static int sdp3430_batt_table[] = {
 319 /* 0 C*/
 320 30800, 29500, 28300, 27100,
 321 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
 322 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
 323 11600, 11200, 10800, 10400, 10000, 9630,   9280,   8950,   8620,   8310,
 324 8020,   7730,   7460,   7200,   6950,   6710,   6470,   6250,   6040,   5830,
 325 5640,   5450,   5260,   5090,   4920,   4760,   4600,   4450,   4310,   4170,
 326 4040,   3910,   3790,   3670,   3550
 327 };
 328
 329 static struct twl4030_bci_platform_data sdp3430_bci_data = {
 330         .battery_tmp_tbl        = sdp3430_batt_table,
 331         .tblsize                = ARRAY_SIZE(sdp3430_batt_table),
 332 };
 333
 334 static struct twl4030_hsmmc_info mmc[] = {
 335         {
 336                 .mmc            = 1,
 337                 /* 8 bits (default) requires S6.3 == ON,
 338                  * so the SIM card isn't used; else 4 bits.
 339                  */
 340                 .wires          = 8,
 341                 .gpio_wp        = 4,
 342         },
 343         {
 344                 .mmc            = 2,
 345                 .wires          = 8,
 346                 .gpio_wp        = 7,
 347         },
 348         {}      /* Terminator */
 349 };
 350
 351 static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
 352         .supply                 = "vmmc",
 353 };
 354
 355 static struct regulator_consumer_supply sdp3430_vsim_supply = {
 356         .supply                 = "vmmc_aux",
 357 };
 358
 359 static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
 360         .supply                 = "vmmc",
 361 };
 362
 363 static int sdp3430_twl_gpio_setup(struct device *dev,
 364                 unsigned gpio, unsigned ngpio)
 365 {
 366         /* gpio + 0 is "mmc0_cd" (input/IRQ),
 367          * gpio + 1 is "mmc1_cd" (input/IRQ)
 368          */
 369         mmc[0].gpio_cd = gpio + 0;
 370         mmc[1].gpio_cd = gpio + 1;
 371         twl4030_mmc_init(mmc);
 372
 373         /* link regulators to MMC adapters ... we "know" the
 374          * regulators will be set up only *after* we return.
 375          */
 376         sdp3430_vmmc1_supply.dev = mmc[0].dev;
 377         sdp3430_vsim_supply.dev = mmc[0].dev;
 378         sdp3430_vmmc2_supply.dev = mmc[1].dev;
 379
 380         /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
 381         gpio_request(gpio + 7, "sub_lcd_en_bkl");
 382         gpio_direction_output(gpio + 7, 0);
 383
 384         /* gpio + 15 is "sub_lcd_nRST" (output) */
 385         gpio_request(gpio + 15, "sub_lcd_nRST");
 386         gpio_direction_output(gpio + 15, 0);
 387
 388         return 0;
 389 }
 390
 391 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
 392         .gpio_base      = OMAP_MAX_GPIO_LINES,
 393         .irq_base       = TWL4030_GPIO_IRQ_BASE,
 394         .irq_end        = TWL4030_GPIO_IRQ_END,
 395         .pulldowns      = BIT(2) | BIT(6) | BIT(8) | BIT(13)
 396                                 | BIT(16) | BIT(17),
 397         .setup          = sdp3430_twl_gpio_setup,
 398 };
 399
 400 static struct twl4030_usb_data sdp3430_usb_data = {
 401         .usb_mode       = T2_USB_MODE_ULPI,
 402 };
 403
 404 static struct twl4030_madc_platform_data sdp3430_madc_data = {
 405         .irq_line       = 1,
 406 };
 407
 408
 409 static struct twl4030_ins __initdata sleep_on_seq[] = {
 410 /*
 411  * Turn off VDD1 and VDD2.
 412  */
 413         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
 414         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
 415 #ifdef CONFIG_DISABLE_HFCLK
 416 /*
 417  * And also turn off the OMAP3 PLLs and the sysclk output.
 418  */
 419         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
 420         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
 421 #endif
 422 };
 423
 424 static struct twl4030_script sleep_on_script __initdata = {
 425         .script = sleep_on_seq,
 426         .size   = ARRAY_SIZE(sleep_on_seq),
 427         .flags  = TRITON_SLEEP_SCRIPT,
 428 };
 429
 430 static struct twl4030_ins wakeup_seq[] __initdata = {
 431 #ifndef CONFIG_DISABLE_HFCLK
 432 /*
 433  * Wakeup VDD1 and VDD2.
 434  */
 435         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
 436         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
 437 #else
 438 /*
 439  * Reenable the OMAP3 PLLs.
 440  * Wakeup VDD1 and VDD2.
 441  * Reenable sysclk output.
 442  */
 443         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
 444         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
 445         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
 446         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
 447 #endif /* #ifndef CONFIG_DISABLE_HFCLK */
 448 };
 449
 450 static struct twl4030_script wakeup_script __initdata = {
 451         .script = wakeup_seq,
 452         .size   = ARRAY_SIZE(wakeup_seq),
 453         .flags  = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
 454 };
 455
 456 static struct twl4030_ins wrst_seq[] __initdata = {
 457 /*
 458  * Reset twl4030.
 459  * Reset VDD1 regulator.
 460  * Reset VDD2 regulator.
 461  * Reset VPLL1 regulator.
 462  * Enable sysclk output.
 463  * Reenable twl4030.
 464  */
 465         {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
 466         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
 467         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
 468         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
 469         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
 470         {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
 471 };
 472 static struct twl4030_script wrst_script __initdata = {
 473         .script = wrst_seq,
 474         .size   = ARRAY_SIZE(wakeup_seq),
 475         .flags  = TRITON_WRST_SCRIPT,
 476 };
 477
 478 static struct twl4030_script *twl4030_scripts[] __initdata = {
 479         &sleep_on_script,
 480         &wakeup_script,
 481         &wrst_script,
 482 };
 483
 484 static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
 485         .scripts        = twl4030_scripts,
 486         .size           = ARRAY_SIZE(twl4030_scripts),
 487 };
 488
 489 /*
 490  * Apply all the fixed voltages since most versions of U-Boot
 491  * don't bother with that initialization.
 492  */
 493
 494 /* VAUX1 for mainboard (irda and sub-lcd) */
 495 static struct regulator_init_data sdp3430_vaux1 = {
 496         .constraints = {
 497                 .min_uV                 = 2800000,
 498                 .max_uV                 = 2800000,
 499                 .apply_uV               = true,
 500                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 501                                         | REGULATOR_MODE_STANDBY,
 502                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 503                                         | REGULATOR_CHANGE_STATUS,
 504         },
 505 };
 506
 507 /* VAUX2 for camera module */
 508 static struct regulator_init_data sdp3430_vaux2 = {
 509         .constraints = {
 510                 .min_uV                 = 2800000,
 511                 .max_uV                 = 2800000,
 512                 .apply_uV               = true,
 513                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 514                                         | REGULATOR_MODE_STANDBY,
 515                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 516                                         | REGULATOR_CHANGE_STATUS,
 517         },
 518 };
 519
 520 /* VAUX3 for LCD board */
 521 static struct regulator_init_data sdp3430_vaux3 = {
 522         .constraints = {
 523                 .min_uV                 = 2800000,
 524                 .max_uV                 = 2800000,
 525                 .apply_uV               = true,
 526                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 527                                         | REGULATOR_MODE_STANDBY,
 528                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 529                                         | REGULATOR_CHANGE_STATUS,
 530         },
 531 };
 532
 533 /* VAUX4 for OMAP VDD_CSI2 (camera) */
 534 static struct regulator_init_data sdp3430_vaux4 = {
 535         .constraints = {
 536                 .min_uV                 = 1800000,
 537                 .max_uV                 = 1800000,
 538                 .apply_uV               = true,
 539                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 540                                         | REGULATOR_MODE_STANDBY,
 541                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 542                                         | REGULATOR_CHANGE_STATUS,
 543         },
 544 };
 545
 546 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
 547 static struct regulator_init_data sdp3430_vmmc1 = {
 548         .constraints = {
 549                 .min_uV                 = 1850000,
 550                 .max_uV                 = 3150000,
 551                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 552                                         | REGULATOR_MODE_STANDBY,
 553                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
 554                                         | REGULATOR_CHANGE_MODE
 555                                         | REGULATOR_CHANGE_STATUS,
 556         },
 557         .num_consumer_supplies  = 1,
 558         .consumer_supplies      = &sdp3430_vmmc1_supply,
 559 };
 560
 561 /* VMMC2 for MMC2 card */
 562 static struct regulator_init_data sdp3430_vmmc2 = {
 563         .constraints = {
 564                 .min_uV                 = 1850000,
 565                 .max_uV                 = 1850000,
 566                 .apply_uV               = true,
 567                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 568                                         | REGULATOR_MODE_STANDBY,
 569                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 570                                         | REGULATOR_CHANGE_STATUS,
 571         },
 572         .num_consumer_supplies  = 1,
 573         .consumer_supplies      = &sdp3430_vmmc2_supply,
 574 };
 575
 576 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
 577 static struct regulator_init_data sdp3430_vsim = {
 578         .constraints = {
 579                 .min_uV                 = 1800000,
 580                 .max_uV                 = 3000000,
 581                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 582                                         | REGULATOR_MODE_STANDBY,
 583                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
 584                                         | REGULATOR_CHANGE_MODE
 585                                         | REGULATOR_CHANGE_STATUS,
 586         },
 587         .num_consumer_supplies  = 1,
 588         .consumer_supplies      = &sdp3430_vsim_supply,
 589 };
 590
 591 /* VDAC for DSS driving S-Video */
 592 static struct regulator_init_data sdp3430_vdac = {
 593         .constraints = {
 594                 .min_uV                 = 1800000,
 595                 .max_uV                 = 1800000,
 596                 .apply_uV               = true,
 597                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 598                                         | REGULATOR_MODE_STANDBY,
 599                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 600                                         | REGULATOR_CHANGE_STATUS,
 601         },
 602         .num_consumer_supplies  = 1,
 603         .consumer_supplies      = &sdp3430_vdac_supply,
 604 };
 605
 606 /* VPLL2 for digital video outputs */
 607 static struct regulator_init_data sdp3430_vpll2 = {
 608         .constraints = {
 609                 .name                   = "VDVI",
 610                 .min_uV                 = 1800000,
 611                 .max_uV                 = 1800000,
 612                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 613                                         | REGULATOR_MODE_STANDBY,
 614                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 615                                         | REGULATOR_CHANGE_STATUS,
 616         },
 617         .num_consumer_supplies  = 1,
 618         .consumer_supplies      = &sdp3430_vdvi_supply,
 619 };
 620
 621 static struct twl4030_platform_data sdp3430_twldata = {
 622         .irq_base       = TWL4030_IRQ_BASE,
 623         .irq_end        = TWL4030_IRQ_END,
 624
 625         /* platform_data for children goes here */
 626         .bci            = &sdp3430_bci_data,
 627         .gpio           = &sdp3430_gpio_data,
 628         .madc           = &sdp3430_madc_data,
 629         .keypad         = &sdp3430_kp_data,
 630         .power          = &sdp3430_t2scripts_data,
 631         .usb            = &sdp3430_usb_data,
 632
 633         .vaux1          = &sdp3430_vaux1,
 634         .vaux2          = &sdp3430_vaux2,
 635         .vaux3          = &sdp3430_vaux3,
 636         .vaux4          = &sdp3430_vaux4,
 637         .vmmc1          = &sdp3430_vmmc1,
 638         .vmmc2          = &sdp3430_vmmc2,
 639         .vsim           = &sdp3430_vsim,
 640         .vdac           = &sdp3430_vdac,
 641         .vpll2          = &sdp3430_vpll2,
 642 };
 643
 644 static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
 645         {
 646                 I2C_BOARD_INFO("twl4030", 0x48),
 647                 .flags = I2C_CLIENT_WAKE,
 648                 .irq = INT_34XX_SYS_NIRQ,
 649                 .platform_data = &sdp3430_twldata,
 650         },
 651 };
 652
 653 static int __init omap3430_i2c_init(void)
 654 {
 655         /* i2c1 for PMIC only */
 656         omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
 657                         ARRAY_SIZE(sdp3430_i2c_boardinfo));
 658         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
 659         omap_register_i2c_bus(2, 400, NULL, 0);
 660         /* i2c3 on display connector (for DVI, tfp410) */
 661         omap_register_i2c_bus(3, 400, NULL, 0);
 662         return 0;
 663 }
 664
 665 static void __init omap_3430sdp_init(void)
 666 {
 667         omap3430_i2c_init();
 668         platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
 669         omap_board_config = sdp3430_config;
 670         omap_board_config_size = ARRAY_SIZE(sdp3430_config);
 671         if (omap_rev() > OMAP3430_REV_ES1_0)
 672                 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
 673         else
 674                 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
 675         sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
 676         spi_register_board_info(sdp3430_spi_board_info,
 677                                 ARRAY_SIZE(sdp3430_spi_board_info));
 678         ads7846_dev_init();
 679         sdp3430_flash_init();
 680         msecure_init();
 681         omap_serial_init();
 682         usb_musb_init();
 683         usb_ehci_init();
 684 }
 685
 686 static void __init omap_3430sdp_map_io(void)
 687 {
 688         omap2_set_globals_343x();
 689         omap2_map_common_io();
 690 }
 691
 692 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
 693         /* Maintainer: Syed Khasim - Texas Instruments Inc */
 694         .phys_io        = 0x48000000,
 695         .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
 696         .boot_params    = 0x80000100,
 697         .map_io         = omap_3430sdp_map_io,
 698         .init_irq       = omap_3430sdp_init_irq,
 699         .init_machine   = omap_3430sdp_init,
 700         .timer          = &omap_timer,
 701 MACHINE_END