arch/arm/mach-omap2/board-3430sdp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/board-3430sdp.c
   3  *
   4  * Copyright (C) 2007 Texas Instruments
   5  *
   6  * Modified from mach-omap2/board-generic.c
   7  *
   8  * Initial code: Syed Mohammed Khasim
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/delay.h>
  19 #include <linux/input.h>
  20 #include <linux/workqueue.h>
  21 #include <linux/err.h>
  22 #include <linux/clk.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/ads7846.h>
  25 #include <linux/i2c/twl4030.h>
  26 #include <linux/regulator/machine.h>
  27
  28 #include <mach/hardware.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/map.h>
  32
  33 #include <mach/mcspi.h>
  34 #include <mach/gpio.h>
  35 #include <mach/mux.h>
  36 #include <mach/board.h>
  37 #include <mach/usb-musb.h>
  38 #include <mach/usb-ehci.h>
  39 #include <mach/common.h>
  40 #include <mach/dma.h>
  41 #include <mach/gpmc.h>
  42
  43 #include <asm/io.h>
  44 #include <asm/delay.h>
  45 #include <mach/control.h>
  46
  47 #include "sdram-qimonda-hyb18m512160af-6.h"
  48 #include "mmc-twl4030.h"
  49
  50 #define CONFIG_DISABLE_HFCLK 1
  51
  52 #define SDP3430_SMC91X_CS       3
  53
  54 #define ENABLE_VAUX3_DEDICATED  0x03
  55 #define ENABLE_VAUX3_DEV_GRP    0x20
  56
  57
  58 #define TWL4030_MSECURE_GPIO 22
  59
  60 static struct resource sdp3430_smc91x_resources[] = {
  61         [0] = {
  62                 .flags  = IORESOURCE_MEM,
  63         },
  64         [1] = {
  65                 .start  = 0,
  66                 .end    = 0,
  67                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  68         },
  69 };
  70
  71 static struct platform_device sdp3430_smc91x_device = {
  72         .name           = "smc91x",
  73         .id             = -1,
  74         .num_resources  = ARRAY_SIZE(sdp3430_smc91x_resources),
  75         .resource       = sdp3430_smc91x_resources,
  76 };
  77
  78 static int sdp3430_keymap[] = {
  79         KEY(0, 0, KEY_LEFT),
  80         KEY(0, 1, KEY_RIGHT),
  81         KEY(0, 2, KEY_A),
  82         KEY(0, 3, KEY_B),
  83         KEY(0, 4, KEY_C),
  84         KEY(1, 0, KEY_DOWN),
  85         KEY(1, 1, KEY_UP),
  86         KEY(1, 2, KEY_E),
  87         KEY(1, 3, KEY_F),
  88         KEY(1, 4, KEY_G),
  89         KEY(2, 0, KEY_ENTER),
  90         KEY(2, 1, KEY_I),
  91         KEY(2, 2, KEY_J),
  92         KEY(2, 3, KEY_K),
  93         KEY(2, 4, KEY_3),
  94         KEY(3, 0, KEY_M),
  95         KEY(3, 1, KEY_N),
  96         KEY(3, 2, KEY_O),
  97         KEY(3, 3, KEY_P),
  98         KEY(3, 4, KEY_Q),
  99         KEY(4, 0, KEY_R),
 100         KEY(4, 1, KEY_4),
 101         KEY(4, 2, KEY_T),
 102         KEY(4, 3, KEY_U),
 103         KEY(4, 4, KEY_D),
 104         KEY(5, 0, KEY_V),
 105         KEY(5, 1, KEY_W),
 106         KEY(5, 2, KEY_L),
 107         KEY(5, 3, KEY_S),
 108         KEY(5, 4, KEY_H),
 109         0
 110 };
 111
 112 static struct twl4030_keypad_data sdp3430_kp_data = {
 113         .rows           = 5,
 114         .cols           = 6,
 115         .keymap         = sdp3430_keymap,
 116         .keymapsize     = ARRAY_SIZE(sdp3430_keymap),
 117         .rep            = 1,
 118 };
 119
 120 static int ts_gpio;
 121
 122 static int __init msecure_init(void)
 123 {
 124         int ret = 0;
 125
 126 #ifdef CONFIG_RTC_DRV_TWL4030
 127         /* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */
 128         if (omap_type() == OMAP2_DEVICE_TYPE_GP &&
 129                         omap_rev() < OMAP3430_REV_ES2_0) {
 130                 void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() +
 131                         0xA3C;
 132                 int mux_mask = 0x04;
 133                 u16 tmp;
 134
 135                 ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure");
 136                 if (ret < 0) {
 137                         printk(KERN_ERR "msecure_init: can't"
 138                                 "reserve GPIO:%d !\n", TWL4030_MSECURE_GPIO);
 139                         goto out;
 140                 }
 141                 /*
 142                  * TWL4030 will be in secure mode if msecure line from OMAP
 143                  * is low. Make msecure line high in order to change the
 144                  * TWL4030 RTC time and calender registers.
 145                  */
 146                 tmp = __raw_readw(msecure_pad_config_reg);
 147                 tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */
 148                 tmp |= mux_mask;/* To enable mux mode 03/04 = GPIO_RTC */
 149                 __raw_writew(tmp, msecure_pad_config_reg);
 150
 151                 gpio_direction_output(TWL4030_MSECURE_GPIO, 1);
 152         }
 153 out:
 154 #endif
 155         return ret;
 156 }
 157
 158 /**
 159  * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
 160  *
 161  * @return - void. If request gpio fails then Flag KERN_ERR.
 162  */
 163 static void ads7846_dev_init(void)
 164 {
 165         if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
 166                 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
 167                 return;
 168         }
 169
 170         gpio_direction_input(ts_gpio);
 171
 172         omap_set_gpio_debounce(ts_gpio, 1);
 173         omap_set_gpio_debounce_time(ts_gpio, 0xa);
 174 }
 175
 176 static int ads7846_get_pendown_state(void)
 177 {
 178         return !gpio_get_value(ts_gpio);
 179 }
 180
 181 /*
 182  * This enable(1)/disable(0) the voltage for TS: uses twl4030 calls
 183  */
 184 static int ads7846_vaux_control(int vaux_cntrl)
 185 {
 186         int ret = 0;
 187
 188 #ifdef CONFIG_TWL4030_CORE
 189         /* check for return value of ldo_use: if success it returns 0 */
 190         if (vaux_cntrl == VAUX_ENABLE) {
 191                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 192                         ENABLE_VAUX3_DEDICATED, TWL4030_VAUX3_DEDICATED))
 193                         return -EIO;
 194                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 195                         ENABLE_VAUX3_DEV_GRP, TWL4030_VAUX3_DEV_GRP))
 196                         return -EIO;
 197         } else if (vaux_cntrl == VAUX_DISABLE) {
 198                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 199                         0x00, TWL4030_VAUX3_DEDICATED))
 200                         return -EIO;
 201                 if (ret != twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
 202                         0x00, TWL4030_VAUX3_DEV_GRP))
 203                         return -EIO;
 204         }
 205 #else
 206         ret = -EIO;
 207 #endif
 208         return ret;
 209 }
 210
 211 static struct ads7846_platform_data tsc2046_config __initdata = {
 212         .get_pendown_state      = ads7846_get_pendown_state,
 213         .keep_vref_on           = 1,
 214         .vaux_control           = ads7846_vaux_control,
 215 };
 216
 217
 218 static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
 219         .turbo_mode     = 0,
 220         .single_channel = 1,  /* 0: slave, 1: master */
 221 };
 222
 223 static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
 224         [0] = {
 225                 /*
 226                  * TSC2046 operates at a max freqency of 2MHz, so
 227                  * operate slightly below at 1.5MHz
 228                  */
 229                 .modalias               = "ads7846",
 230                 .bus_num                = 1,
 231                 .chip_select            = 0,
 232                 .max_speed_hz           = 1500000,
 233                 .controller_data        = &tsc2046_mcspi_config,
 234                 .irq                    = 0,
 235                 .platform_data          = &tsc2046_config,
 236         },
 237 };
 238
 239 static struct platform_device sdp3430_lcd_device = {
 240         .name           = "sdp2430_lcd",
 241         .id             = -1,
 242 };
 243
 244 static struct platform_device *sdp3430_devices[] __initdata = {
 245         &sdp3430_smc91x_device,
 246         &sdp3430_lcd_device,
 247 };
 248
 249 static inline void __init sdp3430_init_smc91x(void)
 250 {
 251         int eth_cs;
 252         unsigned long cs_mem_base;
 253         int eth_gpio = 0;
 254
 255         eth_cs = SDP3430_SMC91X_CS;
 256
 257         if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
 258                 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
 259                 return;
 260         }
 261
 262         sdp3430_smc91x_resources[0].start = cs_mem_base + 0x300;
 263         sdp3430_smc91x_resources[0].end   = cs_mem_base + 0x30f;
 264         udelay(100);
 265
 266         if (omap_rev() > OMAP3430_REV_ES1_0)
 267                 eth_gpio = OMAP34XX_ETHR_GPIO_IRQ_SDPV2;
 268         else
 269                 eth_gpio = OMAP34XX_ETHR_GPIO_IRQ_SDPV1;
 270
 271         sdp3430_smc91x_resources[1].start = gpio_to_irq(eth_gpio);
 272
 273         if (gpio_request(eth_gpio, "SMC91x irq") < 0) {
 274                 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
 275                         eth_gpio);
 276                 return;
 277         }
 278         gpio_direction_input(eth_gpio);
 279 }
 280
 281 static void __init omap_3430sdp_init_irq(void)
 282 {
 283         omap2_init_common_hw(hyb18m512160af6_sdrc_params);
 284         omap_init_irq();
 285         omap_gpio_init();
 286         sdp3430_init_smc91x();
 287 }
 288
 289 static struct omap_uart_config sdp3430_uart_config __initdata = {
 290         .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
 291 };
 292
 293 static struct omap_lcd_config sdp3430_lcd_config __initdata = {
 294         .ctrl_name      = "internal",
 295 };
 296
 297 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
 298         { OMAP_TAG_UART,        &sdp3430_uart_config },
 299         { OMAP_TAG_LCD,         &sdp3430_lcd_config },
 300 };
 301
 302 static int sdp3430_batt_table[] = {
 303 /* 0 C*/
 304 30800, 29500, 28300, 27100,
 305 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
 306 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
 307 11600, 11200, 10800, 10400, 10000, 9630,   9280,   8950,   8620,   8310,
 308 8020,   7730,   7460,   7200,   6950,   6710,   6470,   6250,   6040,   5830,
 309 5640,   5450,   5260,   5090,   4920,   4760,   4600,   4450,   4310,   4170,
 310 4040,   3910,   3790,   3670,   3550
 311 };
 312
 313 static struct twl4030_bci_platform_data sdp3430_bci_data = {
 314       .battery_tmp_tbl  = sdp3430_batt_table,
 315       .tblsize          = ARRAY_SIZE(sdp3430_batt_table),
 316 };
 317
 318 static struct twl4030_hsmmc_info mmc[] = {
 319         {
 320                 .mmc            = 1,
 321                 /* 8 bits (default) requires S6.3 == ON,
 322                  * so the SIM card isn't used; else 4 bits.
 323                  */
 324                 .wires          = 8,
 325                 .gpio_wp        = 4,
 326         },
 327         {
 328                 .mmc            = 2,
 329                 .wires          = 8,
 330                 .gpio_wp        = 7,
 331         },
 332         {}      /* Terminator */
 333 };
 334
 335 static int sdp3430_twl_gpio_setup(struct device *dev,
 336                 unsigned gpio, unsigned ngpio)
 337 {
 338         /* gpio + 0 is "mmc0_cd" (input/IRQ),
 339          * gpio + 1 is "mmc1_cd" (input/IRQ)
 340          */
 341         mmc[0].gpio_cd = gpio + 0;
 342         mmc[1].gpio_cd = gpio + 1;
 343         twl4030_mmc_init(mmc);
 344
 345         /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
 346         gpio_request(gpio + 7, "sub_lcd_en_bkl");
 347         gpio_direction_output(gpio + 7, 0);
 348
 349         /* gpio + 15 is "sub_lcd_nRST" (output) */
 350         gpio_request(gpio + 15, "sub_lcd_nRST");
 351         gpio_direction_output(gpio + 15, 0);
 352
 353         return 0;
 354 }
 355
 356 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
 357         .gpio_base      = OMAP_MAX_GPIO_LINES,
 358         .irq_base       = TWL4030_GPIO_IRQ_BASE,
 359         .irq_end        = TWL4030_GPIO_IRQ_END,
 360         .pulldowns      = BIT(2) | BIT(6) | BIT(8) | BIT(13)
 361                                 | BIT(16) | BIT(17),
 362         .setup          = sdp3430_twl_gpio_setup,
 363 };
 364
 365 static struct twl4030_usb_data sdp3430_usb_data = {
 366         .usb_mode       = T2_USB_MODE_ULPI,
 367 };
 368
 369 static struct twl4030_madc_platform_data sdp3430_madc_data = {
 370         .irq_line       = 1,
 371 };
 372
 373
 374 static struct twl4030_ins __initdata sleep_on_seq[] = {
 375 /*
 376  * Turn off VDD1 and VDD2.
 377  */
 378         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
 379         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
 380 #ifdef CONFIG_DISABLE_HFCLK
 381 /*
 382  * And also turn off the OMAP3 PLLs and the sysclk output.
 383  */
 384         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
 385         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
 386 #endif
 387 };
 388
 389 static struct twl4030_script sleep_on_script __initdata = {
 390         .script = sleep_on_seq,
 391         .size   = ARRAY_SIZE(sleep_on_seq),
 392         .flags  = TRITON_SLEEP_SCRIPT,
 393 };
 394
 395 static struct twl4030_ins wakeup_seq[] __initdata = {
 396 #ifndef CONFIG_DISABLE_HFCLK
 397 /*
 398  * Wakeup VDD1 and VDD2.
 399  */
 400         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
 401         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
 402 #else
 403 /*
 404  * Reenable the OMAP3 PLLs.
 405  * Wakeup VDD1 and VDD2.
 406  * Reenable sysclk output.
 407  */
 408         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
 409         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
 410         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
 411         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
 412 #endif /* #ifndef CONFIG_DISABLE_HFCLK */
 413 };
 414
 415 static struct twl4030_script wakeup_script __initdata = {
 416         .script = wakeup_seq,
 417         .size   = ARRAY_SIZE(wakeup_seq),
 418         .flags  = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
 419 };
 420
 421 static struct twl4030_ins wrst_seq[] __initdata = {
 422 /*
 423  * Reset twl4030.
 424  * Reset VDD1 regulator.
 425  * Reset VDD2 regulator.
 426  * Reset VPLL1 regulator.
 427  * Enable sysclk output.
 428  * Reenable twl4030.
 429  */
 430         {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
 431         {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
 432         {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
 433         {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
 434         {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
 435         {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
 436 };
 437 static struct twl4030_script wrst_script __initdata = {
 438         .script = wrst_seq,
 439         .size   = ARRAY_SIZE(wakeup_seq),
 440         .flags  = TRITON_WRST_SCRIPT,
 441 };
 442
 443 static struct twl4030_script *twl4030_scripts[] __initdata = {
 444         &sleep_on_script,
 445         &wakeup_script,
 446         &wrst_script,
 447 };
 448
 449 static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
 450         .scripts        = twl4030_scripts,
 451         .size           = ARRAY_SIZE(twl4030_scripts),
 452 };
 453
 454 /*
 455  * Apply all the fixed voltages since most versions of U-Boot
 456  * don't bother with that initialization.
 457  */
 458
 459 /* VAUX1 for mainboard (irda and sub-lcd) */
 460 static struct regulator_init_data sdp3430_vaux1 = {
 461         .constraints = {
 462                 .min_uV                 = 2800000,
 463                 .max_uV                 = 2800000,
 464                 .apply_uV               = true,
 465                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 466                                         | REGULATOR_MODE_STANDBY,
 467                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 468                                         | REGULATOR_CHANGE_STATUS,
 469         },
 470 };
 471
 472 /* VAUX2 for camera module */
 473 static struct regulator_init_data sdp3430_vaux2 = {
 474         .constraints = {
 475                 .min_uV                 = 2800000,
 476                 .max_uV                 = 2800000,
 477                 .apply_uV               = true,
 478                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 479                                         | REGULATOR_MODE_STANDBY,
 480                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 481                                         | REGULATOR_CHANGE_STATUS,
 482         },
 483 };
 484
 485 /* VAUX3 for LCD board */
 486 static struct regulator_init_data sdp3430_vaux3 = {
 487         .constraints = {
 488                 .min_uV                 = 2800000,
 489                 .max_uV                 = 2800000,
 490                 .apply_uV               = true,
 491                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 492                                         | REGULATOR_MODE_STANDBY,
 493                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 494                                         | REGULATOR_CHANGE_STATUS,
 495         },
 496 };
 497
 498 /* VAUX4 for OMAP VDD_CSI2 (camera) */
 499 static struct regulator_init_data sdp3430_vaux4 = {
 500         .constraints = {
 501                 .min_uV                 = 1800000,
 502                 .max_uV                 = 1800000,
 503                 .apply_uV               = true,
 504                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 505                                         | REGULATOR_MODE_STANDBY,
 506                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 507                                         | REGULATOR_CHANGE_STATUS,
 508         },
 509 };
 510
 511 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
 512 static struct regulator_init_data sdp3430_vmmc1 = {
 513         .constraints = {
 514                 .valid_modes_mask = REGULATOR_MODE_NORMAL
 515                                 | REGULATOR_MODE_STANDBY,
 516                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
 517                                 | REGULATOR_CHANGE_MODE
 518                                 | REGULATOR_CHANGE_STATUS,
 519         },
 520 };
 521
 522 /* VMMC2 for MMC2 card */
 523 static struct regulator_init_data sdp3430_vmmc2 = {
 524         .constraints = {
 525                 .min_uV                 = 1850000,
 526                 .max_uV                 = 1850000,
 527                 .apply_uV               = true,
 528                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 529                                         | REGULATOR_MODE_STANDBY,
 530                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 531                                         | REGULATOR_CHANGE_STATUS,
 532         },
 533 };
 534
 535 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
 536 static struct regulator_init_data sdp3430_vsim = {
 537         .constraints = {
 538                 .valid_modes_mask = REGULATOR_MODE_NORMAL
 539                                 | REGULATOR_MODE_STANDBY,
 540                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
 541                                 | REGULATOR_CHANGE_MODE
 542                                 | REGULATOR_CHANGE_STATUS,
 543         },
 544 };
 545
 546 /* VDAC for DSS driving S-Video */
 547 static struct regulator_init_data sdp3430_vdac = {
 548         .constraints = {
 549                 .min_uV                 = 1800000,
 550                 .max_uV                 = 1800000,
 551                 .apply_uV               = true,
 552                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 553                                         | REGULATOR_MODE_STANDBY,
 554                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 555                                         | REGULATOR_CHANGE_STATUS,
 556         },
 557 };
 558
 559 static struct twl4030_platform_data sdp3430_twldata = {
 560         .irq_base       = TWL4030_IRQ_BASE,
 561         .irq_end        = TWL4030_IRQ_END,
 562
 563         /* platform_data for children goes here */
 564         .bci            = &sdp3430_bci_data,
 565         .gpio           = &sdp3430_gpio_data,
 566         .madc           = &sdp3430_madc_data,
 567         .keypad         = &sdp3430_kp_data,
 568         .power          = &sdp3430_t2scripts_data,
 569         .usb            = &sdp3430_usb_data,
 570
 571         .vaux1          = &sdp3430_vaux1,
 572         .vaux2          = &sdp3430_vaux2,
 573         .vaux3          = &sdp3430_vaux3,
 574         .vaux4          = &sdp3430_vaux4,
 575         .vmmc1          = &sdp3430_vmmc1,
 576         .vmmc2          = &sdp3430_vmmc2,
 577         .vsim           = &sdp3430_vsim,
 578         .vdac           = &sdp3430_vdac,
 579 };
 580
 581 static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
 582         {
 583                 I2C_BOARD_INFO("twl4030", 0x48),
 584                 .flags = I2C_CLIENT_WAKE,
 585                 .irq = INT_34XX_SYS_NIRQ,
 586                 .platform_data = &sdp3430_twldata,
 587         },
 588 };
 589
 590 static int __init omap3430_i2c_init(void)
 591 {
 592         /* i2c1 for PMIC only */
 593         omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
 594                         ARRAY_SIZE(sdp3430_i2c_boardinfo));
 595         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
 596         omap_register_i2c_bus(2, 400, NULL, 0);
 597         /* i2c3 on display connector (for DVI, tfp410) */
 598         omap_register_i2c_bus(3, 400, NULL, 0);
 599         return 0;
 600 }
 601
 602 extern void __init sdp3430_flash_init(void);
 603
 604 static void __init omap_3430sdp_init(void)
 605 {
 606         omap3430_i2c_init();
 607         platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
 608         omap_board_config = sdp3430_config;
 609         omap_board_config_size = ARRAY_SIZE(sdp3430_config);
 610         if (omap_rev() > OMAP3430_REV_ES1_0)
 611                 ts_gpio = OMAP34XX_TS_GPIO_IRQ_SDPV2;
 612         else
 613                 ts_gpio = OMAP34XX_TS_GPIO_IRQ_SDPV1;
 614         sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
 615         spi_register_board_info(sdp3430_spi_board_info,
 616                                 ARRAY_SIZE(sdp3430_spi_board_info));
 617         ads7846_dev_init();
 618         sdp3430_flash_init();
 619         msecure_init();
 620         omap_serial_init();
 621         usb_musb_init();
 622         usb_ehci_init();
 623 }
 624
 625 static void __init omap_3430sdp_map_io(void)
 626 {
 627         omap2_set_globals_343x();
 628         omap2_map_common_io();
 629 }
 630
 631 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
 632         /* Maintainer: Syed Khasim - Texas Instruments Inc */
 633         .phys_io        = 0x48000000,
 634         .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
 635         .boot_params    = 0x80000100,
 636         .map_io         = omap_3430sdp_map_io,
 637         .init_irq       = omap_3430sdp_init_irq,
 638         .init_machine   = omap_3430sdp_init,
 639         .timer          = &omap_timer,
 640 MACHINE_END