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1 /*
2  * linux/arch/arm/mach-omap2/board-3430sdp-usb.c
3  *
4  * This file will contain the board specific details for the
5  * MENTOR USB OTG and Synopsys EHCI host controllers on OMAP3430
6  *
7  * Copyright (C) 2007 Texas Instruments
8  * Author: Vikram Pandita
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14
15 #include <linux/types.h>
16 #include <linux/errno.h>
17 #include <linux/delay.h>
18 #include <linux/platform_device.h>
19 #include <linux/clk.h>
20 #include <asm/io.h>
21 #include <asm/arch/mux.h>
22 #include <linux/usb/musb.h>
23
24 #include <asm/arch/hardware.h>
25 #include <asm/arch/pm.h>
26 #include <asm/arch/usb.h>
27
28 #ifdef CONFIG_USB_MUSB_SOC
29 static struct resource musb_resources[] = {
30         [0] = {
31                 .start  = OMAP34XX_HSUSB_OTG_BASE,
32                 .end    = OMAP34XX_HSUSB_OTG_BASE + SZ_8K - 1,
33                 .flags  = IORESOURCE_MEM,
34         },
35         [1] = { /* general IRQ */
36                 .start  = INT_243X_HS_USB_MC,
37                 .flags  = IORESOURCE_IRQ,
38         },
39         [2] = { /* DMA IRQ */
40                 .start  = INT_243X_HS_USB_DMA,
41                 .flags  = IORESOURCE_IRQ,
42         },
43 };
44
45 static int hsotgusb_ick_on;
46
47 static int musb_set_clock(struct clk *clk, int state)
48 {
49         if (state) {
50                 if (hsotgusb_ick_on > 0)
51                         return -ENODEV;
52
53                 omap2_block_sleep();
54                 clk_enable(clk);
55                 hsotgusb_ick_on = 1;
56         } else {
57                 if (hsotgusb_ick_on == 0)
58                         return -ENODEV;
59
60                 clk_disable(clk);
61                 hsotgusb_ick_on = 0;
62                 omap2_allow_sleep();
63         }
64
65         return 0;
66 }
67
68 static struct musb_hdrc_platform_data musb_plat = {
69 #ifdef CONFIG_USB_MUSB_OTG
70         .mode           = MUSB_OTG,
71 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
72         .mode           = MUSB_HOST,
73 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
74         .mode           = MUSB_PERIPHERAL,
75 #endif
76         .multipoint     = 1,
77         .clock          = "hsotgusb_ick",
78         .set_clock      = musb_set_clock,
79 };
80
81 static u64 musb_dmamask = ~(u32)0;
82
83 static struct platform_device musb_device = {
84         .name           = "musb_hdrc",
85         .id             = 0,
86         .dev = {
87                 .dma_mask               = &musb_dmamask,
88                 .coherent_dma_mask      = 0xffffffff,
89                 .platform_data          = &musb_plat,
90         },
91         .num_resources  = ARRAY_SIZE(musb_resources),
92         .resource       = musb_resources,
93 };
94 #endif
95
96
97 /* EHCI platform specific data */
98
99 #if     defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
100 static struct resource ehci_resources[] = {
101         [0] = {
102                 .start   = OMAP34XX_HSUSB_HOST_BASE + 0x800,
103                 .end     = OMAP34XX_HSUSB_HOST_BASE + 0x800 + SZ_1K - 1,
104                 .flags   = IORESOURCE_MEM,
105         },
106         [1] = {         /* general IRQ */
107                 .start   = INT_34XX_EHCI_IRQ,
108                 .flags   = IORESOURCE_IRQ,
109         }
110 };
111
112 static u64 ehci_dmamask = ~(u32)0;
113 static struct platform_device ehci_device = {
114         .name           = "ehci-omap",
115         .id             = 0,
116         .dev = {
117                 .dma_mask               = &ehci_dmamask,
118                 .coherent_dma_mask      = 0xffffffff,
119                 .platform_data          = 0x0,
120         },
121         .num_resources  = ARRAY_SIZE(ehci_resources),
122         .resource       = ehci_resources,
123 };
124
125
126 /* MUX settings for EHCI pins */
127 /*
128  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
129  */
130 static void setup_ehci_io_mux(void)
131 {
132 #ifdef CONFIG_OMAP_EHCI_PHY_MODE
133         /* PHY mode of operation for board: 750-2083-001
134          * ISP1504 connected to Port1 and Port2
135          * Do Func Mux setting for 12-pin ULPI PHY mode
136          */
137
138         /* Port1 */
139         omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
140         omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
141         omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
142         omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
143         omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
144         omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
145         omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
146         omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
147         omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
148         omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
149         omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
150         omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
151
152         /* Port2 */
153         omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
154         omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
155         omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
156         omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
157         omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
158         omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
159         omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
160         omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
161         omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
162         omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
163         omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
164         omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
165
166 #else
167         /* Set Func mux for :
168          * TLL mode of operation
169          * 12-pin ULPI SDR TLL mode for Port1/2/3
170          */
171
172         /* Port1 */
173         omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
174         omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
175         omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
176         omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
177         omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
178         omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
179         omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
180         omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
181         omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
182         omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
183         omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
184         omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
185
186         /* Port2 */
187         omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
188         omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
189         omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
190         omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
191         omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
192         omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
193         omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
194         omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
195         omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
196         omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
197         omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
198         omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
199
200         /* Port3 */
201         omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
202         omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
203         omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
204         omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
205         omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
206         omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
207         omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
208         omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
209         omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
210         omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
211         omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
212         omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
213 #endif /* CONFIG_OMAP_EHCI_PHY_MODE */
214
215         return;
216 }
217
218 #endif /* EHCI specific data */
219
220 void __init sdp3430_usb_init(void)
221 {
222 #ifdef CONFIG_USB_MUSB_SOC
223         if (platform_device_register(&musb_device) < 0) {
224                 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
225                 return;
226         }
227 #endif
228
229 #if     defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
230
231         /* Setup Pin IO MUX for EHCI */
232         setup_ehci_io_mux();
233
234         if (platform_device_register(&ehci_device) < 0) {
235                 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
236                 return;
237         }
238 #endif
239
240 }
241