arch/arm/mach-omap1/time.c

   1 /*
   2  * linux/arch/arm/mach-omap1/time.c
   3  *
   4  * OMAP Timers
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  * Partial timer rewrite and additional dynamic tick timer support by
   8  * Tony Lindgen <tony@atomide.com> and
   9  * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  10  *
  11  * MPU timer code based on the older MPU timer code for OMAP
  12  * Copyright (C) 2000 RidgeRun, Inc.
  13  * Author: Greg Lonnon <glonnon@ridgerun.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by the
  17  * Free Software Foundation; either version 2 of the License, or (at your
  18  * option) any later version.
  19  *
  20  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  21  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  22  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  23  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  26  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * You should have received a copy of the  GNU General Public License along
  32  * with this program; if not, write  to the Free Software Foundation, Inc.,
  33  * 675 Mass Ave, Cambridge, MA 02139, USA.
  34  */
  35
  36 #include <linux/kernel.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/sched.h>
  41 #include <linux/spinlock.h>
  42 #include <linux/clk.h>
  43 #include <linux/err.h>
  44 #include <linux/clocksource.h>
  45
  46 #include <asm/system.h>
  47 #include <asm/hardware.h>
  48 #include <asm/io.h>
  49 #include <asm/leds.h>
  50 #include <asm/irq.h>
  51 #include <asm/mach/irq.h>
  52 #include <asm/mach/time.h>
  53
  54
  55 #define OMAP_MPU_TIMER_BASE             OMAP_MPU_TIMER1_BASE
  56 #define OMAP_MPU_TIMER_OFFSET           0x100
  57
  58 /* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
  59  * converted to use kHz by Kevin Hilman */
  60 /* convert from cycles(64bits) => nanoseconds (64bits)
  61  *  basic equation:
  62  *              ns = cycles / (freq / ns_per_sec)
  63  *              ns = cycles * (ns_per_sec / freq)
  64  *              ns = cycles * (10^9 / (cpu_khz * 10^3))
  65  *              ns = cycles * (10^6 / cpu_khz)
  66  *
  67  *      Then we use scaling math (suggested by george at mvista.com) to get:
  68  *              ns = cycles * (10^6 * SC / cpu_khz / SC
  69  *              ns = cycles * cyc2ns_scale / SC
  70  *
  71  *      And since SC is a constant power of two, we can convert the div
  72  *  into a shift.
  73  *                      -johnstul at us.ibm.com "math is hard, lets go shopping!"
  74  */
  75 static unsigned long cyc2ns_scale;
  76 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
  77
  78 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  79 {
  80         cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
  81 }
  82
  83 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  84 {
  85         return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
  86 }
  87
  88
  89 typedef struct {
  90         u32 cntl;                       /* CNTL_TIMER, R/W */
  91         u32 load_tim;                   /* LOAD_TIM,   W */
  92         u32 read_tim;                   /* READ_TIM,   R */
  93 } omap_mpu_timer_regs_t;
  94
  95 #define omap_mpu_timer_base(n)                                          \
  96 ((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +      \
  97                                  (n)*OMAP_MPU_TIMER_OFFSET))
  98
  99 static inline unsigned long omap_mpu_timer_read(int nr)
 100 {
 101         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 102         return timer->read_tim;
 103 }
 104
 105 static inline void omap_mpu_timer_start(int nr, unsigned long load_val)
 106 {
 107         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 108
 109         timer->cntl = MPU_TIMER_CLOCK_ENABLE;
 110         udelay(1);
 111         timer->load_tim = load_val;
 112         udelay(1);
 113         timer->cntl = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_AR | MPU_TIMER_ST);
 114 }
 115
 116 /*
 117  * ---------------------------------------------------------------------------
 118  * MPU timer 1 ... count down to zero, interrupt, reload
 119  * ---------------------------------------------------------------------------
 120  */
 121 static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
 122 {
 123         write_seqlock(&xtime_lock);
 124         /* NOTE:  no lost-tick detection/handling! */
 125         timer_tick();
 126         write_sequnlock(&xtime_lock);
 127
 128         return IRQ_HANDLED;
 129 }
 130
 131 static struct irqaction omap_mpu_timer1_irq = {
 132         .name           = "mpu_timer1",
 133         .flags          = IRQF_DISABLED | IRQF_TIMER,
 134         .handler        = omap_mpu_timer1_interrupt,
 135 };
 136
 137 static __init void omap_init_mpu_timer(unsigned long rate)
 138 {
 139         set_cyc2ns_scale(rate / 1000);
 140
 141         setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
 142         omap_mpu_timer_start(0, (rate / HZ) - 1);
 143 }
 144
 145 /*
 146  * ---------------------------------------------------------------------------
 147  * MPU timer 2 ... free running 32-bit clock source and scheduler clock
 148  * ---------------------------------------------------------------------------
 149  */
 150
 151 static unsigned long omap_mpu_timer2_overflows;
 152
 153 static irqreturn_t omap_mpu_timer2_interrupt(int irq, void *dev_id)
 154 {
 155         omap_mpu_timer2_overflows++;
 156         return IRQ_HANDLED;
 157 }
 158
 159 static struct irqaction omap_mpu_timer2_irq = {
 160         .name           = "mpu_timer2",
 161         .flags          = IRQF_DISABLED,
 162         .handler        = omap_mpu_timer2_interrupt,
 163 };
 164
 165 static cycle_t mpu_read(void)
 166 {
 167         return ~omap_mpu_timer_read(1);
 168 }
 169
 170 static struct clocksource clocksource_mpu = {
 171         .name           = "mpu_timer2",
 172         .rating         = 300,
 173         .read           = mpu_read,
 174         .mask           = CLOCKSOURCE_MASK(32),
 175         .shift          = 24,
 176         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 177 };
 178
 179 static void __init omap_init_clocksource(unsigned long rate)
 180 {
 181         static char err[] __initdata = KERN_ERR
 182                         "%s: can't register clocksource!\n";
 183
 184         clocksource_mpu.mult
 185                 = clocksource_khz2mult(rate/1000, clocksource_mpu.shift);
 186
 187         setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 188         omap_mpu_timer_start(1, ~0);
 189
 190         if (clocksource_register(&clocksource_mpu))
 191                 printk(err, clocksource_mpu.name);
 192 }
 193
 194
 195 /*
 196  * Scheduler clock - returns current time in nanosec units.
 197  */
 198 unsigned long long sched_clock(void)
 199 {
 200         unsigned long ticks = 0 - omap_mpu_timer_read(1);
 201         unsigned long long ticks64;
 202
 203         ticks64 = omap_mpu_timer2_overflows;
 204         ticks64 <<= 32;
 205         ticks64 |= ticks;
 206
 207         return cycles_2_ns(ticks64);
 208 }
 209
 210 /*
 211  * ---------------------------------------------------------------------------
 212  * Timer initialization
 213  * ---------------------------------------------------------------------------
 214  */
 215 static void __init omap_timer_init(void)
 216 {
 217         struct clk      *ck_ref = clk_get(NULL, "ck_ref");
 218         unsigned long   rate;
 219
 220         BUG_ON(IS_ERR(ck_ref));
 221
 222         rate = clk_get_rate(ck_ref);
 223         clk_put(ck_ref);
 224
 225         /* PTV = 0 */
 226         rate /= 2;
 227
 228         omap_init_mpu_timer(rate);
 229         omap_init_clocksource(rate);
 230 }
 231
 232 struct sys_timer omap_timer = {
 233         .init           = omap_timer_init,
 234 };