2 * linux/arch/arm/mach-omap1/board-h3.c
4 * This file contains OMAP1710 H3 specific code.
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/i2c.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/nand.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/input.h>
29 #include <linux/clk.h>
31 #include <linux/i2c/tps65010.h>
32 #include <linux/i2c/pcf857x.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/tsc210x.h>
37 #include <asm/setup.h>
39 #include <mach/hardware.h>
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/flash.h>
45 #include <asm/mach/map.h>
47 #include <media/v4l2-int-device.h>
49 #include <mach/gpio.h>
50 #include <mach/gpio-switch.h>
51 #include <mach/irqs.h>
54 #include <mach/nand.h>
55 #include <mach/irda.h>
57 #include <mach/keypad.h>
59 #include <mach/common.h>
60 #include <mach/mcbsp.h>
61 #include <mach/omap-alsa.h>
65 static int h3_keymap[] = {
100 KEY(5, 4, KEY_SLEEP),
105 static struct mtd_partition nor_partitions[] = {
106 /* bootloader (U-Boot, etc) in first sector */
108 .name = "bootloader",
111 .mask_flags = MTD_WRITEABLE, /* force read-only */
113 /* bootloader params in the next sector */
116 .offset = MTDPART_OFS_APPEND,
123 .offset = MTDPART_OFS_APPEND,
129 .name = "filesystem",
130 .offset = MTDPART_OFS_APPEND,
131 .size = MTDPART_SIZ_FULL,
136 static struct flash_platform_data nor_data = {
137 .map_name = "cfi_probe",
139 .parts = nor_partitions,
140 .nr_parts = ARRAY_SIZE(nor_partitions),
143 static struct resource nor_resource = {
144 /* This is on CS3, wherever it's mapped */
145 .flags = IORESOURCE_MEM,
148 static struct platform_device nor_device = {
152 .platform_data = &nor_data,
155 .resource = &nor_resource,
158 static struct mtd_partition nand_partitions[] = {
160 /* REVISIT: enable these partitions if you make NAND BOOT work */
165 .mask_flags = MTD_WRITEABLE, /* force read-only */
168 .name = "bootloader",
169 .offset = MTDPART_OFS_APPEND,
171 .mask_flags = MTD_WRITEABLE, /* force read-only */
175 .offset = MTDPART_OFS_APPEND,
180 .offset = MTDPART_OFS_APPEND,
185 .name = "filesystem",
186 .size = MTDPART_SIZ_FULL,
187 .offset = MTDPART_OFS_APPEND,
191 /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
192 static struct omap_nand_platform_data nand_data = {
193 .options = NAND_SAMSUNG_LP_OPTIONS,
194 .parts = nand_partitions,
195 .nr_parts = ARRAY_SIZE(nand_partitions),
198 static struct resource nand_resource = {
199 .flags = IORESOURCE_MEM,
202 static struct platform_device nand_device = {
206 .platform_data = &nand_data,
209 .resource = &nand_resource,
212 static struct resource smc91x_resources[] = {
214 .start = OMAP1710_ETHR_START, /* Physical */
215 .end = OMAP1710_ETHR_START + 0xf,
216 .flags = IORESOURCE_MEM,
219 .start = OMAP_GPIO_IRQ(40),
220 .end = OMAP_GPIO_IRQ(40),
221 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
225 static struct platform_device smc91x_device = {
228 .num_resources = ARRAY_SIZE(smc91x_resources),
229 .resource = smc91x_resources,
232 #define GPTIMER_BASE 0xFFFB1400
233 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
234 #define GPTIMER_REGS_SIZE 0x46
236 static struct resource intlat_resources[] = {
238 .start = GPTIMER_REGS(0), /* Physical */
239 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
240 .flags = IORESOURCE_MEM,
243 .start = INT_1610_GPTIMER1,
244 .end = INT_1610_GPTIMER1,
245 .flags = IORESOURCE_IRQ,
249 static struct platform_device intlat_device = {
250 .name = "omap_intlat",
252 .num_resources = ARRAY_SIZE(intlat_resources),
253 .resource = intlat_resources,
256 static struct resource h3_kp_resources[] = {
258 .start = INT_KEYBOARD,
260 .flags = IORESOURCE_IRQ,
264 static struct omap_kp_platform_data h3_kp_data = {
268 .keymapsize = ARRAY_SIZE(h3_keymap),
274 static struct platform_device h3_kp_device = {
275 .name = "omap-keypad",
278 .platform_data = &h3_kp_data,
280 .num_resources = ARRAY_SIZE(h3_kp_resources),
281 .resource = h3_kp_resources,
285 /* Select between the IrDA and aGPS module
288 static int gpio_irda_enable;
289 static int gpio_irda_x;
290 static int gpio_irda_fir;
292 static int h3_select_irda(struct device *dev, int state)
294 gpio_set_value_cansleep(gpio_irda_enable, state & IR_SEL);
298 static void set_trans_mode(struct work_struct *work)
300 struct omap_irda_config *irda_config =
301 container_of(work, struct omap_irda_config, gpio_expa.work);
302 int mode = irda_config->mode;
304 gpio_set_value_cansleep(gpio_irda_x, 1);
305 gpio_set_value_cansleep(gpio_irda_fir, !(mode & IR_SIRMODE));
308 static int h3_transceiver_mode(struct device *dev, int mode)
310 struct omap_irda_config *irda_config = dev->platform_data;
312 irda_config->mode = mode;
313 cancel_delayed_work(&irda_config->gpio_expa);
314 PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
315 schedule_delayed_work(&irda_config->gpio_expa, 0);
320 static struct omap_irda_config h3_irda_data = {
321 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
322 .transceiver_mode = h3_transceiver_mode,
323 .select_irda = h3_select_irda,
324 .rx_channel = OMAP_DMA_UART3_RX,
325 .tx_channel = OMAP_DMA_UART3_TX,
326 .dest_start = UART3_THR,
327 .src_start = UART3_RHR,
332 static struct resource h3_irda_resources[] = {
336 .flags = IORESOURCE_IRQ,
340 static u64 irda_dmamask = 0xffffffff;
342 static struct platform_device h3_irda_device = {
346 .platform_data = &h3_irda_data,
347 .dma_mask = &irda_dmamask,
349 .num_resources = ARRAY_SIZE(h3_irda_resources),
350 .resource = h3_irda_resources,
353 static struct platform_device h3_lcd_device = {
358 static struct tsc210x_config tsc_platform_data = {
360 .monitor = TSC_VBAT | TSC_TEMP,
364 static struct spi_board_info h3_spi_board_info[] __initdata = {
366 .modalias = "tsc2101",
369 .irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
370 .max_speed_hz = 16000000,
371 .platform_data = &tsc_platform_data,
375 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
376 .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
377 .spcr1 = RINTM(3) | RRST,
378 .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
379 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
380 .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
381 .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
382 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
383 .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
385 .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
387 .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
388 /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
391 static struct omap_alsa_codec_config alsa_config = {
392 .name = "H3 TSC2101",
393 .mcbsp_regs_alsa = &mcbsp_regs,
394 .codec_configure_dev = NULL, /* tsc2101_configure, */
395 .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
396 .codec_clock_setup = NULL, /* tsc2101_clock_setup, */
397 .codec_clock_on = NULL, /* tsc2101_clock_on, */
398 .codec_clock_off = NULL, /* tsc2101_clock_off, */
399 .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
402 static struct platform_device h3_mcbsp1_device = {
403 .name = "omap_alsa_mcbsp",
406 .platform_data = &alsa_config,
410 static struct platform_device *devices[] __initdata = {
420 static struct omap_usb_config h3_usb_config __initdata = {
421 /* usb1 has a Mini-AB port and external isp1301 transceiver */
424 #ifdef CONFIG_USB_GADGET_OMAP
425 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
426 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
427 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
428 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
434 static struct omap_uart_config h3_uart_config __initdata = {
435 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
438 static struct omap_lcd_config h3_lcd_config __initdata = {
439 .ctrl_name = "internal",
442 static struct omap_board_config_kernel h3_config[] __initdata = {
443 { OMAP_TAG_USB, &h3_usb_config },
444 { OMAP_TAG_UART, &h3_uart_config },
445 { OMAP_TAG_LCD, &h3_lcd_config },
448 #define H3_NAND_RB_GPIO_PIN 10
450 static int nand_dev_ready(struct omap_nand_platform_data *data)
452 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
455 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
457 #include <../drivers/media/video/ov9640.h>
460 * Common OV9640 register initialization for all image sizes, pixel formats,
463 const static struct ov9640_reg ov9640_common[] = {
465 { 0x12, 0x80 }, { 0x11, 0x80 }, { 0x13, 0x88 }, /* COM7, CLKRC, COM8 */
466 { 0x01, 0x58 }, { 0x02, 0x24 }, { 0x04, 0x00 }, /* BLUE, RED, COM1 */
467 { 0x0E, 0x81 }, { 0x0F, 0x4F }, { 0x14, 0xcA }, /* COM5, COM6, COM9 */
468 { 0x16, 0x02 }, { 0x1B, 0x01 }, { 0x24, 0x70 }, /* ?, PSHFT, AEW */
469 { 0x25, 0x68 }, { 0x26, 0xD3 }, { 0x27, 0x90 }, /* AEB, VPT, BBIAS */
470 { 0x2A, 0x00 }, { 0x2B, 0x00 }, { 0x32, 0x24 }, /* EXHCH, EXHCL, HREF */
471 { 0x33, 0x02 }, { 0x37, 0x02 }, { 0x38, 0x13 }, /* CHLF, ADC, ACOM */
472 { 0x39, 0xF0 }, { 0x3A, 0x00 }, { 0x3B, 0x01 }, /* OFON, TSLB, COM11 */
473 { 0x3D, 0x90 }, { 0x3E, 0x02 }, { 0x3F, 0xF2 }, /* COM13, COM14, EDGE */
474 { 0x41, 0x02 }, { 0x42, 0xC8 }, /* COM16, COM17 */
475 { 0x43, 0xF0 }, { 0x44, 0x10 }, { 0x45, 0x6C }, /* ?, ?, ? */
476 { 0x46, 0x6C }, { 0x47, 0x44 }, { 0x48, 0x44 }, /* ?, ?, ? */
477 { 0x49, 0x03 }, { 0x59, 0x49 }, { 0x5A, 0x94 }, /* ?, ?, ? */
478 { 0x5B, 0x46 }, { 0x5C, 0x84 }, { 0x5D, 0x5C }, /* ?, ?, ? */
479 { 0x5E, 0x08 }, { 0x5F, 0x00 }, { 0x60, 0x14 }, /* ?, ?, ? */
480 { 0x61, 0xCE }, /* ? */
481 { 0x62, 0x70 }, { 0x63, 0x00 }, { 0x64, 0x04 }, /* LCC1, LCC2, LCC3 */
482 { 0x65, 0x00 }, { 0x66, 0x00 }, /* LCC4, LCC5 */
483 { 0x69, 0x00 }, { 0x6A, 0x3E }, { 0x6B, 0x3F }, /* HV, MBD, DBLV */
484 { 0x6C, 0x40 }, { 0x6D, 0x30 }, { 0x6E, 0x4B }, /* GSP1, GSP2, GSP3 */
485 { 0x6F, 0x60 }, { 0x70, 0x70 }, { 0x71, 0x70 }, /* GSP4, GSP5, GSP6 */
486 { 0x72, 0x70 }, { 0x73, 0x70 }, { 0x74, 0x60 }, /* GSP7, GSP8, GSP9 */
487 { 0x75, 0x60 }, { 0x76, 0x50 }, { 0x77, 0x48 }, /* GSP10,GSP11,GSP12 */
488 { 0x78, 0x3A }, { 0x79, 0x2E }, { 0x7A, 0x28 }, /* GSP13,GSP14,GSP15 */
489 { 0x7B, 0x22 }, { 0x7C, 0x04 }, { 0x7D, 0x07 }, /* GSP16,GST1, GST2 */
490 { 0x7E, 0x10 }, { 0x7F, 0x28 }, { 0x80, 0x36 }, /* GST3, GST4, GST5 */
491 { 0x81, 0x44 }, { 0x82, 0x52 }, { 0x83, 0x60 }, /* GST6, GST7, GST8 */
492 { 0x84, 0x6C }, { 0x85, 0x78 }, { 0x86, 0x8C }, /* GST9, GST10,GST11 */
493 { 0x87, 0x9E }, { 0x88, 0xBB }, { 0x89, 0xD2 }, /* GST12,GST13,GST14 */
494 { 0x8A, 0xE6 }, { 0x13, 0xaF }, { 0x15, 0x02 }, /* GST15, COM8 */
495 { 0x22, 0x8a }, /* GROS */
496 { OV9640_REG_TERM, OV9640_VAL_TERM }
499 static int ov9640_sensor_power_set(int power)
504 /* read current state of GPIO EXPA outputs */
505 err = read_gpio_expa(&expa, 0x27);
507 printk(KERN_ERR "Error reading GPIO EXPA\n");
510 /* Clear GPIO EXPA P3 (CAMERA_MODULE_EN) to power-up/down sensor */
516 err = write_gpio_expa(expa, 0x27);
518 printk(KERN_ERR "Error writing to GPIO EXPA\n");
525 static struct v4l2_ifparm ifparm = {
526 .if_type = V4L2_IF_TYPE_BT656,
529 .frame_start_on_rising_vs = 1,
531 .mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT,
532 .clock_min = OV9640_XCLK_MIN,
533 .clock_max = OV9640_XCLK_MAX,
538 static int ov9640_ifparm(struct v4l2_ifparm *p)
545 static struct ov9640_platform_data h3_ov9640_platform_data = {
546 .power_set = ov9640_sensor_power_set,
547 .default_regs = ov9640_common,
548 .ifparm = ov9640_ifparm,
552 static int h3_pcf_setup(struct i2c_client *client, int gpio,
553 unsigned ngpio, void *context)
557 /* REVISIT someone with schematics should look up the rest
558 * of these signals, and configure them appropriately ...
559 * camera and audio seem to be involved, too.
563 gpio_irda_x = gpio + 0;
564 status = gpio_request(gpio_irda_x, "irda_x");
567 status = gpio_direction_output(gpio_irda_x, 0);
571 /* P1 - set if MIR/FIR */
572 gpio_irda_fir = gpio + 1;
573 status = gpio_request(gpio_irda_fir, "irda_fir");
576 status = gpio_direction_output(gpio_irda_fir, 0);
580 /* 'P6' enable/disable IRDA_TX and IRDA_RX ... default, off */
581 gpio_irda_enable = gpio + 6;
582 status = gpio_request(gpio_irda_enable, "irda_enable");
585 status = gpio_direction_output(gpio_irda_enable, 0);
589 /* register the IRDA device now that it can be operated */
590 status = platform_device_register(&h3_irda_device);
596 static struct pcf857x_platform_data h3_pcf_data = {
597 /* assign these GPIO numbers right after the MPUIO lines */
598 .gpio_base = OMAP_MAX_GPIO_LINES + 16,
599 .setup = h3_pcf_setup,
602 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
604 I2C_BOARD_INFO("pcf8574", 0x27),
605 .platform_data = &h3_pcf_data,
607 I2C_BOARD_INFO("tps65013", 0x48),
608 /* .irq = OMAP_GPIO_IRQ(??), */
610 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
612 I2C_BOARD_INFO("ov9640", 0x30),
613 .platform_data = &h3_ov9640_platform_data,
617 I2C_BOARD_INFO("isp1301_omap", 0x2d),
618 .irq = OMAP_GPIO_IRQ(14),
622 static void __init h3_init(void)
624 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
625 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
626 * notice whether a NAND chip is enabled at probe time.
628 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
629 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
630 * to avoid probing every possible flash configuration...
632 nor_resource.end = nor_resource.start = omap_cs3_phys();
633 nor_resource.end += SZ_32M - 1;
635 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
636 nand_resource.end += SZ_4K - 1;
637 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
639 nand_data.dev_ready = nand_dev_ready;
641 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
642 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
643 omap_cfg_reg(V2_1710_GPIO10);
646 omap_cfg_reg(W19_1610_GPIO48);
647 gpio_request(H3_TS_GPIO, "tsc_irq");
648 gpio_direction_input(H3_TS_GPIO);
649 omap_cfg_reg(N14_1610_UWIRE_CS0);
651 platform_add_devices(devices, ARRAY_SIZE(devices));
652 spi_register_board_info(h3_spi_board_info,
653 ARRAY_SIZE(h3_spi_board_info));
654 omap_board_config = h3_config;
655 omap_board_config_size = ARRAY_SIZE(h3_config);
657 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
658 ARRAY_SIZE(h3_i2c_board_info));
662 static void __init h3_init_smc91x(void)
664 omap_cfg_reg(W15_1710_GPIO40);
665 if (gpio_request(40, "SMC91x irq") < 0) {
666 printk("Error requesting gpio 40 for smc91x irq\n");
671 static void __init h3_init_irq(void)
673 omap1_init_common_hw();
679 static void __init h3_map_io(void)
681 omap1_map_common_io();
684 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
685 /* Maintainer: Texas Instruments, Inc. */
686 .phys_io = 0xfff00000,
687 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
688 .boot_params = 0x10000100,
690 .init_irq = h3_init_irq,
691 .init_machine = h3_init,
692 .timer = &omap_timer,