arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/nand.h>
  26 #include <linux/mtd/partitions.h>
  27 #include <linux/input.h>
  28
  29 #include <asm/setup.h>
  30 #include <asm/page.h>
  31 #include <asm/hardware.h>
  32 #include <asm/mach-types.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/flash.h>
  35 #include <asm/mach/map.h>
  36
  37 #include <asm/arch/gpio.h>
  38 #include <asm/arch/gpioexpander.h>
  39 #include <asm/arch/irqs.h>
  40 #include <asm/arch/mux.h>
  41 #include <asm/arch/tc.h>
  42 #include <asm/arch/irda.h>
  43 #include <asm/arch/usb.h>
  44 #include <asm/arch/keypad.h>
  45 #include <asm/arch/dma.h>
  46 #include <asm/arch/common.h>
  47 #include <asm/arch/mcbsp.h>
  48 #include <asm/arch/omap-alsa.h>
  49
  50 extern int omap_gpio_init(void);
  51
  52 static int h3_keymap[] = {
  53         KEY(0, 0, KEY_LEFT),
  54         KEY(0, 1, KEY_RIGHT),
  55         KEY(0, 2, KEY_3),
  56         KEY(0, 3, KEY_F10),
  57         KEY(0, 4, KEY_F5),
  58         KEY(0, 5, KEY_9),
  59         KEY(1, 0, KEY_DOWN),
  60         KEY(1, 1, KEY_UP),
  61         KEY(1, 2, KEY_2),
  62         KEY(1, 3, KEY_F9),
  63         KEY(1, 4, KEY_F7),
  64         KEY(1, 5, KEY_0),
  65         KEY(2, 0, KEY_ENTER),
  66         KEY(2, 1, KEY_6),
  67         KEY(2, 2, KEY_1),
  68         KEY(2, 3, KEY_F2),
  69         KEY(2, 4, KEY_F6),
  70         KEY(2, 5, KEY_HOME),
  71         KEY(3, 0, KEY_8),
  72         KEY(3, 1, KEY_5),
  73         KEY(3, 2, KEY_F12),
  74         KEY(3, 3, KEY_F3),
  75         KEY(3, 4, KEY_F8),
  76         KEY(3, 5, KEY_END),
  77         KEY(4, 0, KEY_7),
  78         KEY(4, 1, KEY_4),
  79         KEY(4, 2, KEY_F11),
  80         KEY(4, 3, KEY_F1),
  81         KEY(4, 4, KEY_F4),
  82         KEY(4, 5, KEY_ESC),
  83         KEY(5, 0, KEY_F13),
  84         KEY(5, 1, KEY_F14),
  85         KEY(5, 2, KEY_F15),
  86         KEY(5, 3, KEY_F16),
  87         KEY(5, 4, KEY_SLEEP),
  88         0
  89 };
  90
  91
  92 static struct mtd_partition nor_partitions[] = {
  93         /* bootloader (U-Boot, etc) in first sector */
  94         {
  95               .name             = "bootloader",
  96               .offset           = 0,
  97               .size             = SZ_128K,
  98               .mask_flags       = MTD_WRITEABLE, /* force read-only */
  99         },
 100         /* bootloader params in the next sector */
 101         {
 102               .name             = "params",
 103               .offset           = MTDPART_OFS_APPEND,
 104               .size             = SZ_128K,
 105               .mask_flags       = 0,
 106         },
 107         /* kernel */
 108         {
 109               .name             = "kernel",
 110               .offset           = MTDPART_OFS_APPEND,
 111               .size             = SZ_2M,
 112               .mask_flags       = 0
 113         },
 114         /* file system */
 115         {
 116               .name             = "filesystem",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = MTDPART_SIZ_FULL,
 119               .mask_flags       = 0
 120         }
 121 };
 122
 123 static struct flash_platform_data nor_data = {
 124         .map_name       = "cfi_probe",
 125         .width          = 2,
 126         .parts          = nor_partitions,
 127         .nr_parts       = ARRAY_SIZE(nor_partitions),
 128 };
 129
 130 static struct resource nor_resource = {
 131         /* This is on CS3, wherever it's mapped */
 132         .flags          = IORESOURCE_MEM,
 133 };
 134
 135 static struct platform_device nor_device = {
 136         .name           = "omapflash",
 137         .id             = 0,
 138         .dev            = {
 139                 .platform_data  = &nor_data,
 140         },
 141         .num_resources  = 1,
 142         .resource       = &nor_resource,
 143 };
 144
 145 static struct mtd_partition nand_partitions[] = {
 146 #if 0
 147         /* REVISIT: enable these partitions if you make NAND BOOT work */
 148         {
 149                 .name           = "xloader",
 150                 .offset         = 0,
 151                 .size           = 64 * 1024,
 152                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 153         },
 154         {
 155                 .name           = "bootloader",
 156                 .offset         = MTDPART_OFS_APPEND,
 157                 .size           = 256 * 1024,
 158                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 159         },
 160         {
 161                 .name           = "params",
 162                 .offset         = MTDPART_OFS_APPEND,
 163                 .size           = 192 * 1024,
 164         },
 165         {
 166                 .name           = "kernel",
 167                 .offset         = MTDPART_OFS_APPEND,
 168                 .size           = 2 * SZ_1M,
 169         },
 170 #endif
 171         {
 172                 .name           = "filesystem",
 173                 .size           = MTDPART_SIZ_FULL,
 174                 .offset         = MTDPART_OFS_APPEND,
 175         },
 176 };
 177
 178 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 179 static struct nand_platform_data nand_data = {
 180         .options        = NAND_SAMSUNG_LP_OPTIONS,
 181         .parts          = nand_partitions,
 182         .nr_parts       = ARRAY_SIZE(nand_partitions),
 183 };
 184
 185 static struct resource nand_resource = {
 186         .flags          = IORESOURCE_MEM,
 187 };
 188
 189 static struct platform_device nand_device = {
 190         .name           = "omapnand",
 191         .id             = 0,
 192         .dev            = {
 193                 .platform_data  = &nand_data,
 194         },
 195         .num_resources  = 1,
 196         .resource       = &nand_resource,
 197 };
 198
 199 static struct resource smc91x_resources[] = {
 200         [0] = {
 201                 .start  = OMAP1710_ETHR_START,          /* Physical */
 202                 .end    = OMAP1710_ETHR_START + 0xf,
 203                 .flags  = IORESOURCE_MEM,
 204         },
 205         [1] = {
 206                 .start  = OMAP_GPIO_IRQ(40),
 207                 .end    = OMAP_GPIO_IRQ(40),
 208                 .flags  = IORESOURCE_IRQ,
 209         },
 210 };
 211
 212 static struct platform_device smc91x_device = {
 213         .name           = "smc91x",
 214         .id             = 0,
 215         .num_resources  = ARRAY_SIZE(smc91x_resources),
 216         .resource       = smc91x_resources,
 217 };
 218
 219 #define GPTIMER_BASE            0xFFFB1400
 220 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 221 #define GPTIMER_REGS_SIZE       0x46
 222
 223 static struct resource intlat_resources[] = {
 224         [0] = {
 225                 .start  = GPTIMER_REGS(0),            /* Physical */
 226                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 227                 .flags  = IORESOURCE_MEM,
 228         },
 229         [1] = {
 230                 .start  = INT_1610_GPTIMER1,
 231                 .end    = INT_1610_GPTIMER1,
 232                 .flags  = IORESOURCE_IRQ,
 233         },
 234 };
 235
 236 static struct platform_device intlat_device = {
 237         .name      = "omap_intlat",
 238         .id          = 0,
 239         .num_resources  = ARRAY_SIZE(intlat_resources),
 240         .resource       = intlat_resources,
 241 };
 242
 243 static struct resource h3_kp_resources[] = {
 244         [0] = {
 245                 .start  = INT_KEYBOARD,
 246                 .end    = INT_KEYBOARD,
 247                 .flags  = IORESOURCE_IRQ,
 248         },
 249 };
 250
 251 static struct omap_kp_platform_data h3_kp_data = {
 252         .rows           = 8,
 253         .cols           = 8,
 254         .keymap         = h3_keymap,
 255         .keymapsize     = ARRAY_SIZE(h3_keymap),
 256         .rep            = 1,
 257         .delay          = 9,
 258         .dbounce        = 1,
 259 };
 260
 261 static struct platform_device h3_kp_device = {
 262         .name           = "omap-keypad",
 263         .id             = -1,
 264         .dev            = {
 265                 .platform_data = &h3_kp_data,
 266         },
 267         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 268         .resource       = h3_kp_resources,
 269 };
 270
 271
 272 /* Select between the IrDA and aGPS module
 273  */
 274 static int h3_select_irda(struct device *dev, int state)
 275 {
 276         unsigned char expa;
 277         int err = 0;
 278
 279         if ((err = read_gpio_expa(&expa, 0x26))) {
 280                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 281                 return err;
 282         }
 283
 284         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 285         if (state & IR_SEL) { /* IrDA */
 286                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 287                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 288                         return err;
 289                 }
 290         } else {
 291                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 292                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 293                         return err;
 294                 }
 295         }
 296         return err;
 297 }
 298
 299 static void set_trans_mode(struct work_struct *work)
 300 {
 301         struct omap_irda_config *irda_config =
 302                 container_of(work, struct omap_irda_config, gpio_expa.work);
 303         int mode = irda_config->mode;
 304         unsigned char expa;
 305         int err = 0;
 306
 307         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 308                 printk(KERN_ERR "Error reading from I/O expander\n");
 309         }
 310
 311         expa &= ~0x03;
 312
 313         if (mode & IR_SIRMODE) {
 314                 expa |= 0x01;
 315         } else { /* MIR/FIR */
 316                 expa |= 0x03;
 317         }
 318
 319         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 320                 printk(KERN_ERR "Error writing to I/O expander\n");
 321         }
 322 }
 323
 324 static int h3_transceiver_mode(struct device *dev, int mode)
 325 {
 326         struct omap_irda_config *irda_config = dev->platform_data;
 327
 328         irda_config->mode = mode;
 329         cancel_delayed_work(&irda_config->gpio_expa);
 330         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 331         schedule_delayed_work(&irda_config->gpio_expa, 0);
 332
 333         return 0;
 334 }
 335
 336 static struct omap_irda_config h3_irda_data = {
 337         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 338         .transceiver_mode       = h3_transceiver_mode,
 339         .select_irda            = h3_select_irda,
 340         .rx_channel             = OMAP_DMA_UART3_RX,
 341         .tx_channel             = OMAP_DMA_UART3_TX,
 342         .dest_start             = UART3_THR,
 343         .src_start              = UART3_RHR,
 344         .tx_trigger             = 0,
 345         .rx_trigger             = 0,
 346 };
 347
 348 static struct resource h3_irda_resources[] = {
 349         [0] = {
 350                 .start  = INT_UART3,
 351                 .end    = INT_UART3,
 352                 .flags  = IORESOURCE_IRQ,
 353         },
 354 };
 355
 356 static u64 irda_dmamask = 0xffffffff;
 357
 358 static struct platform_device h3_irda_device = {
 359         .name           = "omapirda",
 360         .id             = 0,
 361         .dev            = {
 362                 .platform_data  = &h3_irda_data,
 363                 .dma_mask       = &irda_dmamask,
 364         },
 365         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 366         .resource       = h3_irda_resources,
 367 };
 368
 369 static struct platform_device h3_lcd_device = {
 370         .name           = "lcd_h3",
 371         .id             = -1,
 372 };
 373
 374 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 375         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 376         .spcr1 = RINTM(3) | RRST,
 377         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 378                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 379         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 380         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 381                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 382         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 383         .srgr1 = FWID(15),
 384         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 385
 386         .pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
 387         //.pcr0 = CLKXP | CLKRP,        /* mcbsp: slave */
 388 };
 389
 390 static struct omap_alsa_codec_config alsa_config = {
 391         .name                   = "H3 TSC2101",
 392         .mcbsp_regs_alsa        = &mcbsp_regs,
 393         .codec_configure_dev    = NULL, // tsc2101_configure,
 394         .codec_set_samplerate   = NULL, // tsc2101_set_samplerate,
 395         .codec_clock_setup      = NULL, // tsc2101_clock_setup,
 396         .codec_clock_on         = NULL, // tsc2101_clock_on,
 397         .codec_clock_off        = NULL, // tsc2101_clock_off,
 398         .get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
 399 };
 400
 401 static struct platform_device h3_mcbsp1_device = {
 402         .name   = "omap_alsa_mcbsp",
 403         .id     = 1,
 404         .dev = {
 405                 .platform_data  = &alsa_config,
 406         },
 407 };
 408
 409 static struct platform_device *devices[] __initdata = {
 410         &nor_device,
 411         &nand_device,
 412         &smc91x_device,
 413         &intlat_device,
 414         &h3_irda_device,
 415         &h3_kp_device,
 416         &h3_lcd_device,
 417         &h3_mcbsp1_device,
 418 };
 419
 420 static struct omap_usb_config h3_usb_config __initdata = {
 421         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 422         .otg        = 2,
 423
 424 #ifdef CONFIG_USB_GADGET_OMAP
 425         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 426 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 427         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 428         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 429 #endif
 430
 431         .pins[1]        = 3,
 432 };
 433
 434 static struct omap_mmc_config h3_mmc_config __initdata = {
 435         .mmc[0] = {
 436                 .enabled        = 1,
 437                 .power_pin      = -1,   /* tps65010 GPIO4 */
 438                 .switch_pin     = OMAP_MPUIO(1),
 439         },
 440 };
 441
 442 static struct omap_uart_config h3_uart_config __initdata = {
 443         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 444 };
 445
 446 static struct omap_lcd_config h3_lcd_config __initdata = {
 447         .ctrl_name      = "internal",
 448 };
 449
 450 static struct omap_board_config_kernel h3_config[] = {
 451         { OMAP_TAG_USB,         &h3_usb_config },
 452         { OMAP_TAG_MMC,         &h3_mmc_config },
 453         { OMAP_TAG_UART,        &h3_uart_config },
 454         { OMAP_TAG_LCD,         &h3_lcd_config },
 455 };
 456
 457 #define H3_NAND_RB_GPIO_PIN     10
 458
 459 static int nand_dev_ready(struct nand_platform_data *data)
 460 {
 461         return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
 462 }
 463
 464 static void __init h3_init(void)
 465 {
 466         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 467          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 468          * notice whether a NAND chip is enabled at probe time.
 469          *
 470          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 471          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 472          * to avoid probing every possible flash configuration...
 473          */
 474         nor_resource.end = nor_resource.start = omap_cs3_phys();
 475         nor_resource.end += SZ_32M - 1;
 476
 477         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 478         nand_resource.end += SZ_4K - 1;
 479         if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
 480                 nand_data.dev_ready = nand_dev_ready;
 481
 482         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 483         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 484         omap_cfg_reg(V2_1710_GPIO10);
 485
 486         platform_add_devices(devices, ARRAY_SIZE(devices));
 487         omap_board_config = h3_config;
 488         omap_board_config_size = ARRAY_SIZE(h3_config);
 489         omap_serial_init();
 490 }
 491
 492 static void __init h3_init_smc91x(void)
 493 {
 494         omap_cfg_reg(W15_1710_GPIO40);
 495         if (omap_request_gpio(40) < 0) {
 496                 printk("Error requesting gpio 40 for smc91x irq\n");
 497                 return;
 498         }
 499 }
 500
 501 static void __init h3_init_irq(void)
 502 {
 503         omap1_init_common_hw();
 504         omap_init_irq();
 505         omap_gpio_init();
 506         h3_init_smc91x();
 507 }
 508
 509 static void __init h3_map_io(void)
 510 {
 511         omap1_map_common_io();
 512 }
 513
 514 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 515         /* Maintainer: Texas Instruments, Inc. */
 516         .phys_io        = 0xfff00000,
 517         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 518         .boot_params    = 0x10000100,
 519         .map_io         = h3_map_io,
 520         .init_irq       = h3_init_irq,
 521         .init_machine   = h3_init,
 522         .timer          = &omap_timer,
 523 MACHINE_END