arch/arm/mach-omap1/board-h2.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h2.c
   3  *
   4  * Board specific inits for OMAP-1610 H2
   5  *
   6  * Copyright (C) 2001 RidgeRun, Inc.
   7  * Author: Greg Lonnon <glonnon@ridgerun.com>
   8  *
   9  * Copyright (C) 2002 MontaVista Software, Inc.
  10  *
  11  * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
  12  * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
  13  *
  14  * H2 specific changes and cleanup
  15  * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/mtd/mtd.h>
  27 #include <linux/mtd/nand.h>
  28 #include <linux/mtd/partitions.h>
  29 #include <linux/input.h>
  30 #include <linux/workqueue.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/spi/tsc2101.h>
  33 #include <linux/clk.h>
  34
  35 #include <asm/hardware.h>
  36 #include <asm/mach-types.h>
  37 #include <asm/mach/arch.h>
  38 #include <asm/mach/flash.h>
  39 #include <asm/mach/map.h>
  40
  41 #include <asm/arch/gpio.h>
  42 #include <asm/arch/mux.h>
  43 #include <asm/arch/tc.h>
  44 #include <asm/arch/irda.h>
  45 #include <asm/arch/usb.h>
  46 #include <asm/arch/keypad.h>
  47 #include <asm/arch/common.h>
  48 #include <asm/arch/mcbsp.h>
  49 #include <asm/arch/omap-alsa.h>
  50
  51 extern int omap_gpio_init(void);
  52
  53 static int h2_keymap[] = {
  54         KEY(0, 0, KEY_LEFT),
  55         KEY(0, 1, KEY_RIGHT),
  56         KEY(0, 2, KEY_3),
  57         KEY(0, 3, KEY_F10),
  58         KEY(0, 4, KEY_F5),
  59         KEY(0, 5, KEY_9),
  60         KEY(1, 0, KEY_DOWN),
  61         KEY(1, 1, KEY_UP),
  62         KEY(1, 2, KEY_2),
  63         KEY(1, 3, KEY_F9),
  64         KEY(1, 4, KEY_F7),
  65         KEY(1, 5, KEY_0),
  66         KEY(2, 0, KEY_ENTER),
  67         KEY(2, 1, KEY_6),
  68         KEY(2, 2, KEY_1),
  69         KEY(2, 3, KEY_F2),
  70         KEY(2, 4, KEY_F6),
  71         KEY(2, 5, KEY_HOME),
  72         KEY(3, 0, KEY_8),
  73         KEY(3, 1, KEY_5),
  74         KEY(3, 2, KEY_F12),
  75         KEY(3, 3, KEY_F3),
  76         KEY(3, 4, KEY_F8),
  77         KEY(3, 5, KEY_END),
  78         KEY(4, 0, KEY_7),
  79         KEY(4, 1, KEY_4),
  80         KEY(4, 2, KEY_F11),
  81         KEY(4, 3, KEY_F1),
  82         KEY(4, 4, KEY_F4),
  83         KEY(4, 5, KEY_ESC),
  84         KEY(5, 0, KEY_F13),
  85         KEY(5, 1, KEY_F14),
  86         KEY(5, 2, KEY_F15),
  87         KEY(5, 3, KEY_F16),
  88         KEY(5, 4, KEY_SLEEP),
  89         0
  90 };
  91
  92 static struct mtd_partition h2_nor_partitions[] = {
  93         /* bootloader (U-Boot, etc) in first sector */
  94         {
  95               .name             = "bootloader",
  96               .offset           = 0,
  97               .size             = SZ_128K,
  98               .mask_flags       = MTD_WRITEABLE, /* force read-only */
  99         },
 100         /* bootloader params in the next sector */
 101         {
 102               .name             = "params",
 103               .offset           = MTDPART_OFS_APPEND,
 104               .size             = SZ_128K,
 105               .mask_flags       = 0,
 106         },
 107         /* kernel */
 108         {
 109               .name             = "kernel",
 110               .offset           = MTDPART_OFS_APPEND,
 111               .size             = SZ_2M,
 112               .mask_flags       = 0
 113         },
 114         /* file system */
 115         {
 116               .name             = "filesystem",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = MTDPART_SIZ_FULL,
 119               .mask_flags       = 0
 120         }
 121 };
 122
 123 static struct flash_platform_data h2_nor_data = {
 124         .map_name       = "cfi_probe",
 125         .width          = 2,
 126         .parts          = h2_nor_partitions,
 127         .nr_parts       = ARRAY_SIZE(h2_nor_partitions),
 128 };
 129
 130 static struct resource h2_nor_resource = {
 131         /* This is on CS3, wherever it's mapped */
 132         .flags          = IORESOURCE_MEM,
 133 };
 134
 135 static struct platform_device h2_nor_device = {
 136         .name           = "omapflash",
 137         .id             = 0,
 138         .dev            = {
 139                 .platform_data  = &h2_nor_data,
 140         },
 141         .num_resources  = 1,
 142         .resource       = &h2_nor_resource,
 143 };
 144
 145 static struct mtd_partition h2_nand_partitions[] = {
 146 #if 0
 147         /* REVISIT:  enable these partitions if you make NAND BOOT
 148          * work on your H2 (rev C or newer); published versions of
 149          * x-load only support P2 and H3.
 150          */
 151         {
 152                 .name           = "xloader",
 153                 .offset         = 0,
 154                 .size           = 64 * 1024,
 155                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 156         },
 157         {
 158                 .name           = "bootloader",
 159                 .offset         = MTDPART_OFS_APPEND,
 160                 .size           = 256 * 1024,
 161                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 162         },
 163         {
 164                 .name           = "params",
 165                 .offset         = MTDPART_OFS_APPEND,
 166                 .size           = 192 * 1024,
 167         },
 168         {
 169                 .name           = "kernel",
 170                 .offset         = MTDPART_OFS_APPEND,
 171                 .size           = 2 * SZ_1M,
 172         },
 173 #endif
 174         {
 175                 .name           = "filesystem",
 176                 .size           = MTDPART_SIZ_FULL,
 177                 .offset         = MTDPART_OFS_APPEND,
 178         },
 179 };
 180
 181 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 182 static struct nand_platform_data h2_nand_data = {
 183         .options        = NAND_SAMSUNG_LP_OPTIONS,
 184         .parts          = h2_nand_partitions,
 185         .nr_parts       = ARRAY_SIZE(h2_nand_partitions),
 186 };
 187
 188 static struct resource h2_nand_resource = {
 189         .flags          = IORESOURCE_MEM,
 190 };
 191
 192 static struct platform_device h2_nand_device = {
 193         .name           = "omapnand",
 194         .id             = 0,
 195         .dev            = {
 196                 .platform_data  = &h2_nand_data,
 197         },
 198         .num_resources  = 1,
 199         .resource       = &h2_nand_resource,
 200 };
 201
 202 static struct resource h2_smc91x_resources[] = {
 203         [0] = {
 204                 .start  = OMAP1610_ETHR_START,          /* Physical */
 205                 .end    = OMAP1610_ETHR_START + 0xf,
 206                 .flags  = IORESOURCE_MEM,
 207         },
 208         [1] = {
 209                 .start  = OMAP_GPIO_IRQ(0),
 210                 .end    = OMAP_GPIO_IRQ(0),
 211                 .flags  = IORESOURCE_IRQ,
 212         },
 213 };
 214
 215 static struct platform_device h2_smc91x_device = {
 216         .name           = "smc91x",
 217         .id             = 0,
 218         .num_resources  = ARRAY_SIZE(h2_smc91x_resources),
 219         .resource       = h2_smc91x_resources,
 220 };
 221
 222 static struct resource h2_kp_resources[] = {
 223         [0] = {
 224                 .start  = INT_KEYBOARD,
 225                 .end    = INT_KEYBOARD,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct omap_kp_platform_data h2_kp_data = {
 231         .rows           = 8,
 232         .cols           = 8,
 233         .keymap         = h2_keymap,
 234         .keymapsize     = ARRAY_SIZE(h2_keymap),
 235         .rep            = 1,
 236         .delay          = 9,
 237         .dbounce        = 1,
 238 };
 239
 240 static struct platform_device h2_kp_device = {
 241         .name           = "omap-keypad",
 242         .id             = -1,
 243         .dev            = {
 244                 .platform_data = &h2_kp_data,
 245         },
 246         .num_resources  = ARRAY_SIZE(h2_kp_resources),
 247         .resource       = h2_kp_resources,
 248 };
 249
 250 #define H2_IRDA_FIRSEL_GPIO_PIN 17
 251
 252 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 253 static int h2_transceiver_mode(struct device *dev, int state)
 254 {
 255         if (state & IR_SIRMODE)
 256                 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 0);
 257         else    /* MIR/FIR */
 258                 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 1);
 259
 260         return 0;
 261 }
 262 #endif
 263
 264 static struct omap_irda_config h2_irda_data = {
 265         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 266         .rx_channel             = OMAP_DMA_UART3_RX,
 267         .tx_channel             = OMAP_DMA_UART3_TX,
 268         .dest_start             = UART3_THR,
 269         .src_start              = UART3_RHR,
 270         .tx_trigger             = 0,
 271         .rx_trigger             = 0,
 272 };
 273
 274 static struct resource h2_irda_resources[] = {
 275         [0] = {
 276                 .start  = INT_UART3,
 277                 .end    = INT_UART3,
 278                 .flags  = IORESOURCE_IRQ,
 279         },
 280 };
 281
 282 static u64 irda_dmamask = 0xffffffff;
 283
 284 static struct platform_device h2_irda_device = {
 285         .name           = "omapirda",
 286         .id             = 0,
 287         .dev            = {
 288                 .platform_data  = &h2_irda_data,
 289                 .dma_mask       = &irda_dmamask,
 290         },
 291         .num_resources  = ARRAY_SIZE(h2_irda_resources),
 292         .resource       = h2_irda_resources,
 293 };
 294
 295 static struct platform_device h2_lcd_device = {
 296         .name           = "lcd_h2",
 297         .id             = -1,
 298 };
 299
 300 struct {
 301         struct clk      *mclk;
 302         int             initialized;
 303 } h2_tsc2101;
 304
 305 #define TSC2101_MUX_MCLK_ON     R10_1610_MCLK_ON
 306 #define TSC2101_MUX_MCLK_OFF    R10_1610_MCLK_OFF
 307
 308 static void h2_lcd_dev_init(struct spi_device *tsc2101)
 309 {
 310         /* The LCD is connected to the GPIO pins of the TSC2101, so
 311          * we have to tie them here. We can also register the LCD driver
 312          * first only here, where we know that the TSC driver is ready.
 313          */
 314
 315         h2_lcd_device.dev.platform_data = tsc2101;
 316         platform_device_register(&h2_lcd_device);
 317 }
 318
 319 static int h2_tsc2101_init(struct spi_device *spi)
 320 {
 321         int r;
 322
 323         if (h2_tsc2101.initialized) {
 324                 printk(KERN_ERR "tsc2101: already initialized\n");
 325                 return -ENODEV;
 326         }
 327
 328         /* Get the MCLK */
 329         h2_tsc2101.mclk = clk_get(&spi->dev, "mclk");
 330         if (IS_ERR(h2_tsc2101.mclk)) {
 331                 dev_err(&spi->dev, "unable to get the clock MCLK\n");
 332                 return PTR_ERR(h2_tsc2101.mclk);
 333         }
 334         if ((r = clk_set_rate(h2_tsc2101.mclk, 12000000)) < 0) {
 335                 dev_err(&spi->dev, "unable to set rate to the MCLK\n");
 336                 goto err;
 337         }
 338
 339         omap_cfg_reg(TSC2101_MUX_MCLK_OFF);
 340         omap_cfg_reg(N15_1610_UWIRE_CS1);
 341
 342         h2_lcd_dev_init(spi);
 343
 344         return 0;
 345 err:
 346         clk_put(h2_tsc2101.mclk);
 347         return r;
 348 }
 349
 350 static void h2_tsc2101_cleanup(struct spi_device *spi)
 351 {
 352         clk_put(h2_tsc2101.mclk);
 353         omap_cfg_reg(TSC2101_MUX_MCLK_OFF);
 354 }
 355
 356 static void h2_tsc2101_enable_mclk(struct spi_device *spi)
 357 {
 358         omap_cfg_reg(TSC2101_MUX_MCLK_ON);
 359         clk_enable(h2_tsc2101.mclk);
 360 }
 361
 362 static void h2_tsc2101_disable_mclk(struct spi_device *spi)
 363 {
 364         clk_disable(h2_tsc2101.mclk);
 365         omap_cfg_reg(R10_1610_MCLK_OFF);
 366 }
 367
 368 static struct tsc2101_platform_data h2_tsc2101_platform_data = {
 369         .init           = h2_tsc2101_init,
 370         .cleanup        = h2_tsc2101_cleanup,
 371         .enable_mclk    = h2_tsc2101_enable_mclk,
 372         .disable_mclk   = h2_tsc2101_disable_mclk,
 373 };
 374
 375 static struct spi_board_info h2_spi_board_info[] __initdata = {
 376         [0] = {
 377                 .modalias       = "tsc2101",
 378                 .bus_num        = 2,
 379                 .chip_select    = 1,
 380                 .max_speed_hz   = 16000000,
 381                 .platform_data  = &h2_tsc2101_platform_data,
 382         },
 383 };
 384
 385 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 386         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 387         .spcr1 = RINTM(3) | RRST,
 388         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 389                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 390         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 391         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 392                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 393         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 394         .srgr1 = FWID(15),
 395         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 396
 397         .pcr0  = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
 398         //.pcr0 = CLKXP | CLKRP,        /* mcbsp: slave */
 399 };
 400
 401 static struct omap_alsa_codec_config alsa_config = {
 402         .name                   = "H2 TSC2101",
 403         .mcbsp_regs_alsa        = &mcbsp_regs,
 404         .codec_configure_dev    = NULL, // tsc2101_configure,
 405         .codec_set_samplerate   = NULL, // tsc2101_set_samplerate,
 406         .codec_clock_setup      = NULL, // tsc2101_clock_setup,
 407         .codec_clock_on         = NULL, // tsc2101_clock_on,
 408         .codec_clock_off        = NULL, // tsc2101_clock_off,
 409         .get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
 410 };
 411
 412 static struct platform_device h2_mcbsp1_device = {
 413         .name   = "omap_alsa_mcbsp",
 414         .id     = 1,
 415         .dev = {
 416                 .platform_data  = &alsa_config,
 417         },
 418 };
 419
 420 static struct platform_device *h2_devices[] __initdata = {
 421         &h2_nor_device,
 422         &h2_nand_device,
 423         &h2_smc91x_device,
 424         &h2_irda_device,
 425         &h2_kp_device,
 426         &h2_mcbsp1_device,
 427 };
 428
 429 static void __init h2_init_smc91x(void)
 430 {
 431         if ((omap_request_gpio(0)) < 0) {
 432                 printk("Error requesting gpio 0 for smc91x irq\n");
 433                 return;
 434         }
 435 }
 436
 437 static void __init h2_init_irq(void)
 438 {
 439         omap1_init_common_hw();
 440         omap_init_irq();
 441         omap_gpio_init();
 442         h2_init_smc91x();
 443 }
 444
 445 static struct omap_usb_config h2_usb_config __initdata = {
 446         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 447         .otg            = 2,
 448
 449 #ifdef  CONFIG_USB_GADGET_OMAP
 450         .hmc_mode       = 19,   // 0:host(off) 1:dev|otg 2:disabled
 451         // .hmc_mode    = 21,   // 0:host(off) 1:dev(loopback) 2:host(loopback)
 452 #elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 453         /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
 454         .hmc_mode       = 20,   // 1:dev|otg(off) 1:host 2:disabled
 455 #endif
 456
 457         .pins[1]        = 3,
 458 };
 459
 460 static struct omap_mmc_config h2_mmc_config __initdata = {
 461         .mmc [0] = {
 462                 .enabled        = 1,
 463                 .wire4          = 1,
 464                 .wp_pin         = OMAP_MPUIO(3),
 465                 .power_pin      = -1,   /* tps65010 gpio3 */
 466                 .switch_pin     = OMAP_MPUIO(1),
 467         },
 468 };
 469
 470 static struct omap_uart_config h2_uart_config __initdata = {
 471         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 472 };
 473
 474 static struct omap_lcd_config h2_lcd_config __initdata = {
 475         .ctrl_name      = "internal",
 476 };
 477
 478 static struct omap_board_config_kernel h2_config[] __initdata = {
 479         { OMAP_TAG_USB,           &h2_usb_config },
 480         { OMAP_TAG_MMC,           &h2_mmc_config },
 481         { OMAP_TAG_UART,        &h2_uart_config },
 482         { OMAP_TAG_LCD,         &h2_lcd_config },
 483 };
 484
 485 #define H2_NAND_RB_GPIO_PIN     62
 486
 487 static int h2_nand_dev_ready(struct nand_platform_data *data)
 488 {
 489         return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN);
 490 }
 491
 492 static void __init h2_init(void)
 493 {
 494         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 495          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 496          * notice whether a NAND chip is enabled at probe time.
 497          *
 498          * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
 499          * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3.  Try
 500          * detecting that in code here, to avoid probing every possible flash
 501          * configuration...
 502          */
 503         h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
 504         h2_nor_resource.end += SZ_32M - 1;
 505
 506         h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
 507         h2_nand_resource.end += SZ_4K - 1;
 508         if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN)))
 509                 h2_nand_data.dev_ready = h2_nand_dev_ready;
 510
 511         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 512         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 513
 514         /* MMC:  card detect and WP */
 515         // omap_cfg_reg(U19_ARMIO1);            /* CD */
 516         omap_cfg_reg(BALLOUT_V8_ARMIO3);        /* WP */
 517
 518         /* Irda */
 519 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 520         omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
 521         if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
 522                 omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0);
 523                 h2_irda_data.transceiver_mode = h2_transceiver_mode;
 524         }
 525 #endif
 526
 527         platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
 528         spi_register_board_info(h2_spi_board_info,
 529                                 ARRAY_SIZE(h2_spi_board_info));
 530         omap_board_config = h2_config;
 531         omap_board_config_size = ARRAY_SIZE(h2_config);
 532         omap_serial_init();
 533 }
 534
 535 static void __init h2_map_io(void)
 536 {
 537         omap1_map_common_io();
 538 }
 539
 540 MACHINE_START(OMAP_H2, "TI-H2")
 541         /* Maintainer: Imre Deak <imre.deak@nokia.com> */
 542         .phys_io        = 0xfff00000,
 543         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 544         .boot_params    = 0x10000100,
 545         .map_io         = h2_map_io,
 546         .init_irq       = h2_init_irq,
 547         .init_machine   = h2_init,
 548         .timer          = &omap_timer,
 549 MACHINE_END