arch/arm/mach-omap1/board-h2.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h2.c
   3  *
   4  * Board specific inits for OMAP-1610 H2
   5  *
   6  * Copyright (C) 2001 RidgeRun, Inc.
   7  * Author: Greg Lonnon <glonnon@ridgerun.com>
   8  *
   9  * Copyright (C) 2002 MontaVista Software, Inc.
  10  *
  11  * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
  12  * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
  13  *
  14  * H2 specific changes and cleanup
  15  * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/mtd/mtd.h>
  27 #include <linux/mtd/nand.h>
  28 #include <linux/mtd/partitions.h>
  29 #include <linux/input.h>
  30 #include <linux/workqueue.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/spi/tsc2101.h>
  33 #include <linux/clk.h>
  34
  35 #include <asm/hardware.h>
  36 #include <asm/mach-types.h>
  37 #include <asm/mach/arch.h>
  38 #include <asm/mach/flash.h>
  39 #include <asm/mach/map.h>
  40
  41 #include <asm/arch/gpio.h>
  42 #include <asm/arch/mux.h>
  43 #include <asm/arch/tc.h>
  44 #include <asm/arch/irda.h>
  45 #include <asm/arch/usb.h>
  46 #include <asm/arch/keypad.h>
  47 #include <asm/arch/common.h>
  48 #include <asm/arch/mcbsp.h>
  49 #include <asm/arch/omap-alsa.h>
  50
  51 extern int omap_gpio_init(void);
  52
  53 static int h2_keymap[] = {
  54         KEY(0, 0, KEY_LEFT),
  55         KEY(0, 1, KEY_RIGHT),
  56         KEY(0, 2, KEY_3),
  57         KEY(0, 3, KEY_F10),
  58         KEY(0, 4, KEY_F5),
  59         KEY(0, 5, KEY_9),
  60         KEY(1, 0, KEY_DOWN),
  61         KEY(1, 1, KEY_UP),
  62         KEY(1, 2, KEY_2),
  63         KEY(1, 3, KEY_F9),
  64         KEY(1, 4, KEY_F7),
  65         KEY(1, 5, KEY_0),
  66         KEY(2, 0, KEY_ENTER),
  67         KEY(2, 1, KEY_6),
  68         KEY(2, 2, KEY_1),
  69         KEY(2, 3, KEY_F2),
  70         KEY(2, 4, KEY_F6),
  71         KEY(2, 5, KEY_HOME),
  72         KEY(3, 0, KEY_8),
  73         KEY(3, 1, KEY_5),
  74         KEY(3, 2, KEY_F12),
  75         KEY(3, 3, KEY_F3),
  76         KEY(3, 4, KEY_F8),
  77         KEY(3, 5, KEY_END),
  78         KEY(4, 0, KEY_7),
  79         KEY(4, 1, KEY_4),
  80         KEY(4, 2, KEY_F11),
  81         KEY(4, 3, KEY_F1),
  82         KEY(4, 4, KEY_F4),
  83         KEY(4, 5, KEY_ESC),
  84         KEY(5, 0, KEY_F13),
  85         KEY(5, 1, KEY_F14),
  86         KEY(5, 2, KEY_F15),
  87         KEY(5, 3, KEY_F16),
  88         KEY(5, 4, KEY_SLEEP),
  89         0
  90 };
  91
  92 static struct mtd_partition h2_nor_partitions[] = {
  93         /* bootloader (U-Boot, etc) in first sector */
  94         {
  95               .name             = "bootloader",
  96               .offset           = 0,
  97               .size             = SZ_128K,
  98               .mask_flags       = MTD_WRITEABLE, /* force read-only */
  99         },
 100         /* bootloader params in the next sector */
 101         {
 102               .name             = "params",
 103               .offset           = MTDPART_OFS_APPEND,
 104               .size             = SZ_128K,
 105               .mask_flags       = 0,
 106         },
 107         /* kernel */
 108         {
 109               .name             = "kernel",
 110               .offset           = MTDPART_OFS_APPEND,
 111               .size             = SZ_2M,
 112               .mask_flags       = 0
 113         },
 114         /* file system */
 115         {
 116               .name             = "filesystem",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = MTDPART_SIZ_FULL,
 119               .mask_flags       = 0
 120         }
 121 };
 122
 123 static struct flash_platform_data h2_nor_data = {
 124         .map_name       = "cfi_probe",
 125         .width          = 2,
 126         .parts          = h2_nor_partitions,
 127         .nr_parts       = ARRAY_SIZE(h2_nor_partitions),
 128 };
 129
 130 static struct resource h2_nor_resource = {
 131         /* This is on CS3, wherever it's mapped */
 132         .flags          = IORESOURCE_MEM,
 133 };
 134
 135 static struct platform_device h2_nor_device = {
 136         .name           = "omapflash",
 137         .id             = 0,
 138         .dev            = {
 139                 .platform_data  = &h2_nor_data,
 140         },
 141         .num_resources  = 1,
 142         .resource       = &h2_nor_resource,
 143 };
 144
 145 #if 0   /* REVISIT: Enable when nand_platform_data is applied */
 146
 147 static struct mtd_partition h2_nand_partitions[] = {
 148 #if 0
 149         /* REVISIT:  enable these partitions if you make NAND BOOT
 150          * work on your H2 (rev C or newer); published versions of
 151          * x-load only support P2 and H3.
 152          */
 153         {
 154                 .name           = "xloader",
 155                 .offset         = 0,
 156                 .size           = 64 * 1024,
 157                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 158         },
 159         {
 160                 .name           = "bootloader",
 161                 .offset         = MTDPART_OFS_APPEND,
 162                 .size           = 256 * 1024,
 163                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 164         },
 165         {
 166                 .name           = "params",
 167                 .offset         = MTDPART_OFS_APPEND,
 168                 .size           = 192 * 1024,
 169         },
 170         {
 171                 .name           = "kernel",
 172                 .offset         = MTDPART_OFS_APPEND,
 173                 .size           = 2 * SZ_1M,
 174         },
 175 #endif
 176         {
 177                 .name           = "filesystem",
 178                 .size           = MTDPART_SIZ_FULL,
 179                 .offset         = MTDPART_OFS_APPEND,
 180         },
 181 };
 182
 183 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 184 static struct nand_platform_data h2_nand_data = {
 185         .options        = NAND_SAMSUNG_LP_OPTIONS,
 186         .parts          = h2_nand_partitions,
 187         .nr_parts       = ARRAY_SIZE(h2_nand_partitions),
 188 };
 189
 190 static struct resource h2_nand_resource = {
 191         .flags          = IORESOURCE_MEM,
 192 };
 193
 194 static struct platform_device h2_nand_device = {
 195         .name           = "omapnand",
 196         .id             = 0,
 197         .dev            = {
 198                 .platform_data  = &h2_nand_data,
 199         },
 200         .num_resources  = 1,
 201         .resource       = &h2_nand_resource,
 202 };
 203 #endif
 204
 205 static struct resource h2_smc91x_resources[] = {
 206         [0] = {
 207                 .start  = OMAP1610_ETHR_START,          /* Physical */
 208                 .end    = OMAP1610_ETHR_START + 0xf,
 209                 .flags  = IORESOURCE_MEM,
 210         },
 211         [1] = {
 212                 .start  = OMAP_GPIO_IRQ(0),
 213                 .end    = OMAP_GPIO_IRQ(0),
 214                 .flags  = IORESOURCE_IRQ,
 215         },
 216 };
 217
 218 static struct platform_device h2_smc91x_device = {
 219         .name           = "smc91x",
 220         .id             = 0,
 221         .num_resources  = ARRAY_SIZE(h2_smc91x_resources),
 222         .resource       = h2_smc91x_resources,
 223 };
 224
 225 static struct resource h2_kp_resources[] = {
 226         [0] = {
 227                 .start  = INT_KEYBOARD,
 228                 .end    = INT_KEYBOARD,
 229                 .flags  = IORESOURCE_IRQ,
 230         },
 231 };
 232
 233 static struct omap_kp_platform_data h2_kp_data = {
 234         .rows           = 8,
 235         .cols           = 8,
 236         .keymap         = h2_keymap,
 237         .keymapsize     = ARRAY_SIZE(h2_keymap),
 238         .rep            = 1,
 239         .delay          = 9,
 240         .dbounce        = 1,
 241 };
 242
 243 static struct platform_device h2_kp_device = {
 244         .name           = "omap-keypad",
 245         .id             = -1,
 246         .dev            = {
 247                 .platform_data = &h2_kp_data,
 248         },
 249         .num_resources  = ARRAY_SIZE(h2_kp_resources),
 250         .resource       = h2_kp_resources,
 251 };
 252
 253 #define H2_IRDA_FIRSEL_GPIO_PIN 17
 254
 255 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 256 static int h2_transceiver_mode(struct device *dev, int state)
 257 {
 258         if (state & IR_SIRMODE)
 259                 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 0);
 260         else    /* MIR/FIR */
 261                 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 1);
 262
 263         return 0;
 264 }
 265 #endif
 266
 267 static struct omap_irda_config h2_irda_data = {
 268         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 269         .rx_channel             = OMAP_DMA_UART3_RX,
 270         .tx_channel             = OMAP_DMA_UART3_TX,
 271         .dest_start             = UART3_THR,
 272         .src_start              = UART3_RHR,
 273         .tx_trigger             = 0,
 274         .rx_trigger             = 0,
 275 };
 276
 277 static struct resource h2_irda_resources[] = {
 278         [0] = {
 279                 .start  = INT_UART3,
 280                 .end    = INT_UART3,
 281                 .flags  = IORESOURCE_IRQ,
 282         },
 283 };
 284
 285 static u64 irda_dmamask = 0xffffffff;
 286
 287 static struct platform_device h2_irda_device = {
 288         .name           = "omapirda",
 289         .id             = 0,
 290         .dev            = {
 291                 .platform_data  = &h2_irda_data,
 292                 .dma_mask       = &irda_dmamask,
 293         },
 294         .num_resources  = ARRAY_SIZE(h2_irda_resources),
 295         .resource       = h2_irda_resources,
 296 };
 297
 298 static struct platform_device h2_lcd_device = {
 299         .name           = "lcd_h2",
 300         .id             = -1,
 301 };
 302
 303 struct {
 304         struct clk      *mclk;
 305         int             initialized;
 306 } h2_tsc2101;
 307
 308 #define TSC2101_MUX_MCLK_ON     R10_1610_MCLK_ON
 309 #define TSC2101_MUX_MCLK_OFF    R10_1610_MCLK_OFF
 310
 311 static void h2_lcd_dev_init(struct spi_device *tsc2101)
 312 {
 313         /* The LCD is connected to the GPIO pins of the TSC2101, so
 314          * we have to tie them here. We can also register the LCD driver
 315          * first only here, where we know that the TSC driver is ready.
 316          */
 317
 318         h2_lcd_device.dev.platform_data = tsc2101;
 319         platform_device_register(&h2_lcd_device);
 320 }
 321
 322 static int h2_tsc2101_init(struct spi_device *spi)
 323 {
 324         int r;
 325
 326         if (h2_tsc2101.initialized) {
 327                 printk(KERN_ERR "tsc2101: already initialized\n");
 328                 return -ENODEV;
 329         }
 330
 331         /* Get the MCLK */
 332         h2_tsc2101.mclk = clk_get(&spi->dev, "mclk");
 333         if (IS_ERR(h2_tsc2101.mclk)) {
 334                 dev_err(&spi->dev, "unable to get the clock MCLK\n");
 335                 return PTR_ERR(h2_tsc2101.mclk);
 336         }
 337         if ((r = clk_set_rate(h2_tsc2101.mclk, 12000000)) < 0) {
 338                 dev_err(&spi->dev, "unable to set rate to the MCLK\n");
 339                 goto err;
 340         }
 341
 342         omap_cfg_reg(TSC2101_MUX_MCLK_OFF);
 343         omap_cfg_reg(N15_1610_UWIRE_CS1);
 344
 345         h2_lcd_dev_init(spi);
 346
 347         return 0;
 348 err:
 349         clk_put(h2_tsc2101.mclk);
 350         return r;
 351 }
 352
 353 static void h2_tsc2101_cleanup(struct spi_device *spi)
 354 {
 355         clk_put(h2_tsc2101.mclk);
 356         omap_cfg_reg(TSC2101_MUX_MCLK_OFF);
 357 }
 358
 359 static void h2_tsc2101_enable_mclk(struct spi_device *spi)
 360 {
 361         omap_cfg_reg(TSC2101_MUX_MCLK_ON);
 362         clk_enable(h2_tsc2101.mclk);
 363 }
 364
 365 static void h2_tsc2101_disable_mclk(struct spi_device *spi)
 366 {
 367         clk_disable(h2_tsc2101.mclk);
 368         omap_cfg_reg(R10_1610_MCLK_OFF);
 369 }
 370
 371 static struct tsc2101_platform_data h2_tsc2101_platform_data = {
 372         .init           = h2_tsc2101_init,
 373         .cleanup        = h2_tsc2101_cleanup,
 374         .enable_mclk    = h2_tsc2101_enable_mclk,
 375         .disable_mclk   = h2_tsc2101_disable_mclk,
 376 };
 377
 378 static struct spi_board_info h2_spi_board_info[] __initdata = {
 379         [0] = {
 380                 .modalias       = "tsc2101",
 381                 .bus_num        = 2,
 382                 .chip_select    = 1,
 383                 .max_speed_hz   = 16000000,
 384                 .platform_data  = &h2_tsc2101_platform_data,
 385         },
 386 };
 387
 388 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 389         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 390         .spcr1 = RINTM(3) | RRST,
 391         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 392                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 393         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 394         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 395                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 396         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 397         .srgr1 = FWID(15),
 398         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 399
 400         .pcr0  = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
 401         //.pcr0 = CLKXP | CLKRP,        /* mcbsp: slave */
 402 };
 403
 404 static struct omap_alsa_codec_config alsa_config = {
 405         .name                   = "H2 TSC2101",
 406         .mcbsp_regs_alsa        = &mcbsp_regs,
 407         .codec_configure_dev    = NULL, // tsc2101_configure,
 408         .codec_set_samplerate   = NULL, // tsc2101_set_samplerate,
 409         .codec_clock_setup      = NULL, // tsc2101_clock_setup,
 410         .codec_clock_on         = NULL, // tsc2101_clock_on,
 411         .codec_clock_off        = NULL, // tsc2101_clock_off,
 412         .get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
 413 };
 414
 415 static struct platform_device h2_mcbsp1_device = {
 416         .name   = "omap_alsa_mcbsp",
 417         .id     = 1,
 418         .dev = {
 419                 .platform_data  = &alsa_config,
 420         },
 421 };
 422
 423 static struct platform_device *h2_devices[] __initdata = {
 424         &h2_nor_device,
 425         //&h2_nand_device,
 426         &h2_smc91x_device,
 427         &h2_irda_device,
 428         &h2_kp_device,
 429         &h2_mcbsp1_device,
 430 };
 431
 432 static void __init h2_init_smc91x(void)
 433 {
 434         if ((omap_request_gpio(0)) < 0) {
 435                 printk("Error requesting gpio 0 for smc91x irq\n");
 436                 return;
 437         }
 438 }
 439
 440 static void __init h2_init_irq(void)
 441 {
 442         omap1_init_common_hw();
 443         omap_init_irq();
 444         omap_gpio_init();
 445         h2_init_smc91x();
 446 }
 447
 448 static struct omap_usb_config h2_usb_config __initdata = {
 449         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 450         .otg            = 2,
 451
 452 #ifdef  CONFIG_USB_GADGET_OMAP
 453         .hmc_mode       = 19,   // 0:host(off) 1:dev|otg 2:disabled
 454         // .hmc_mode    = 21,   // 0:host(off) 1:dev(loopback) 2:host(loopback)
 455 #elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 456         /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
 457         .hmc_mode       = 20,   // 1:dev|otg(off) 1:host 2:disabled
 458 #endif
 459
 460         .pins[1]        = 3,
 461 };
 462
 463 static struct omap_mmc_config h2_mmc_config __initdata = {
 464         .mmc [0] = {
 465                 .enabled        = 1,
 466                 .wire4          = 1,
 467                 .wp_pin         = OMAP_MPUIO(3),
 468                 .power_pin      = -1,   /* tps65010 gpio3 */
 469                 .switch_pin     = OMAP_MPUIO(1),
 470         },
 471 };
 472
 473 static struct omap_uart_config h2_uart_config __initdata = {
 474         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 475 };
 476
 477 static struct omap_lcd_config h2_lcd_config __initdata = {
 478         .ctrl_name      = "internal",
 479 };
 480
 481 static struct omap_board_config_kernel h2_config[] __initdata = {
 482         { OMAP_TAG_USB,           &h2_usb_config },
 483         { OMAP_TAG_MMC,           &h2_mmc_config },
 484         { OMAP_TAG_UART,        &h2_uart_config },
 485         { OMAP_TAG_LCD,         &h2_lcd_config },
 486 };
 487
 488 #define H2_NAND_RB_GPIO_PIN     62
 489
 490 static int h2_nand_dev_ready(struct nand_platform_data *data)
 491 {
 492         return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN);
 493 }
 494
 495 static void __init h2_init(void)
 496 {
 497         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 498          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 499          * notice whether a NAND chip is enabled at probe time.
 500          *
 501          * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
 502          * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3.  Try
 503          * detecting that in code here, to avoid probing every possible flash
 504          * configuration...
 505          */
 506         h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
 507         h2_nor_resource.end += SZ_32M - 1;
 508
 509 #if 0   /* REVISIT: Enable when nand_platform_data is applied */
 510         h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
 511         h2_nand_resource.end += SZ_4K - 1;
 512         if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN)))
 513                 h2_nand_data.dev_ready = h2_nand_dev_ready;
 514 #endif
 515
 516         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 517         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 518
 519         /* MMC:  card detect and WP */
 520         // omap_cfg_reg(U19_ARMIO1);            /* CD */
 521         omap_cfg_reg(BALLOUT_V8_ARMIO3);        /* WP */
 522
 523         /* Irda */
 524 #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
 525         omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
 526         if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
 527                 omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0);
 528                 h2_irda_data.transceiver_mode = h2_transceiver_mode;
 529         }
 530 #endif
 531
 532         platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
 533         spi_register_board_info(h2_spi_board_info,
 534                                 ARRAY_SIZE(h2_spi_board_info));
 535         omap_board_config = h2_config;
 536         omap_board_config_size = ARRAY_SIZE(h2_config);
 537         omap_serial_init();
 538 }
 539
 540 static void __init h2_map_io(void)
 541 {
 542         omap1_map_common_io();
 543 }
 544
 545 MACHINE_START(OMAP_H2, "TI-H2")
 546         /* Maintainer: Imre Deak <imre.deak@nokia.com> */
 547         .phys_io        = 0xfff00000,
 548         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 549         .boot_params    = 0x10000100,
 550         .map_io         = h2_map_io,
 551         .init_irq       = h2_init_irq,
 552         .init_machine   = h2_init,
 553         .timer          = &omap_timer,
 554 MACHINE_END