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1 /*
2  * arch/arm/mach-ixp4xx/ixdp425-setup.c
3  *
4  * IXDP425/IXCDP1100 board-setup 
5  *
6  * Copyright (C) 2003-2005 MontaVista Software, Inc.
7  *
8  * Author: Deepak Saxena <dsaxena@plexity.net>
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/serial.h>
15 #include <linux/tty.h>
16 #include <linux/serial_8250.h>
17 #include <linux/slab.h>
18 #include <linux/io.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22
23 #include <asm/types.h>
24 #include <asm/setup.h>
25 #include <asm/memory.h>
26 #include <asm/hardware.h>
27 #include <asm/mach-types.h>
28 #include <asm/irq.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/flash.h>
31 #include <asm/delay.h>
32
33 static struct flash_platform_data ixdp425_flash_data = {
34         .map_name       = "cfi_probe",
35         .width          = 2,
36 };
37
38 static struct resource ixdp425_flash_resource = {
39         .flags          = IORESOURCE_MEM,
40 };
41
42 static struct platform_device ixdp425_flash = {
43         .name           = "IXP4XX-Flash",
44         .id             = 0,
45         .dev            = {
46                 .platform_data = &ixdp425_flash_data,
47         },
48         .num_resources  = 1,
49         .resource       = &ixdp425_flash_resource,
50 };
51
52 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
53     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
54
55 #ifdef CONFIG_MTD_PARTITIONS
56 const char *part_probes[] = { "cmdlinepart", NULL };
57
58 static struct mtd_partition ixdp425_partitions[] = {
59         {
60                 .name   = "ixp400 NAND FS 0",
61                 .offset = 0,
62                 .size   = SZ_8M
63         }, {
64                 .name   = "ixp400 NAND FS 1",
65                 .offset = MTDPART_OFS_APPEND,
66                 .size   = MTDPART_SIZ_FULL
67         },
68 };
69 #endif
70
71 static void
72 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
73 {
74         struct nand_chip *this = mtd->priv;
75         int offset = (int)this->priv;
76
77         if (ctrl & NAND_CTRL_CHANGE) {
78                 if (ctrl & NAND_NCE) {
79                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
80                         udelay(5);
81                 } else
82                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
83
84                 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
85                 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
86                 this->priv = (void *)offset;
87         }
88
89         if (cmd != NAND_CMD_NONE)
90                 writeb(cmd, this->IO_ADDR_W + offset);
91 }
92
93 static struct platform_nand_data ixdp425_flash_nand_data = {
94         .chip = {
95                 .chip_delay             = 30,
96                 .options                = NAND_NO_AUTOINCR,
97 #ifdef CONFIG_MTD_PARTITIONS
98                 .part_probe_types       = part_probes,
99                 .partitions             = ixdp425_partitions,
100                 .nr_partitions          = ARRAY_SIZE(ixdp425_partitions),
101 #endif
102         },
103         .ctrl = {
104                 .cmd_ctrl               = ixdp425_flash_nand_cmd_ctrl
105         }
106 };
107
108 static struct resource ixdp425_flash_nand_resource = {
109         .flags          = IORESOURCE_MEM,
110 };
111
112 static struct platform_device ixdp425_flash_nand = {
113         .name           = "gen_nand",
114         .id             = -1,
115         .dev            = {
116                 .platform_data = &ixdp425_flash_nand_data,
117         },
118         .num_resources  = 1,
119         .resource       = &ixdp425_flash_nand_resource,
120 };
121 #endif  /* CONFIG_MTD_NAND_PLATFORM */
122
123 static struct ixp4xx_i2c_pins ixdp425_i2c_gpio_pins = {
124         .sda_pin        = IXDP425_SDA_PIN,
125         .scl_pin        = IXDP425_SCL_PIN,
126 };
127
128 static struct platform_device ixdp425_i2c_controller = {
129         .name           = "IXP4XX-I2C",
130         .id             = 0,
131         .dev            = {
132                 .platform_data = &ixdp425_i2c_gpio_pins,
133         },
134         .num_resources  = 0
135 };
136
137 static struct resource ixdp425_uart_resources[] = {
138         {
139                 .start          = IXP4XX_UART1_BASE_PHYS,
140                 .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
141                 .flags          = IORESOURCE_MEM
142         },
143         {
144                 .start          = IXP4XX_UART2_BASE_PHYS,
145                 .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
146                 .flags          = IORESOURCE_MEM
147         }
148 };
149
150 static struct plat_serial8250_port ixdp425_uart_data[] = {
151         {
152                 .mapbase        = IXP4XX_UART1_BASE_PHYS,
153                 .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
154                 .irq            = IRQ_IXP4XX_UART1,
155                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
156                 .iotype         = UPIO_MEM,
157                 .regshift       = 2,
158                 .uartclk        = IXP4XX_UART_XTAL,
159         },
160         {
161                 .mapbase        = IXP4XX_UART2_BASE_PHYS,
162                 .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
163                 .irq            = IRQ_IXP4XX_UART2,
164                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
165                 .iotype         = UPIO_MEM,
166                 .regshift       = 2,
167                 .uartclk        = IXP4XX_UART_XTAL,
168         },
169         { },
170 };
171
172 static struct platform_device ixdp425_uart = {
173         .name                   = "serial8250",
174         .id                     = PLAT8250_DEV_PLATFORM,
175         .dev.platform_data      = ixdp425_uart_data,
176         .num_resources          = 2,
177         .resource               = ixdp425_uart_resources
178 };
179
180 static struct platform_device *ixdp425_devices[] __initdata = {
181         &ixdp425_i2c_controller,
182         &ixdp425_flash,
183 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
184     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
185         &ixdp425_flash_nand,
186 #endif
187         &ixdp425_uart
188 };
189
190 static void __init ixdp425_init(void)
191 {
192         ixp4xx_sys_init();
193
194         ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
195         ixdp425_flash_resource.end =
196                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
197
198 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
199     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
200         ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
201         ixdp425_flash_nand_resource.end   = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
202
203         gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
204
205         /* Configure expansion bus for NAND Flash */
206         *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
207                           IXP4XX_EXP_BUS_STROBE_T(1) |  /* extend by 1 clock */
208                           IXP4XX_EXP_BUS_CYCLES(0) |    /* Intel cycles */
209                           IXP4XX_EXP_BUS_SIZE(0) |      /* 512bytes addr space*/
210                           IXP4XX_EXP_BUS_WR_EN |
211                           IXP4XX_EXP_BUS_BYTE_EN;       /* 8 bit data bus */
212 #endif
213
214         if (cpu_is_ixp43x()) {
215                 ixdp425_uart.num_resources = 1;
216                 ixdp425_uart_data[1].flags = 0;
217         }
218
219         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
220 }
221
222 #ifdef CONFIG_ARCH_IXDP425
223 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
224         /* Maintainer: MontaVista Software, Inc. */
225         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
226         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
227         .map_io         = ixp4xx_map_io,
228         .init_irq       = ixp4xx_init_irq,
229         .timer          = &ixp4xx_timer,
230         .boot_params    = 0x0100,
231         .init_machine   = ixdp425_init,
232 MACHINE_END
233 #endif
234
235 #ifdef CONFIG_MACH_IXDP465
236 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
237         /* Maintainer: MontaVista Software, Inc. */
238         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
239         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
240         .map_io         = ixp4xx_map_io,
241         .init_irq       = ixp4xx_init_irq,
242         .timer          = &ixp4xx_timer,
243         .boot_params    = 0x0100,
244         .init_machine   = ixdp425_init,
245 MACHINE_END
246 #endif
247
248 #ifdef CONFIG_ARCH_PRPMC1100
249 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
250         /* Maintainer: MontaVista Software, Inc. */
251         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
252         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
253         .map_io         = ixp4xx_map_io,
254         .init_irq       = ixp4xx_init_irq,
255         .timer          = &ixp4xx_timer,
256         .boot_params    = 0x0100,
257         .init_machine   = ixdp425_init,
258 MACHINE_END
259 #endif
260
261 #ifdef CONFIG_MACH_KIXRP435
262 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
263         /* Maintainer: MontaVista Software, Inc. */
264         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
265         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
266         .map_io         = ixp4xx_map_io,
267         .init_irq       = ixp4xx_init_irq,
268         .timer          = &ixp4xx_timer,
269         .boot_params    = 0x0100,
270         .init_machine   = ixdp425_init,
271 MACHINE_END
272 #endif