2 * arch/arm/mach-at91rm9200/at91rm9200.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
15 #include <asm/mach/arch.h>
16 #include <asm/mach/map.h>
18 #include <asm/hardware.h>
22 static struct map_desc at91rm9200_io_desc[] __initdata = {
24 .virtual = AT91_VA_BASE_SYS,
25 .pfn = __phys_to_pfn(AT91_BASE_SYS),
29 .virtual = AT91_VA_BASE_SPI,
30 .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
34 .virtual = AT91_VA_BASE_SSC2,
35 .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC2),
39 .virtual = AT91_VA_BASE_SSC1,
40 .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC1),
44 .virtual = AT91_VA_BASE_SSC0,
45 .pfn = __phys_to_pfn(AT91RM9200_BASE_SSC0),
49 .virtual = AT91_VA_BASE_US3,
50 .pfn = __phys_to_pfn(AT91RM9200_BASE_US3),
54 .virtual = AT91_VA_BASE_US2,
55 .pfn = __phys_to_pfn(AT91RM9200_BASE_US2),
59 .virtual = AT91_VA_BASE_US1,
60 .pfn = __phys_to_pfn(AT91RM9200_BASE_US1),
64 .virtual = AT91_VA_BASE_US0,
65 .pfn = __phys_to_pfn(AT91RM9200_BASE_US0),
69 .virtual = AT91_VA_BASE_EMAC,
70 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
74 .virtual = AT91_VA_BASE_TWI,
75 .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
79 .virtual = AT91_VA_BASE_MCI,
80 .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
84 .virtual = AT91_VA_BASE_UDP,
85 .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
89 .virtual = AT91_VA_BASE_TCB1,
90 .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB1),
94 .virtual = AT91_VA_BASE_TCB0,
95 .pfn = __phys_to_pfn(AT91RM9200_BASE_TCB0),
99 .virtual = AT91_SRAM_VIRT_BASE,
100 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
101 .length = AT91RM9200_SRAM_SIZE,
106 /* --------------------------------------------------------------------
108 * -------------------------------------------------------------------- */
111 * The peripheral clocks.
113 static struct clk udc_clk = {
115 .pmc_mask = 1 << AT91RM9200_ID_UDP,
116 .type = CLK_TYPE_PERIPHERAL,
118 static struct clk ohci_clk = {
120 .pmc_mask = 1 << AT91RM9200_ID_UHP,
121 .type = CLK_TYPE_PERIPHERAL,
123 static struct clk ether_clk = {
125 .pmc_mask = 1 << AT91RM9200_ID_EMAC,
126 .type = CLK_TYPE_PERIPHERAL,
128 static struct clk mmc_clk = {
130 .pmc_mask = 1 << AT91RM9200_ID_MCI,
131 .type = CLK_TYPE_PERIPHERAL,
133 static struct clk twi_clk = {
135 .pmc_mask = 1 << AT91RM9200_ID_TWI,
136 .type = CLK_TYPE_PERIPHERAL,
138 static struct clk usart0_clk = {
139 .name = "usart0_clk",
140 .pmc_mask = 1 << AT91RM9200_ID_US0,
141 .type = CLK_TYPE_PERIPHERAL,
143 static struct clk usart1_clk = {
144 .name = "usart1_clk",
145 .pmc_mask = 1 << AT91RM9200_ID_US1,
146 .type = CLK_TYPE_PERIPHERAL,
148 static struct clk usart2_clk = {
149 .name = "usart2_clk",
150 .pmc_mask = 1 << AT91RM9200_ID_US2,
151 .type = CLK_TYPE_PERIPHERAL,
153 static struct clk usart3_clk = {
154 .name = "usart3_clk",
155 .pmc_mask = 1 << AT91RM9200_ID_US3,
156 .type = CLK_TYPE_PERIPHERAL,
158 static struct clk spi_clk = {
160 .pmc_mask = 1 << AT91RM9200_ID_SPI,
161 .type = CLK_TYPE_PERIPHERAL,
163 static struct clk pioA_clk = {
165 .pmc_mask = 1 << AT91RM9200_ID_PIOA,
166 .type = CLK_TYPE_PERIPHERAL,
168 static struct clk pioB_clk = {
170 .pmc_mask = 1 << AT91RM9200_ID_PIOB,
171 .type = CLK_TYPE_PERIPHERAL,
173 static struct clk pioC_clk = {
175 .pmc_mask = 1 << AT91RM9200_ID_PIOC,
176 .type = CLK_TYPE_PERIPHERAL,
178 static struct clk pioD_clk = {
180 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
181 .type = CLK_TYPE_PERIPHERAL,
184 static struct clk *periph_clocks[] __initdata = {
205 * The four programmable clocks.
206 * You must configure pin multiplexing to bring these signals out.
208 static struct clk pck0 = {
210 .pmc_mask = AT91_PMC_PCK0,
211 .type = CLK_TYPE_PROGRAMMABLE,
214 static struct clk pck1 = {
216 .pmc_mask = AT91_PMC_PCK1,
217 .type = CLK_TYPE_PROGRAMMABLE,
220 static struct clk pck2 = {
222 .pmc_mask = AT91_PMC_PCK2,
223 .type = CLK_TYPE_PROGRAMMABLE,
226 static struct clk pck3 = {
228 .pmc_mask = AT91_PMC_PCK3,
229 .type = CLK_TYPE_PROGRAMMABLE,
233 static void __init at91rm9200_register_clocks(void)
237 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
238 clk_register(periph_clocks[i]);
246 /* --------------------------------------------------------------------
248 * -------------------------------------------------------------------- */
250 static struct at91_gpio_bank at91rm9200_gpio[] = {
252 .id = AT91RM9200_ID_PIOA,
256 .id = AT91RM9200_ID_PIOB,
260 .id = AT91RM9200_ID_PIOC,
264 .id = AT91RM9200_ID_PIOD,
270 /* --------------------------------------------------------------------
271 * AT91RM9200 processor initialization
272 * -------------------------------------------------------------------- */
273 void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
275 /* Map peripherals */
276 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
278 /* Init clock subsystem */
279 at91_clock_init(main_clock);
281 /* Register the processor-specific clocks */
282 at91rm9200_register_clocks();
284 /* Initialize GPIO subsystem */
285 at91_gpio_init(at91rm9200_gpio, banks);
289 /* --------------------------------------------------------------------
290 * Interrupt initialization
291 * -------------------------------------------------------------------- */
294 * The default interrupt priority levels (0 = lowest, 7 = highest).
296 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
297 7, /* Advanced Interrupt Controller (FIQ) */
298 7, /* System Peripherals */
299 0, /* Parallel IO Controller A */
300 0, /* Parallel IO Controller B */
301 0, /* Parallel IO Controller C */
302 0, /* Parallel IO Controller D */
307 0, /* Multimedia Card Interface */
308 4, /* USB Device Port */
309 0, /* Two-Wire Interface */
310 6, /* Serial Peripheral Interface */
311 5, /* Serial Synchronous Controller 0 */
312 5, /* Serial Synchronous Controller 1 */
313 5, /* Serial Synchronous Controller 2 */
314 0, /* Timer Counter 0 */
315 0, /* Timer Counter 1 */
316 0, /* Timer Counter 2 */
317 0, /* Timer Counter 3 */
318 0, /* Timer Counter 4 */
319 0, /* Timer Counter 5 */
320 3, /* USB Host port */
321 3, /* Ethernet MAC */
322 0, /* Advanced Interrupt Controller (IRQ0) */
323 0, /* Advanced Interrupt Controller (IRQ1) */
324 0, /* Advanced Interrupt Controller (IRQ2) */
325 0, /* Advanced Interrupt Controller (IRQ3) */
326 0, /* Advanced Interrupt Controller (IRQ4) */
327 0, /* Advanced Interrupt Controller (IRQ5) */
328 0 /* Advanced Interrupt Controller (IRQ6) */
331 void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
334 priority = at91rm9200_default_irq_priority;
336 /* Initialize the AIC interrupt controller */
337 at91_aic_init(priority);
339 /* Enable GPIO interrupts */
340 at91_gpio_irq_setup();