2 * arch/arm/mach-at91/pm.c
3 * AT91 Power Management
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/suspend.h>
14 #include <linux/sched.h>
15 #include <linux/proc_fs.h>
16 #include <linux/interrupt.h>
17 #include <linux/sysfs.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
23 #include <asm/atomic.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/irq.h>
26 #include <asm/mach-types.h>
28 #include <asm/arch/at91_pmc.h>
29 #include <asm/arch/gpio.h>
30 #include <asm/arch/cpu.h>
34 #ifdef CONFIG_ARCH_AT91RM9200
35 #include <asm/arch/at91rm9200_mc.h>
38 * The AT91RM9200 goes into self-refresh mode with this command, and will
39 * terminate self-refresh automatically on the next SDRAM access.
41 #define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1)
42 #define sdram_selfrefresh_disable() do {} while (0)
44 #elif defined(CONFIG_ARCH_AT91CAP9)
45 #include <asm/arch/at91cap9_ddrsdr.h>
49 static inline void sdram_selfrefresh_enable(void)
53 saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
55 lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
56 at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
59 #define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
62 #include <asm/arch/at91sam9_sdramc.h>
66 static inline void sdram_selfrefresh_enable(void)
70 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
72 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
73 at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
76 #define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
79 * FIXME: The AT91SAM9263 has a second EBI controller which may have
80 * additional SDRAM. pm_slowclock.S will require a similar fix.
86 static int at91_pm_valid_state(suspend_state_t state)
90 case PM_SUSPEND_STANDBY:
100 static suspend_state_t target_state;
103 * Called after processes are frozen, but before we shutdown devices.
105 static int at91_pm_begin(suspend_state_t state)
107 target_state = state;
112 * Verify that all the clocks are correct before entering
115 static int at91_pm_verify_clocks(void)
120 scsr = at91_sys_read(AT91_PMC_SCSR);
122 /* USB must not be using PLLB */
123 if (cpu_is_at91rm9200()) {
124 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
125 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
128 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) {
129 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
130 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
133 } else if (cpu_is_at91cap9()) {
134 if ((scsr & AT91CAP9_PMC_UHP) != 0) {
135 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
140 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
141 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
142 for (i = 0; i < 4; i++) {
145 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
148 css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
149 if (css != AT91_PMC_CSS_SLOW) {
150 pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
160 * Call this from platform driver suspend() to see how deeply to suspend.
161 * For example, some controllers (like OHCI) need one of the PLL clocks
162 * in order to act as a wakeup source, and those are not available when
163 * going into slow clock mode.
165 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
166 * the very same problem (but not using at91 main_clk), and it'd be better
167 * to add one generic API rather than lots of platform-specific ones.
169 int at91_suspend_entering_slow_clock(void)
171 return (target_state == PM_SUSPEND_MEM);
173 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
176 static void (*slow_clock)(void);
178 #ifdef CONFIG_AT91_SLOW_CLOCK
179 extern void at91_slow_clock(void);
180 extern u32 at91_slow_clock_sz;
184 static int at91_pm_enter(suspend_state_t state)
189 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
190 /* remember all the always-wake irqs */
191 (at91_sys_read(AT91_PMC_PCSR)
195 & at91_sys_read(AT91_AIC_IMR),
200 * Suspend-to-RAM is like STANDBY plus slow clock mode, so
201 * drivers must suspend more deeply: only the master clock
202 * controller may be using the main oscillator.
206 * Ensure that clocks are in a valid state.
208 if (!at91_pm_verify_clocks())
212 * Enter slow clock mode by switching over to clk32k and
213 * turning off the main oscillator; reverse on wakeup.
216 #ifdef CONFIG_AT91_SLOW_CLOCK
217 /* copy slow_clock handler to SRAM, and call it */
218 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
223 pr_info("AT91: PM - no slow clock mode enabled ...\n");
224 /* FALLTHROUGH leaving master clock alone */
228 * STANDBY mode has *all* drivers suspended; ignores irqs not
229 * marked as 'wakeup' event sources; and reduces DRAM power.
230 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and
231 * nothing fancy done with main or cpu clocks.
233 case PM_SUSPEND_STANDBY:
235 * NOTE: the Wait-for-Interrupt instruction needs to be
236 * in icache so no SDRAM accesses are needed until the
237 * wakeup IRQ occurs and self-refresh is terminated.
239 asm("b 1f; .align 5; 1:");
240 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
241 sdram_selfrefresh_enable();
242 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
243 sdram_selfrefresh_disable();
247 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
251 pr_debug("AT91: PM - bogus suspend state %d\n", state);
255 pr_debug("AT91: PM - wakeup %08x\n",
256 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
259 sdram_selfrefresh_disable();
260 target_state = PM_SUSPEND_ON;
267 * Called right prior to thawing processes.
269 static void at91_pm_end(void)
271 target_state = PM_SUSPEND_ON;
275 static struct platform_suspend_ops at91_pm_ops ={
276 .valid = at91_pm_valid_state,
277 .begin = at91_pm_begin,
278 .enter = at91_pm_enter,
282 static int __init at91_pm_init(void)
284 #ifdef CONFIG_AT91_SLOW_CLOCK
285 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
288 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
290 #ifdef CONFIG_ARCH_AT91RM9200
291 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
292 at91_sys_write(AT91_SDRAMC_LPR, 0);
295 suspend_set_ops(&at91_pm_ops);
299 arch_initcall(at91_pm_init);