2 * Copyright (C) 2007 Atmel Corporation
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive for
9 #include <asm/mach/arch.h>
10 #include <asm/mach/map.h>
12 #include <linux/platform_device.h>
15 #include <video/atmel_lcdc.h>
17 #include <asm/arch/board.h>
18 #include <asm/arch/gpio.h>
19 #include <asm/arch/at91sam9rl.h>
20 #include <asm/arch/at91sam9rl_matrix.h>
21 #include <asm/arch/at91sam926x_mc.h>
25 #define SZ_512 0x00000200
26 #define SZ_256 0x00000100
27 #define SZ_16 0x00000010
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
34 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
35 static u64 mmc_dmamask = 0xffffffffUL;
36 static struct at91_mmc_data mmc_data;
38 static struct resource mmc_resources[] = {
40 .start = AT91SAM9RL_BASE_MCI,
41 .end = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
42 .flags = IORESOURCE_MEM,
45 .start = AT91SAM9RL_ID_MCI,
46 .end = AT91SAM9RL_ID_MCI,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device at91sam9rl_mmc_device = {
55 .dma_mask = &mmc_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &mmc_data,
59 .resource = mmc_resources,
60 .num_resources = ARRAY_SIZE(mmc_resources),
63 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
70 at91_set_gpio_input(data->det_pin, 1);
71 at91_set_deglitch(data->det_pin, 1);
74 at91_set_gpio_input(data->wp_pin, 1);
76 at91_set_gpio_output(data->vcc_pin, 0);
79 at91_set_A_periph(AT91_PIN_PA2, 0);
82 at91_set_A_periph(AT91_PIN_PA1, 1);
84 /* DAT0, maybe DAT1..DAT3 */
85 at91_set_A_periph(AT91_PIN_PA0, 1);
87 at91_set_A_periph(AT91_PIN_PA3, 1);
88 at91_set_A_periph(AT91_PIN_PA4, 1);
89 at91_set_A_periph(AT91_PIN_PA5, 1);
93 platform_device_register(&at91sam9rl_mmc_device);
96 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
100 /* --------------------------------------------------------------------
102 * -------------------------------------------------------------------- */
104 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
105 static struct at91_nand_data nand_data;
107 #define NAND_BASE AT91_CHIPSELECT_3
109 static struct resource nand_resources[] = {
112 .end = NAND_BASE + SZ_256M - 1,
113 .flags = IORESOURCE_MEM,
117 static struct platform_device at91_nand_device = {
121 .platform_data = &nand_data,
123 .resource = nand_resources,
124 .num_resources = ARRAY_SIZE(nand_resources),
127 void __init at91_add_device_nand(struct at91_nand_data *data)
134 csa = at91_sys_read(AT91_MATRIX_EBICSA);
135 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
137 /* set the bus interface characteristics */
138 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
139 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
141 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
142 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
144 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
146 at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
149 if (data->enable_pin)
150 at91_set_gpio_output(data->enable_pin, 1);
154 at91_set_gpio_input(data->rdy_pin, 1);
156 /* card detect pin */
158 at91_set_gpio_input(data->det_pin, 1);
160 at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */
161 at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */
164 platform_device_register(&at91_nand_device);
168 void __init at91_add_device_nand(struct at91_nand_data *data) {}
172 /* --------------------------------------------------------------------
174 * -------------------------------------------------------------------- */
176 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
178 static struct resource twi_resources[] = {
180 .start = AT91SAM9RL_BASE_TWI0,
181 .end = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
182 .flags = IORESOURCE_MEM,
185 .start = AT91SAM9RL_ID_TWI0,
186 .end = AT91SAM9RL_ID_TWI0,
187 .flags = IORESOURCE_IRQ,
191 static struct platform_device at91sam9rl_twi_device = {
194 .resource = twi_resources,
195 .num_resources = ARRAY_SIZE(twi_resources),
198 void __init at91_add_device_i2c(void)
200 /* pins used for TWI interface */
201 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
202 at91_set_multi_drive(AT91_PIN_PA23, 1);
204 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
205 at91_set_multi_drive(AT91_PIN_PA24, 1);
207 platform_device_register(&at91sam9rl_twi_device);
210 void __init at91_add_device_i2c(void) {}
214 /* --------------------------------------------------------------------
216 * -------------------------------------------------------------------- */
218 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
219 static u64 spi_dmamask = 0xffffffffUL;
221 static struct resource spi_resources[] = {
223 .start = AT91SAM9RL_BASE_SPI,
224 .end = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
225 .flags = IORESOURCE_MEM,
228 .start = AT91SAM9RL_ID_SPI,
229 .end = AT91SAM9RL_ID_SPI,
230 .flags = IORESOURCE_IRQ,
234 static struct platform_device at91sam9rl_spi_device = {
238 .dma_mask = &spi_dmamask,
239 .coherent_dma_mask = 0xffffffff,
241 .resource = spi_resources,
242 .num_resources = ARRAY_SIZE(spi_resources),
245 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
248 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
251 unsigned long cs_pin;
253 at91_set_A_periph(AT91_PIN_PA25, 0); /* MISO */
254 at91_set_A_periph(AT91_PIN_PA26, 0); /* MOSI */
255 at91_set_A_periph(AT91_PIN_PA27, 0); /* SPCK */
257 /* Enable SPI chip-selects */
258 for (i = 0; i < nr_devices; i++) {
259 if (devices[i].controller_data)
260 cs_pin = (unsigned long) devices[i].controller_data;
262 cs_pin = spi_standard_cs[devices[i].chip_select];
264 /* enable chip-select pin */
265 at91_set_gpio_output(cs_pin, 1);
267 /* pass chip-select pin to driver */
268 devices[i].controller_data = (void *) cs_pin;
271 spi_register_board_info(devices, nr_devices);
272 platform_device_register(&at91sam9rl_spi_device);
275 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
279 /* --------------------------------------------------------------------
281 * -------------------------------------------------------------------- */
283 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
284 static u64 lcdc_dmamask = 0xffffffffUL;
285 static struct atmel_lcdfb_info lcdc_data;
287 static struct resource lcdc_resources[] = {
289 .start = AT91SAM9RL_LCDC_BASE,
290 .end = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
291 .flags = IORESOURCE_MEM,
294 .start = AT91SAM9RL_ID_LCDC,
295 .end = AT91SAM9RL_ID_LCDC,
296 .flags = IORESOURCE_IRQ,
298 #if defined(CONFIG_FB_INTSRAM)
300 .start = AT91SAM9RL_SRAM_BASE,
301 .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
302 .flags = IORESOURCE_MEM,
307 static struct platform_device at91_lcdc_device = {
308 .name = "atmel_lcdfb",
311 .dma_mask = &lcdc_dmamask,
312 .coherent_dma_mask = 0xffffffff,
313 .platform_data = &lcdc_data,
315 .resource = lcdc_resources,
316 .num_resources = ARRAY_SIZE(lcdc_resources),
319 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
325 at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */
326 at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */
327 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */
328 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */
329 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */
330 at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */
331 at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */
332 at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */
333 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */
334 at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */
335 at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */
336 at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */
337 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */
338 at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */
339 at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */
340 at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */
341 at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */
342 at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */
343 at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */
344 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
345 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
348 platform_device_register(&at91_lcdc_device);
351 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
355 /* --------------------------------------------------------------------
357 * -------------------------------------------------------------------- */
359 #if defined(CONFIG_LEDS)
363 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
365 /* Enable GPIO to access the LEDs */
366 at91_set_gpio_output(cpu_led, 1);
367 at91_set_gpio_output(timer_led, 1);
369 at91_leds_cpu = cpu_led;
370 at91_leds_timer = timer_led;
373 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
377 /* --------------------------------------------------------------------
379 * -------------------------------------------------------------------- */
381 #if defined(CONFIG_SERIAL_ATMEL)
382 static struct resource dbgu_resources[] = {
384 .start = AT91_VA_BASE_SYS + AT91_DBGU,
385 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
386 .flags = IORESOURCE_MEM,
389 .start = AT91_ID_SYS,
391 .flags = IORESOURCE_IRQ,
395 static struct atmel_uart_data dbgu_data = {
397 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
398 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
401 static struct platform_device at91sam9rl_dbgu_device = {
402 .name = "atmel_usart",
405 .platform_data = &dbgu_data,
406 .coherent_dma_mask = 0xffffffff,
408 .resource = dbgu_resources,
409 .num_resources = ARRAY_SIZE(dbgu_resources),
412 static inline void configure_dbgu_pins(void)
414 at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */
415 at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */
418 static struct resource uart0_resources[] = {
420 .start = AT91SAM9RL_BASE_US0,
421 .end = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
422 .flags = IORESOURCE_MEM,
425 .start = AT91SAM9RL_ID_US0,
426 .end = AT91SAM9RL_ID_US0,
427 .flags = IORESOURCE_IRQ,
431 static struct atmel_uart_data uart0_data = {
436 static struct platform_device at91sam9rl_uart0_device = {
437 .name = "atmel_usart",
440 .platform_data = &uart0_data,
441 .coherent_dma_mask = 0xffffffff,
443 .resource = uart0_resources,
444 .num_resources = ARRAY_SIZE(uart0_resources),
447 static inline void configure_usart0_pins(void)
449 at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */
450 at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */
451 at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */
452 at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */
455 static struct resource uart1_resources[] = {
457 .start = AT91SAM9RL_BASE_US1,
458 .end = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
459 .flags = IORESOURCE_MEM,
462 .start = AT91SAM9RL_ID_US1,
463 .end = AT91SAM9RL_ID_US1,
464 .flags = IORESOURCE_IRQ,
468 static struct atmel_uart_data uart1_data = {
473 static struct platform_device at91sam9rl_uart1_device = {
474 .name = "atmel_usart",
477 .platform_data = &uart1_data,
478 .coherent_dma_mask = 0xffffffff,
480 .resource = uart1_resources,
481 .num_resources = ARRAY_SIZE(uart1_resources),
484 static inline void configure_usart1_pins(void)
486 at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */
487 at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */
490 static struct resource uart2_resources[] = {
492 .start = AT91SAM9RL_BASE_US2,
493 .end = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
494 .flags = IORESOURCE_MEM,
497 .start = AT91SAM9RL_ID_US2,
498 .end = AT91SAM9RL_ID_US2,
499 .flags = IORESOURCE_IRQ,
503 static struct atmel_uart_data uart2_data = {
508 static struct platform_device at91sam9rl_uart2_device = {
509 .name = "atmel_usart",
512 .platform_data = &uart2_data,
513 .coherent_dma_mask = 0xffffffff,
515 .resource = uart2_resources,
516 .num_resources = ARRAY_SIZE(uart2_resources),
519 static inline void configure_usart2_pins(void)
521 at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */
522 at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */
525 static struct resource uart3_resources[] = {
527 .start = AT91SAM9RL_BASE_US3,
528 .end = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
529 .flags = IORESOURCE_MEM,
532 .start = AT91SAM9RL_ID_US3,
533 .end = AT91SAM9RL_ID_US3,
534 .flags = IORESOURCE_IRQ,
538 static struct atmel_uart_data uart3_data = {
543 static struct platform_device at91sam9rl_uart3_device = {
544 .name = "atmel_usart",
547 .platform_data = &uart3_data,
548 .coherent_dma_mask = 0xffffffff,
550 .resource = uart3_resources,
551 .num_resources = ARRAY_SIZE(uart3_resources),
554 static inline void configure_usart3_pins(void)
556 at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */
557 at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */
560 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
561 struct platform_device *atmel_default_console_device; /* the serial console device */
563 void __init at91_init_serial(struct at91_uart_config *config)
567 /* Fill in list of supported UARTs */
568 for (i = 0; i < config->nr_tty; i++) {
569 switch (config->tty_map[i]) {
571 configure_usart0_pins();
572 at91_uarts[i] = &at91sam9rl_uart0_device;
573 at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
576 configure_usart1_pins();
577 at91_uarts[i] = &at91sam9rl_uart1_device;
578 at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
581 configure_usart2_pins();
582 at91_uarts[i] = &at91sam9rl_uart2_device;
583 at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
586 configure_usart3_pins();
587 at91_uarts[i] = &at91sam9rl_uart3_device;
588 at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
591 configure_dbgu_pins();
592 at91_uarts[i] = &at91sam9rl_dbgu_device;
593 at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
598 at91_uarts[i]->id = i; /* update ID number to mapped ID */
601 /* Set serial console device */
602 if (config->console_tty < ATMEL_MAX_UART)
603 atmel_default_console_device = at91_uarts[config->console_tty];
604 if (!atmel_default_console_device)
605 printk(KERN_INFO "AT91: No default serial console defined.\n");
608 void __init at91_add_device_serial(void)
612 for (i = 0; i < ATMEL_MAX_UART; i++) {
614 platform_device_register(at91_uarts[i]);
618 void __init at91_init_serial(struct at91_uart_config *config) {}
619 void __init at91_add_device_serial(void) {}
623 /* -------------------------------------------------------------------- */
626 * These devices are always present and don't need any board-specific
629 static int __init at91_add_standard_devices(void)
634 arch_initcall(at91_add_standard_devices);