arch/arm/mach-at91/at91sam9263_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9263_devices.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/i2c-gpio.h>
  18
  19 #include <linux/fb.h>
  20 #include <video/atmel_lcdc.h>
  21
  22 #include <asm/arch/board.h>
  23 #include <asm/arch/gpio.h>
  24 #include <asm/arch/at91sam9263.h>
  25 #include <asm/arch/at91sam926x_mc.h>
  26 #include <asm/arch/at91sam9263_matrix.h>
  27
  28 #include "generic.h"
  29
  30
  31 /* --------------------------------------------------------------------
  32  *  USB Host
  33  * -------------------------------------------------------------------- */
  34
  35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  36 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  37 static struct at91_usbh_data usbh_data;
  38
  39 static struct resource usbh_resources[] = {
  40         [0] = {
  41                 .start  = AT91SAM9263_UHP_BASE,
  42                 .end    = AT91SAM9263_UHP_BASE + SZ_1M - 1,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = {
  46                 .start  = AT91SAM9263_ID_UHP,
  47                 .end    = AT91SAM9263_ID_UHP,
  48                 .flags  = IORESOURCE_IRQ,
  49         },
  50 };
  51
  52 static struct platform_device at91_usbh_device = {
  53         .name           = "at91_ohci",
  54         .id             = -1,
  55         .dev            = {
  56                                 .dma_mask               = &ohci_dmamask,
  57                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  58                                 .platform_data          = &usbh_data,
  59         },
  60         .resource       = usbh_resources,
  61         .num_resources  = ARRAY_SIZE(usbh_resources),
  62 };
  63
  64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  65 {
  66         int i;
  67
  68         if (!data)
  69                 return;
  70
  71         /* Enable VBus control for UHP ports */
  72         for (i = 0; i < data->ports; i++) {
  73                 if (data->vbus_pin[i])
  74                         at91_set_gpio_output(data->vbus_pin[i], 0);
  75         }
  76
  77         usbh_data = *data;
  78         platform_device_register(&at91_usbh_device);
  79 }
  80 #else
  81 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  82 #endif
  83
  84
  85 /* --------------------------------------------------------------------
  86  *  USB Device (Gadget)
  87  * -------------------------------------------------------------------- */
  88
  89 #ifdef CONFIG_USB_GADGET_AT91
  90 static struct at91_udc_data udc_data;
  91
  92 static struct resource udc_resources[] = {
  93         [0] = {
  94                 .start  = AT91SAM9263_BASE_UDP,
  95                 .end    = AT91SAM9263_BASE_UDP + SZ_16K - 1,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98         [1] = {
  99                 .start  = AT91SAM9263_ID_UDP,
 100                 .end    = AT91SAM9263_ID_UDP,
 101                 .flags  = IORESOURCE_IRQ,
 102         },
 103 };
 104
 105 static struct platform_device at91_udc_device = {
 106         .name           = "at91_udc",
 107         .id             = -1,
 108         .dev            = {
 109                                 .platform_data          = &udc_data,
 110         },
 111         .resource       = udc_resources,
 112         .num_resources  = ARRAY_SIZE(udc_resources),
 113 };
 114
 115 void __init at91_add_device_udc(struct at91_udc_data *data)
 116 {
 117         if (!data)
 118                 return;
 119
 120         if (data->vbus_pin) {
 121                 at91_set_gpio_input(data->vbus_pin, 0);
 122                 at91_set_deglitch(data->vbus_pin, 1);
 123         }
 124
 125         /* Pullup pin is handled internally by USB device peripheral */
 126
 127         udc_data = *data;
 128         platform_device_register(&at91_udc_device);
 129 }
 130 #else
 131 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 132 #endif
 133
 134
 135 /* --------------------------------------------------------------------
 136  *  Ethernet
 137  * -------------------------------------------------------------------- */
 138
 139 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 140 static u64 eth_dmamask = DMA_BIT_MASK(32);
 141 static struct at91_eth_data eth_data;
 142
 143 static struct resource eth_resources[] = {
 144         [0] = {
 145                 .start  = AT91SAM9263_BASE_EMAC,
 146                 .end    = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149         [1] = {
 150                 .start  = AT91SAM9263_ID_EMAC,
 151                 .end    = AT91SAM9263_ID_EMAC,
 152                 .flags  = IORESOURCE_IRQ,
 153         },
 154 };
 155
 156 static struct platform_device at91sam9263_eth_device = {
 157         .name           = "macb",
 158         .id             = -1,
 159         .dev            = {
 160                                 .dma_mask               = &eth_dmamask,
 161                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 162                                 .platform_data          = &eth_data,
 163         },
 164         .resource       = eth_resources,
 165         .num_resources  = ARRAY_SIZE(eth_resources),
 166 };
 167
 168 void __init at91_add_device_eth(struct at91_eth_data *data)
 169 {
 170         if (!data)
 171                 return;
 172
 173         if (data->phy_irq_pin) {
 174                 at91_set_gpio_input(data->phy_irq_pin, 0);
 175                 at91_set_deglitch(data->phy_irq_pin, 1);
 176         }
 177
 178         /* Pins used for MII and RMII */
 179         at91_set_A_periph(AT91_PIN_PE21, 0);    /* ETXCK_EREFCK */
 180         at91_set_B_periph(AT91_PIN_PC25, 0);    /* ERXDV */
 181         at91_set_A_periph(AT91_PIN_PE25, 0);    /* ERX0 */
 182         at91_set_A_periph(AT91_PIN_PE26, 0);    /* ERX1 */
 183         at91_set_A_periph(AT91_PIN_PE27, 0);    /* ERXER */
 184         at91_set_A_periph(AT91_PIN_PE28, 0);    /* ETXEN */
 185         at91_set_A_periph(AT91_PIN_PE23, 0);    /* ETX0 */
 186         at91_set_A_periph(AT91_PIN_PE24, 0);    /* ETX1 */
 187         at91_set_A_periph(AT91_PIN_PE30, 0);    /* EMDIO */
 188         at91_set_A_periph(AT91_PIN_PE29, 0);    /* EMDC */
 189
 190         if (!data->is_rmii) {
 191                 at91_set_A_periph(AT91_PIN_PE22, 0);    /* ECRS */
 192                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
 193                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
 194                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
 195                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
 196                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
 197                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
 198                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
 199         }
 200
 201         eth_data = *data;
 202         platform_device_register(&at91sam9263_eth_device);
 203 }
 204 #else
 205 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 206 #endif
 207
 208
 209 /* --------------------------------------------------------------------
 210  *  MMC / SD
 211  * -------------------------------------------------------------------- */
 212
 213 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 214 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 215 static struct at91_mmc_data mmc0_data, mmc1_data;
 216
 217 static struct resource mmc0_resources[] = {
 218         [0] = {
 219                 .start  = AT91SAM9263_BASE_MCI0,
 220                 .end    = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
 221                 .flags  = IORESOURCE_MEM,
 222         },
 223         [1] = {
 224                 .start  = AT91SAM9263_ID_MCI0,
 225                 .end    = AT91SAM9263_ID_MCI0,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct platform_device at91sam9263_mmc0_device = {
 231         .name           = "at91_mci",
 232         .id             = 0,
 233         .dev            = {
 234                                 .dma_mask               = &mmc_dmamask,
 235                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 236                                 .platform_data          = &mmc0_data,
 237         },
 238         .resource       = mmc0_resources,
 239         .num_resources  = ARRAY_SIZE(mmc0_resources),
 240 };
 241
 242 static struct resource mmc1_resources[] = {
 243         [0] = {
 244                 .start  = AT91SAM9263_BASE_MCI1,
 245                 .end    = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248         [1] = {
 249                 .start  = AT91SAM9263_ID_MCI1,
 250                 .end    = AT91SAM9263_ID_MCI1,
 251                 .flags  = IORESOURCE_IRQ,
 252         },
 253 };
 254
 255 static struct platform_device at91sam9263_mmc1_device = {
 256         .name           = "at91_mci",
 257         .id             = 1,
 258         .dev            = {
 259                                 .dma_mask               = &mmc_dmamask,
 260                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 261                                 .platform_data          = &mmc1_data,
 262         },
 263         .resource       = mmc1_resources,
 264         .num_resources  = ARRAY_SIZE(mmc1_resources),
 265 };
 266
 267 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 268 {
 269         if (!data)
 270                 return;
 271
 272         /* input/irq */
 273         if (data->det_pin) {
 274                 at91_set_gpio_input(data->det_pin, 1);
 275                 at91_set_deglitch(data->det_pin, 1);
 276         }
 277         if (data->wp_pin)
 278                 at91_set_gpio_input(data->wp_pin, 1);
 279         if (data->vcc_pin)
 280                 at91_set_gpio_output(data->vcc_pin, 0);
 281
 282         if (mmc_id == 0) {              /* MCI0 */
 283                 /* CLK */
 284                 at91_set_A_periph(AT91_PIN_PA12, 0);
 285
 286                 if (data->slot_b) {
 287                         /* CMD */
 288                         at91_set_A_periph(AT91_PIN_PA16, 1);
 289
 290                         /* DAT0, maybe DAT1..DAT3 */
 291                         at91_set_A_periph(AT91_PIN_PA17, 1);
 292                         if (data->wire4) {
 293                                 at91_set_A_periph(AT91_PIN_PA18, 1);
 294                                 at91_set_A_periph(AT91_PIN_PA19, 1);
 295                                 at91_set_A_periph(AT91_PIN_PA20, 1);
 296                         }
 297                 } else {
 298                         /* CMD */
 299                         at91_set_A_periph(AT91_PIN_PA1, 1);
 300
 301                         /* DAT0, maybe DAT1..DAT3 */
 302                         at91_set_A_periph(AT91_PIN_PA0, 1);
 303                         if (data->wire4) {
 304                                 at91_set_A_periph(AT91_PIN_PA3, 1);
 305                                 at91_set_A_periph(AT91_PIN_PA4, 1);
 306                                 at91_set_A_periph(AT91_PIN_PA5, 1);
 307                         }
 308                 }
 309
 310                 mmc0_data = *data;
 311                 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
 312                 platform_device_register(&at91sam9263_mmc0_device);
 313         } else {                        /* MCI1 */
 314                 /* CLK */
 315                 at91_set_A_periph(AT91_PIN_PA6, 0);
 316
 317                 if (data->slot_b) {
 318                         /* CMD */
 319                         at91_set_A_periph(AT91_PIN_PA21, 1);
 320
 321                         /* DAT0, maybe DAT1..DAT3 */
 322                         at91_set_A_periph(AT91_PIN_PA22, 1);
 323                         if (data->wire4) {
 324                                 at91_set_A_periph(AT91_PIN_PA23, 1);
 325                                 at91_set_A_periph(AT91_PIN_PA24, 1);
 326                                 at91_set_A_periph(AT91_PIN_PA25, 1);
 327                         }
 328                 } else {
 329                         /* CMD */
 330                         at91_set_A_periph(AT91_PIN_PA7, 1);
 331
 332                         /* DAT0, maybe DAT1..DAT3 */
 333                         at91_set_A_periph(AT91_PIN_PA8, 1);
 334                         if (data->wire4) {
 335                                 at91_set_A_periph(AT91_PIN_PA9, 1);
 336                                 at91_set_A_periph(AT91_PIN_PA10, 1);
 337                                 at91_set_A_periph(AT91_PIN_PA11, 1);
 338                         }
 339                 }
 340
 341                 mmc1_data = *data;
 342                 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
 343                 platform_device_register(&at91sam9263_mmc1_device);
 344         }
 345 }
 346 #else
 347 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 348 #endif
 349
 350
 351 /* --------------------------------------------------------------------
 352  *  NAND / SmartMedia
 353  * -------------------------------------------------------------------- */
 354
 355 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 356 static struct at91_nand_data nand_data;
 357
 358 #define NAND_BASE       AT91_CHIPSELECT_3
 359
 360 static struct resource nand_resources[] = {
 361         {
 362                 .start  = NAND_BASE,
 363                 .end    = NAND_BASE + SZ_256M - 1,
 364                 .flags  = IORESOURCE_MEM,
 365         }
 366 };
 367
 368 static struct platform_device at91sam9263_nand_device = {
 369         .name           = "at91_nand",
 370         .id             = -1,
 371         .dev            = {
 372                                 .platform_data  = &nand_data,
 373         },
 374         .resource       = nand_resources,
 375         .num_resources  = ARRAY_SIZE(nand_resources),
 376 };
 377
 378 void __init at91_add_device_nand(struct at91_nand_data *data)
 379 {
 380         unsigned long csa, mode;
 381
 382         if (!data)
 383                 return;
 384
 385         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
 386         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 387
 388         /* set the bus interface characteristics */
 389         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
 390                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
 391
 392         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
 393                         | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
 394
 395         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
 396
 397         if (data->bus_width_16)
 398                 mode = AT91_SMC_DBW_16;
 399         else
 400                 mode = AT91_SMC_DBW_8;
 401         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
 402
 403         /* enable pin */
 404         if (data->enable_pin)
 405                 at91_set_gpio_output(data->enable_pin, 1);
 406
 407         /* ready/busy pin */
 408         if (data->rdy_pin)
 409                 at91_set_gpio_input(data->rdy_pin, 1);
 410
 411         /* card detect pin */
 412         if (data->det_pin)
 413                 at91_set_gpio_input(data->det_pin, 1);
 414
 415         nand_data = *data;
 416         platform_device_register(&at91sam9263_nand_device);
 417 }
 418 #else
 419 void __init at91_add_device_nand(struct at91_nand_data *data) {}
 420 #endif
 421
 422
 423 /* --------------------------------------------------------------------
 424  *  TWI (i2c)
 425  * -------------------------------------------------------------------- */
 426
 427 /*
 428  * Prefer the GPIO code since the TWI controller isn't robust
 429  * (gets overruns and underruns under load) and can only issue
 430  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 431  */
 432 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 433
 434 static struct i2c_gpio_platform_data pdata = {
 435         .sda_pin                = AT91_PIN_PB4,
 436         .sda_is_open_drain      = 1,
 437         .scl_pin                = AT91_PIN_PB5,
 438         .scl_is_open_drain      = 1,
 439         .udelay                 = 2,            /* ~100 kHz */
 440 };
 441
 442 static struct platform_device at91sam9263_twi_device = {
 443         .name                   = "i2c-gpio",
 444         .id                     = -1,
 445         .dev.platform_data      = &pdata,
 446 };
 447
 448 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 449 {
 450         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
 451         at91_set_multi_drive(AT91_PIN_PB4, 1);
 452
 453         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
 454         at91_set_multi_drive(AT91_PIN_PB5, 1);
 455
 456         i2c_register_board_info(0, devices, nr_devices);
 457         platform_device_register(&at91sam9263_twi_device);
 458 }
 459
 460 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 461
 462 static struct resource twi_resources[] = {
 463         [0] = {
 464                 .start  = AT91SAM9263_BASE_TWI,
 465                 .end    = AT91SAM9263_BASE_TWI + SZ_16K - 1,
 466                 .flags  = IORESOURCE_MEM,
 467         },
 468         [1] = {
 469                 .start  = AT91SAM9263_ID_TWI,
 470                 .end    = AT91SAM9263_ID_TWI,
 471                 .flags  = IORESOURCE_IRQ,
 472         },
 473 };
 474
 475 static struct platform_device at91sam9263_twi_device = {
 476         .name           = "at91_i2c",
 477         .id             = -1,
 478         .resource       = twi_resources,
 479         .num_resources  = ARRAY_SIZE(twi_resources),
 480 };
 481
 482 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 483 {
 484         /* pins used for TWI interface */
 485         at91_set_A_periph(AT91_PIN_PB4, 0);             /* TWD */
 486         at91_set_multi_drive(AT91_PIN_PB4, 1);
 487
 488         at91_set_A_periph(AT91_PIN_PB5, 0);             /* TWCK */
 489         at91_set_multi_drive(AT91_PIN_PB5, 1);
 490
 491         i2c_register_board_info(0, devices, nr_devices);
 492         platform_device_register(&at91sam9263_twi_device);
 493 }
 494 #else
 495 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 496 #endif
 497
 498
 499 /* --------------------------------------------------------------------
 500  *  SPI
 501  * -------------------------------------------------------------------- */
 502
 503 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 504 static u64 spi_dmamask = DMA_BIT_MASK(32);
 505
 506 static struct resource spi0_resources[] = {
 507         [0] = {
 508                 .start  = AT91SAM9263_BASE_SPI0,
 509                 .end    = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
 510                 .flags  = IORESOURCE_MEM,
 511         },
 512         [1] = {
 513                 .start  = AT91SAM9263_ID_SPI0,
 514                 .end    = AT91SAM9263_ID_SPI0,
 515                 .flags  = IORESOURCE_IRQ,
 516         },
 517 };
 518
 519 static struct platform_device at91sam9263_spi0_device = {
 520         .name           = "atmel_spi",
 521         .id             = 0,
 522         .dev            = {
 523                                 .dma_mask               = &spi_dmamask,
 524                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 525         },
 526         .resource       = spi0_resources,
 527         .num_resources  = ARRAY_SIZE(spi0_resources),
 528 };
 529
 530 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
 531
 532 static struct resource spi1_resources[] = {
 533         [0] = {
 534                 .start  = AT91SAM9263_BASE_SPI1,
 535                 .end    = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
 536                 .flags  = IORESOURCE_MEM,
 537         },
 538         [1] = {
 539                 .start  = AT91SAM9263_ID_SPI1,
 540                 .end    = AT91SAM9263_ID_SPI1,
 541                 .flags  = IORESOURCE_IRQ,
 542         },
 543 };
 544
 545 static struct platform_device at91sam9263_spi1_device = {
 546         .name           = "atmel_spi",
 547         .id             = 1,
 548         .dev            = {
 549                                 .dma_mask               = &spi_dmamask,
 550                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 551         },
 552         .resource       = spi1_resources,
 553         .num_resources  = ARRAY_SIZE(spi1_resources),
 554 };
 555
 556 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
 557
 558 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 559 {
 560         int i;
 561         unsigned long cs_pin;
 562         short enable_spi0 = 0;
 563         short enable_spi1 = 0;
 564
 565         /* Choose SPI chip-selects */
 566         for (i = 0; i < nr_devices; i++) {
 567                 if (devices[i].controller_data)
 568                         cs_pin = (unsigned long) devices[i].controller_data;
 569                 else if (devices[i].bus_num == 0)
 570                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 571                 else
 572                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 573
 574                 if (devices[i].bus_num == 0)
 575                         enable_spi0 = 1;
 576                 else
 577                         enable_spi1 = 1;
 578
 579                 /* enable chip-select pin */
 580                 at91_set_gpio_output(cs_pin, 1);
 581
 582                 /* pass chip-select pin to driver */
 583                 devices[i].controller_data = (void *) cs_pin;
 584         }
 585
 586         spi_register_board_info(devices, nr_devices);
 587
 588         /* Configure SPI bus(es) */
 589         if (enable_spi0) {
 590                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 591                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 592                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 593
 594                 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
 595                 platform_device_register(&at91sam9263_spi0_device);
 596         }
 597         if (enable_spi1) {
 598                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
 599                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
 600                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 601
 602                 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
 603                 platform_device_register(&at91sam9263_spi1_device);
 604         }
 605 }
 606 #else
 607 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 608 #endif
 609
 610
 611 /* --------------------------------------------------------------------
 612  *  AC97
 613  * -------------------------------------------------------------------- */
 614
 615 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
 616 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 617 static struct atmel_ac97_data ac97_data;
 618
 619 static struct resource ac97_resources[] = {
 620         [0] = {
 621                 .start  = AT91SAM9263_BASE_AC97C,
 622                 .end    = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
 623                 .flags  = IORESOURCE_MEM,
 624         },
 625         [1] = {
 626                 .start  = AT91SAM9263_ID_AC97C,
 627                 .end    = AT91SAM9263_ID_AC97C,
 628                 .flags  = IORESOURCE_IRQ,
 629         },
 630 };
 631
 632 static struct platform_device at91sam9263_ac97_device = {
 633         .name           = "ac97c",
 634         .id             = 1,
 635         .dev            = {
 636                                 .dma_mask               = &ac97_dmamask,
 637                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 638                                 .platform_data          = &ac97_data,
 639         },
 640         .resource       = ac97_resources,
 641         .num_resources  = ARRAY_SIZE(ac97_resources),
 642 };
 643
 644 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
 645 {
 646         if (!data)
 647                 return;
 648
 649         at91_set_A_periph(AT91_PIN_PB0, 0);     /* AC97FS */
 650         at91_set_A_periph(AT91_PIN_PB1, 0);     /* AC97CK */
 651         at91_set_A_periph(AT91_PIN_PB2, 0);     /* AC97TX */
 652         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 653
 654         /* reset */
 655         if (data->reset_pin)
 656                 at91_set_gpio_output(data->reset_pin, 0);
 657
 658         ac97_data = *ek_data;
 659         platform_device_register(&at91sam9263_ac97_device);
 660 }
 661 #else
 662 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
 663 #endif
 664
 665
 666 /* --------------------------------------------------------------------
 667  *  LCD Controller
 668  * -------------------------------------------------------------------- */
 669
 670 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 671 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 672 static struct atmel_lcdfb_info lcdc_data;
 673
 674 static struct resource lcdc_resources[] = {
 675         [0] = {
 676                 .start  = AT91SAM9263_LCDC_BASE,
 677                 .end    = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
 678                 .flags  = IORESOURCE_MEM,
 679         },
 680         [1] = {
 681                 .start  = AT91SAM9263_ID_LCDC,
 682                 .end    = AT91SAM9263_ID_LCDC,
 683                 .flags  = IORESOURCE_IRQ,
 684         },
 685 };
 686
 687 static struct platform_device at91_lcdc_device = {
 688         .name           = "atmel_lcdfb",
 689         .id             = 0,
 690         .dev            = {
 691                                 .dma_mask               = &lcdc_dmamask,
 692                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 693                                 .platform_data          = &lcdc_data,
 694         },
 695         .resource       = lcdc_resources,
 696         .num_resources  = ARRAY_SIZE(lcdc_resources),
 697 };
 698
 699 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 700 {
 701         if (!data)
 702                 return;
 703
 704         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
 705         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
 706         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 707         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
 708         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
 709         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
 710         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
 711         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
 712         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
 713         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
 714         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
 715         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 716         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 717         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
 718         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 719         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 720         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
 721         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
 722         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
 723         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
 724         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
 725         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
 726
 727         lcdc_data = *data;
 728         platform_device_register(&at91_lcdc_device);
 729 }
 730 #else
 731 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 732 #endif
 733
 734
 735 /* --------------------------------------------------------------------
 736  *  Image Sensor Interface
 737  * -------------------------------------------------------------------- */
 738
 739 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
 740
 741 struct resource isi_resources[] = {
 742         [0] = {
 743                 .start  = AT91SAM9263_BASE_ISI,
 744                 .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
 745                 .flags  = IORESOURCE_MEM,
 746         },
 747         [1] = {
 748                 .start  = AT91SAM9263_ID_ISI,
 749                 .end    = AT91SAM9263_ID_ISI,
 750                 .flags  = IORESOURCE_IRQ,
 751         },
 752 };
 753
 754 static struct platform_device at91sam9263_isi_device = {
 755         .name           = "at91_isi",
 756         .id             = -1,
 757         .resource       = isi_resources,
 758         .num_resources  = ARRAY_SIZE(isi_resources),
 759 };
 760
 761 void __init at91_add_device_isi(void)
 762 {
 763         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
 764         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
 765         at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
 766         at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
 767         at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
 768         at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
 769         at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
 770         at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
 771         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
 772         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
 773         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
 774         at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
 775         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
 776         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
 777         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
 778         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
 779 }
 780 #else
 781 void __init at91_add_device_isi(void) {}
 782 #endif
 783
 784
 785 /* --------------------------------------------------------------------
 786  *  RTT
 787  * -------------------------------------------------------------------- */
 788
 789 static struct resource rtt0_resources[] = {
 790         {
 791                 .start  = AT91_BASE_SYS + AT91_RTT0,
 792                 .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
 793                 .flags  = IORESOURCE_MEM,
 794         }
 795 };
 796
 797 static struct platform_device at91sam9263_rtt0_device = {
 798         .name           = "at91_rtt",
 799         .id             = 0,
 800         .resource       = rtt0_resources,
 801         .num_resources  = ARRAY_SIZE(rtt0_resources),
 802 };
 803
 804 static struct resource rtt1_resources[] = {
 805         {
 806                 .start  = AT91_BASE_SYS + AT91_RTT1,
 807                 .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
 808                 .flags  = IORESOURCE_MEM,
 809         }
 810 };
 811
 812 static struct platform_device at91sam9263_rtt1_device = {
 813         .name           = "at91_rtt",
 814         .id             = 1,
 815         .resource       = rtt1_resources,
 816         .num_resources  = ARRAY_SIZE(rtt1_resources),
 817 };
 818
 819 static void __init at91_add_device_rtt(void)
 820 {
 821         platform_device_register(&at91sam9263_rtt0_device);
 822         platform_device_register(&at91sam9263_rtt1_device);
 823 }
 824
 825
 826 /* --------------------------------------------------------------------
 827  *  Watchdog
 828  * -------------------------------------------------------------------- */
 829
 830 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 831 static struct platform_device at91sam9263_wdt_device = {
 832         .name           = "at91_wdt",
 833         .id             = -1,
 834         .num_resources  = 0,
 835 };
 836
 837 static void __init at91_add_device_watchdog(void)
 838 {
 839         platform_device_register(&at91sam9263_wdt_device);
 840 }
 841 #else
 842 static void __init at91_add_device_watchdog(void) {}
 843 #endif
 844
 845
 846 /* --------------------------------------------------------------------
 847  *  LEDs
 848  * -------------------------------------------------------------------- */
 849
 850 #if defined(CONFIG_LEDS)
 851 u8 at91_leds_cpu;
 852 u8 at91_leds_timer;
 853
 854 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
 855 {
 856         /* Enable GPIO to access the LEDs */
 857         at91_set_gpio_output(cpu_led, 1);
 858         at91_set_gpio_output(timer_led, 1);
 859
 860         at91_leds_cpu   = cpu_led;
 861         at91_leds_timer = timer_led;
 862 }
 863 #else
 864 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
 865 #endif
 866
 867
 868 /* --------------------------------------------------------------------
 869  *  SSC -- Synchronous Serial Controller
 870  * -------------------------------------------------------------------- */
 871
 872 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 873 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 874
 875 static struct resource ssc0_resources[] = {
 876         [0] = {
 877                 .start  = AT91SAM9263_BASE_SSC0,
 878                 .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
 879                 .flags  = IORESOURCE_MEM,
 880         },
 881         [1] = {
 882                 .start  = AT91SAM9263_ID_SSC0,
 883                 .end    = AT91SAM9263_ID_SSC0,
 884                 .flags  = IORESOURCE_IRQ,
 885         },
 886 };
 887
 888 static struct platform_device at91sam9263_ssc0_device = {
 889         .name   = "ssc",
 890         .id     = 0,
 891         .dev    = {
 892                 .dma_mask               = &ssc0_dmamask,
 893                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 894         },
 895         .resource       = ssc0_resources,
 896         .num_resources  = ARRAY_SIZE(ssc0_resources),
 897 };
 898
 899 static inline void configure_ssc0_pins(unsigned pins)
 900 {
 901         if (pins & ATMEL_SSC_TF)
 902                 at91_set_B_periph(AT91_PIN_PB0, 1);
 903         if (pins & ATMEL_SSC_TK)
 904                 at91_set_B_periph(AT91_PIN_PB1, 1);
 905         if (pins & ATMEL_SSC_TD)
 906                 at91_set_B_periph(AT91_PIN_PB2, 1);
 907         if (pins & ATMEL_SSC_RD)
 908                 at91_set_B_periph(AT91_PIN_PB3, 1);
 909         if (pins & ATMEL_SSC_RK)
 910                 at91_set_B_periph(AT91_PIN_PB4, 1);
 911         if (pins & ATMEL_SSC_RF)
 912                 at91_set_B_periph(AT91_PIN_PB5, 1);
 913 }
 914
 915 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 916
 917 static struct resource ssc1_resources[] = {
 918         [0] = {
 919                 .start  = AT91SAM9263_BASE_SSC1,
 920                 .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
 921                 .flags  = IORESOURCE_MEM,
 922         },
 923         [1] = {
 924                 .start  = AT91SAM9263_ID_SSC1,
 925                 .end    = AT91SAM9263_ID_SSC1,
 926                 .flags  = IORESOURCE_IRQ,
 927         },
 928 };
 929
 930 static struct platform_device at91sam9263_ssc1_device = {
 931         .name   = "ssc",
 932         .id     = 1,
 933         .dev    = {
 934                 .dma_mask               = &ssc1_dmamask,
 935                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 936         },
 937         .resource       = ssc1_resources,
 938         .num_resources  = ARRAY_SIZE(ssc1_resources),
 939 };
 940
 941 static inline void configure_ssc1_pins(unsigned pins)
 942 {
 943         if (pins & ATMEL_SSC_TF)
 944                 at91_set_A_periph(AT91_PIN_PB6, 1);
 945         if (pins & ATMEL_SSC_TK)
 946                 at91_set_A_periph(AT91_PIN_PB7, 1);
 947         if (pins & ATMEL_SSC_TD)
 948                 at91_set_A_periph(AT91_PIN_PB8, 1);
 949         if (pins & ATMEL_SSC_RD)
 950                 at91_set_A_periph(AT91_PIN_PB9, 1);
 951         if (pins & ATMEL_SSC_RK)
 952                 at91_set_A_periph(AT91_PIN_PB10, 1);
 953         if (pins & ATMEL_SSC_RF)
 954                 at91_set_A_periph(AT91_PIN_PB11, 1);
 955 }
 956
 957 /*
 958  * Return the device node so that board init code can use it as the
 959  * parent for the device node reflecting how it's used on this board.
 960  *
 961  * SSC controllers are accessed through library code, instead of any
 962  * kind of all-singing/all-dancing driver.  For example one could be
 963  * used by a particular I2S audio codec's driver, while another one
 964  * on the same system might be used by a custom data capture driver.
 965  */
 966 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 967 {
 968         struct platform_device *pdev;
 969
 970         /*
 971          * NOTE: caller is responsible for passing information matching
 972          * "pins" to whatever will be using each particular controller.
 973          */
 974         switch (id) {
 975         case AT91SAM9263_ID_SSC0:
 976                 pdev = &at91sam9263_ssc0_device;
 977                 configure_ssc0_pins(pins);
 978                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
 979                 break;
 980         case AT91SAM9263_ID_SSC1:
 981                 pdev = &at91sam9263_ssc1_device;
 982                 configure_ssc1_pins(pins);
 983                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
 984                 break;
 985         default:
 986                 return;
 987         }
 988
 989         platform_device_register(pdev);
 990 }
 991
 992 #else
 993 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 994 #endif
 995
 996
 997 /* --------------------------------------------------------------------
 998  *  UART
 999  * -------------------------------------------------------------------- */
1000
1001 #if defined(CONFIG_SERIAL_ATMEL)
1002
1003 static struct resource dbgu_resources[] = {
1004         [0] = {
1005                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
1006                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1007                 .flags  = IORESOURCE_MEM,
1008         },
1009         [1] = {
1010                 .start  = AT91_ID_SYS,
1011                 .end    = AT91_ID_SYS,
1012                 .flags  = IORESOURCE_IRQ,
1013         },
1014 };
1015
1016 static struct atmel_uart_data dbgu_data = {
1017         .use_dma_tx     = 0,
1018         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
1019         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1020 };
1021
1022 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1023
1024 static struct platform_device at91sam9263_dbgu_device = {
1025         .name           = "atmel_usart",
1026         .id             = 0,
1027         .dev            = {
1028                                 .dma_mask               = &dbgu_dmamask,
1029                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1030                                 .platform_data          = &dbgu_data,
1031         },
1032         .resource       = dbgu_resources,
1033         .num_resources  = ARRAY_SIZE(dbgu_resources),
1034 };
1035
1036 static inline void configure_dbgu_pins(void)
1037 {
1038         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
1039         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
1040 }
1041
1042 static struct resource uart0_resources[] = {
1043         [0] = {
1044                 .start  = AT91SAM9263_BASE_US0,
1045                 .end    = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1046                 .flags  = IORESOURCE_MEM,
1047         },
1048         [1] = {
1049                 .start  = AT91SAM9263_ID_US0,
1050                 .end    = AT91SAM9263_ID_US0,
1051                 .flags  = IORESOURCE_IRQ,
1052         },
1053 };
1054
1055 static struct atmel_uart_data uart0_data = {
1056         .use_dma_tx     = 1,
1057         .use_dma_rx     = 1,
1058 };
1059
1060 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1061
1062 static struct platform_device at91sam9263_uart0_device = {
1063         .name           = "atmel_usart",
1064         .id             = 1,
1065         .dev            = {
1066                                 .dma_mask               = &uart0_dmamask,
1067                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1068                                 .platform_data          = &uart0_data,
1069         },
1070         .resource       = uart0_resources,
1071         .num_resources  = ARRAY_SIZE(uart0_resources),
1072 };
1073
1074 static inline void configure_usart0_pins(void)
1075 {
1076         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
1077         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
1078         at91_set_A_periph(AT91_PIN_PA28, 0);            /* RTS0 */
1079         at91_set_A_periph(AT91_PIN_PA29, 0);            /* CTS0 */
1080 }
1081
1082 static struct resource uart1_resources[] = {
1083         [0] = {
1084                 .start  = AT91SAM9263_BASE_US1,
1085                 .end    = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1086                 .flags  = IORESOURCE_MEM,
1087         },
1088         [1] = {
1089                 .start  = AT91SAM9263_ID_US1,
1090                 .end    = AT91SAM9263_ID_US1,
1091                 .flags  = IORESOURCE_IRQ,
1092         },
1093 };
1094
1095 static struct atmel_uart_data uart1_data = {
1096         .use_dma_tx     = 1,
1097         .use_dma_rx     = 1,
1098 };
1099
1100 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1101
1102 static struct platform_device at91sam9263_uart1_device = {
1103         .name           = "atmel_usart",
1104         .id             = 2,
1105         .dev            = {
1106                                 .dma_mask               = &uart1_dmamask,
1107                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1108                                 .platform_data          = &uart1_data,
1109         },
1110         .resource       = uart1_resources,
1111         .num_resources  = ARRAY_SIZE(uart1_resources),
1112 };
1113
1114 static inline void configure_usart1_pins(void)
1115 {
1116         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
1117         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
1118         at91_set_B_periph(AT91_PIN_PD7, 0);             /* RTS1 */
1119         at91_set_B_periph(AT91_PIN_PD8, 0);             /* CTS1 */
1120 }
1121
1122 static struct resource uart2_resources[] = {
1123         [0] = {
1124                 .start  = AT91SAM9263_BASE_US2,
1125                 .end    = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1126                 .flags  = IORESOURCE_MEM,
1127         },
1128         [1] = {
1129                 .start  = AT91SAM9263_ID_US2,
1130                 .end    = AT91SAM9263_ID_US2,
1131                 .flags  = IORESOURCE_IRQ,
1132         },
1133 };
1134
1135 static struct atmel_uart_data uart2_data = {
1136         .use_dma_tx     = 1,
1137         .use_dma_rx     = 1,
1138 };
1139
1140 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1141
1142 static struct platform_device at91sam9263_uart2_device = {
1143         .name           = "atmel_usart",
1144         .id             = 3,
1145         .dev            = {
1146                                 .dma_mask               = &uart2_dmamask,
1147                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1148                                 .platform_data          = &uart2_data,
1149         },
1150         .resource       = uart2_resources,
1151         .num_resources  = ARRAY_SIZE(uart2_resources),
1152 };
1153
1154 static inline void configure_usart2_pins(void)
1155 {
1156         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1157         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1158         at91_set_B_periph(AT91_PIN_PD5, 0);             /* RTS2 */
1159         at91_set_B_periph(AT91_PIN_PD6, 0);             /* CTS2 */
1160 }
1161
1162 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
1163 struct platform_device *atmel_default_console_device;   /* the serial console device */
1164
1165 void __init at91_init_serial(struct at91_uart_config *config)
1166 {
1167         int i;
1168
1169         /* Fill in list of supported UARTs */
1170         for (i = 0; i < config->nr_tty; i++) {
1171                 switch (config->tty_map[i]) {
1172                         case 0:
1173                                 configure_usart0_pins();
1174                                 at91_uarts[i] = &at91sam9263_uart0_device;
1175                                 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
1176                                 break;
1177                         case 1:
1178                                 configure_usart1_pins();
1179                                 at91_uarts[i] = &at91sam9263_uart1_device;
1180                                 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
1181                                 break;
1182                         case 2:
1183                                 configure_usart2_pins();
1184                                 at91_uarts[i] = &at91sam9263_uart2_device;
1185                                 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
1186                                 break;
1187                         case 3:
1188                                 configure_dbgu_pins();
1189                                 at91_uarts[i] = &at91sam9263_dbgu_device;
1190                                 at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
1191                                 break;
1192                         default:
1193                                 continue;
1194                 }
1195                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
1196         }
1197
1198         /* Set serial console device */
1199         if (config->console_tty < ATMEL_MAX_UART)
1200                 atmel_default_console_device = at91_uarts[config->console_tty];
1201         if (!atmel_default_console_device)
1202                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1203 }
1204
1205 void __init at91_add_device_serial(void)
1206 {
1207         int i;
1208
1209         for (i = 0; i < ATMEL_MAX_UART; i++) {
1210                 if (at91_uarts[i])
1211                         platform_device_register(at91_uarts[i]);
1212         }
1213 }
1214 #else
1215 void __init at91_init_serial(struct at91_uart_config *config) {}
1216 void __init at91_add_device_serial(void) {}
1217 #endif
1218
1219
1220 /* -------------------------------------------------------------------- */
1221 /*
1222  * These devices are always present and don't need any board-specific
1223  * setup.
1224  */
1225 static int __init at91_add_standard_devices(void)
1226 {
1227         at91_add_device_rtt();
1228         at91_add_device_watchdog();
1229         return 0;
1230 }
1231
1232 arch_initcall(at91_add_standard_devices);