2 * arch/arm/mach-at91/at91sam9261_devices.c
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
20 #include <video/atmel_lcdc.h>
22 #include <asm/arch/board.h>
23 #include <asm/arch/gpio.h>
24 #include <asm/arch/at91sam9261.h>
25 #include <asm/arch/at91sam9261_matrix.h>
26 #include <asm/arch/at91sam926x_mc.h>
31 /* --------------------------------------------------------------------
33 * -------------------------------------------------------------------- */
35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
36 static u64 ohci_dmamask = 0xffffffffUL;
37 static struct at91_usbh_data usbh_data;
39 static struct resource usbh_resources[] = {
41 .start = AT91SAM9261_UHP_BASE,
42 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
43 .flags = IORESOURCE_MEM,
46 .start = AT91SAM9261_ID_UHP,
47 .end = AT91SAM9261_ID_UHP,
48 .flags = IORESOURCE_IRQ,
52 static struct platform_device at91sam9261_usbh_device = {
56 .dma_mask = &ohci_dmamask,
57 .coherent_dma_mask = 0xffffffff,
58 .platform_data = &usbh_data,
60 .resource = usbh_resources,
61 .num_resources = ARRAY_SIZE(usbh_resources),
64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 platform_device_register(&at91sam9261_usbh_device);
73 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
77 /* --------------------------------------------------------------------
79 * -------------------------------------------------------------------- */
81 #ifdef CONFIG_USB_GADGET_AT91
82 static struct at91_udc_data udc_data;
84 static struct resource udc_resources[] = {
86 .start = AT91SAM9261_BASE_UDP,
87 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
88 .flags = IORESOURCE_MEM,
91 .start = AT91SAM9261_ID_UDP,
92 .end = AT91SAM9261_ID_UDP,
93 .flags = IORESOURCE_IRQ,
97 static struct platform_device at91sam9261_udc_device = {
101 .platform_data = &udc_data,
103 .resource = udc_resources,
104 .num_resources = ARRAY_SIZE(udc_resources),
107 void __init at91_add_device_udc(struct at91_udc_data *data)
114 if (data->vbus_pin) {
115 at91_set_gpio_input(data->vbus_pin, 0);
116 at91_set_deglitch(data->vbus_pin, 1);
119 /* Pullup pin is handled internally */
120 x = at91_sys_read(AT91_MATRIX_USBPUCR);
121 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
124 platform_device_register(&at91sam9261_udc_device);
127 void __init at91_add_device_udc(struct at91_udc_data *data) {}
130 /* --------------------------------------------------------------------
132 * -------------------------------------------------------------------- */
134 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
135 static u64 mmc_dmamask = 0xffffffffUL;
136 static struct at91_mmc_data mmc_data;
138 static struct resource mmc_resources[] = {
140 .start = AT91SAM9261_BASE_MCI,
141 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
142 .flags = IORESOURCE_MEM,
145 .start = AT91SAM9261_ID_MCI,
146 .end = AT91SAM9261_ID_MCI,
147 .flags = IORESOURCE_IRQ,
151 static struct platform_device at91sam9261_mmc_device = {
155 .dma_mask = &mmc_dmamask,
156 .coherent_dma_mask = 0xffffffff,
157 .platform_data = &mmc_data,
159 .resource = mmc_resources,
160 .num_resources = ARRAY_SIZE(mmc_resources),
163 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
170 at91_set_gpio_input(data->det_pin, 1);
171 at91_set_deglitch(data->det_pin, 1);
174 at91_set_gpio_input(data->wp_pin, 1);
176 at91_set_gpio_output(data->vcc_pin, 0);
179 at91_set_B_periph(AT91_PIN_PA2, 0);
182 at91_set_B_periph(AT91_PIN_PA1, 1);
184 /* DAT0, maybe DAT1..DAT3 */
185 at91_set_B_periph(AT91_PIN_PA0, 1);
187 at91_set_B_periph(AT91_PIN_PA4, 1);
188 at91_set_B_periph(AT91_PIN_PA5, 1);
189 at91_set_B_periph(AT91_PIN_PA6, 1);
193 platform_device_register(&at91sam9261_mmc_device);
196 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
200 /* --------------------------------------------------------------------
202 * -------------------------------------------------------------------- */
204 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
205 static struct at91_nand_data nand_data;
207 #define NAND_BASE AT91_CHIPSELECT_3
209 static struct resource nand_resources[] = {
212 .end = NAND_BASE + SZ_256M - 1,
213 .flags = IORESOURCE_MEM,
217 static struct platform_device at91_nand_device = {
221 .platform_data = &nand_data,
223 .resource = nand_resources,
224 .num_resources = ARRAY_SIZE(nand_resources),
227 void __init at91_add_device_nand(struct at91_nand_data *data)
229 unsigned long csa, mode;
234 csa = at91_sys_read(AT91_MATRIX_EBICSA);
235 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
237 /* set the bus interface characteristics */
238 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
239 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
241 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
242 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
244 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
246 if (data->bus_width_16)
247 mode = AT91_SMC_DBW_16;
249 mode = AT91_SMC_DBW_8;
250 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
253 if (data->enable_pin)
254 at91_set_gpio_output(data->enable_pin, 1);
258 at91_set_gpio_input(data->rdy_pin, 1);
260 /* card detect pin */
262 at91_set_gpio_input(data->det_pin, 1);
264 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
265 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
268 platform_device_register(&at91_nand_device);
272 void __init at91_add_device_nand(struct at91_nand_data *data) {}
276 /* --------------------------------------------------------------------
278 * -------------------------------------------------------------------- */
281 * Prefer the GPIO code since the TWI controller isn't robust
282 * (gets overruns and underruns under load) and can only issue
283 * repeated STARTs in one scenario (the driver doesn't yet handle them).
285 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
287 static struct i2c_gpio_platform_data pdata = {
288 .sda_pin = AT91_PIN_PA7,
289 .sda_is_open_drain = 1,
290 .scl_pin = AT91_PIN_PA8,
291 .scl_is_open_drain = 1,
292 .udelay = 2, /* ~100 kHz */
295 static struct platform_device at91sam9261_twi_device = {
298 .dev.platform_data = &pdata,
301 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
303 at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */
304 at91_set_multi_drive(AT91_PIN_PA7, 1);
306 at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */
307 at91_set_multi_drive(AT91_PIN_PA8, 1);
309 i2c_register_board_info(0, devices, nr_devices);
310 platform_device_register(&at91sam9261_twi_device);
313 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
315 static struct resource twi_resources[] = {
317 .start = AT91SAM9261_BASE_TWI,
318 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
319 .flags = IORESOURCE_MEM,
322 .start = AT91SAM9261_ID_TWI,
323 .end = AT91SAM9261_ID_TWI,
324 .flags = IORESOURCE_IRQ,
328 static struct platform_device at91sam9261_twi_device = {
331 .resource = twi_resources,
332 .num_resources = ARRAY_SIZE(twi_resources),
335 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
337 /* pins used for TWI interface */
338 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
339 at91_set_multi_drive(AT91_PIN_PA7, 1);
341 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
342 at91_set_multi_drive(AT91_PIN_PA8, 1);
344 i2c_register_board_info(0, devices, nr_devices);
345 platform_device_register(&at91sam9261_twi_device);
348 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
352 /* --------------------------------------------------------------------
354 * -------------------------------------------------------------------- */
356 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
357 static u64 spi_dmamask = 0xffffffffUL;
359 static struct resource spi0_resources[] = {
361 .start = AT91SAM9261_BASE_SPI0,
362 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
363 .flags = IORESOURCE_MEM,
366 .start = AT91SAM9261_ID_SPI0,
367 .end = AT91SAM9261_ID_SPI0,
368 .flags = IORESOURCE_IRQ,
372 static struct platform_device at91sam9261_spi0_device = {
376 .dma_mask = &spi_dmamask,
377 .coherent_dma_mask = 0xffffffff,
379 .resource = spi0_resources,
380 .num_resources = ARRAY_SIZE(spi0_resources),
383 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
385 static struct resource spi1_resources[] = {
387 .start = AT91SAM9261_BASE_SPI1,
388 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
389 .flags = IORESOURCE_MEM,
392 .start = AT91SAM9261_ID_SPI1,
393 .end = AT91SAM9261_ID_SPI1,
394 .flags = IORESOURCE_IRQ,
398 static struct platform_device at91sam9261_spi1_device = {
402 .dma_mask = &spi_dmamask,
403 .coherent_dma_mask = 0xffffffff,
405 .resource = spi1_resources,
406 .num_resources = ARRAY_SIZE(spi1_resources),
409 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
411 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
414 unsigned long cs_pin;
415 short enable_spi0 = 0;
416 short enable_spi1 = 0;
418 /* Choose SPI chip-selects */
419 for (i = 0; i < nr_devices; i++) {
420 if (devices[i].controller_data)
421 cs_pin = (unsigned long) devices[i].controller_data;
422 else if (devices[i].bus_num == 0)
423 cs_pin = spi0_standard_cs[devices[i].chip_select];
425 cs_pin = spi1_standard_cs[devices[i].chip_select];
427 if (devices[i].bus_num == 0)
432 /* enable chip-select pin */
433 at91_set_gpio_output(cs_pin, 1);
435 /* pass chip-select pin to driver */
436 devices[i].controller_data = (void *) cs_pin;
439 spi_register_board_info(devices, nr_devices);
441 /* Configure SPI bus(es) */
443 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
444 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
445 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
447 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
448 platform_device_register(&at91sam9261_spi0_device);
451 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
452 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
453 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
455 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
456 platform_device_register(&at91sam9261_spi1_device);
460 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
464 /* --------------------------------------------------------------------
466 * -------------------------------------------------------------------- */
468 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
469 static u64 lcdc_dmamask = 0xffffffffUL;
470 static struct atmel_lcdfb_info lcdc_data;
472 static struct resource lcdc_resources[] = {
474 .start = AT91SAM9261_LCDC_BASE,
475 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
476 .flags = IORESOURCE_MEM,
479 .start = AT91SAM9261_ID_LCDC,
480 .end = AT91SAM9261_ID_LCDC,
481 .flags = IORESOURCE_IRQ,
483 #if defined(CONFIG_FB_INTSRAM)
485 .start = AT91SAM9261_SRAM_BASE,
486 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
487 .flags = IORESOURCE_MEM,
492 static struct platform_device at91_lcdc_device = {
493 .name = "atmel_lcdfb",
496 .dma_mask = &lcdc_dmamask,
497 .coherent_dma_mask = 0xffffffff,
498 .platform_data = &lcdc_data,
500 .resource = lcdc_resources,
501 .num_resources = ARRAY_SIZE(lcdc_resources),
504 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
510 #if defined(CONFIG_FB_ATMEL_STN)
511 at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
512 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
513 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
514 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
515 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
516 at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */
517 at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */
518 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
519 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
521 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
522 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
523 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
524 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
525 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
526 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
527 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
528 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
529 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
530 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
531 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
532 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
533 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
534 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
535 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
536 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
537 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
538 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
539 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
540 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
541 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
542 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
546 platform_device_register(&at91_lcdc_device);
549 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
553 /* --------------------------------------------------------------------
555 * -------------------------------------------------------------------- */
557 #if defined(CONFIG_LEDS)
561 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
563 /* Enable GPIO to access the LEDs */
564 at91_set_gpio_output(cpu_led, 1);
565 at91_set_gpio_output(timer_led, 1);
567 at91_leds_cpu = cpu_led;
568 at91_leds_timer = timer_led;
571 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
575 /* --------------------------------------------------------------------
577 * -------------------------------------------------------------------- */
579 #if defined(CONFIG_SERIAL_ATMEL)
580 static struct resource dbgu_resources[] = {
582 .start = AT91_VA_BASE_SYS + AT91_DBGU,
583 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
584 .flags = IORESOURCE_MEM,
587 .start = AT91_ID_SYS,
589 .flags = IORESOURCE_IRQ,
593 static struct atmel_uart_data dbgu_data = {
595 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
596 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
599 static struct platform_device at91sam9261_dbgu_device = {
600 .name = "atmel_usart",
603 .platform_data = &dbgu_data,
604 .coherent_dma_mask = 0xffffffff,
606 .resource = dbgu_resources,
607 .num_resources = ARRAY_SIZE(dbgu_resources),
610 static inline void configure_dbgu_pins(void)
612 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
613 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
616 static struct resource uart0_resources[] = {
618 .start = AT91SAM9261_BASE_US0,
619 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
620 .flags = IORESOURCE_MEM,
623 .start = AT91SAM9261_ID_US0,
624 .end = AT91SAM9261_ID_US0,
625 .flags = IORESOURCE_IRQ,
629 static struct atmel_uart_data uart0_data = {
634 static struct platform_device at91sam9261_uart0_device = {
635 .name = "atmel_usart",
638 .platform_data = &uart0_data,
639 .coherent_dma_mask = 0xffffffff,
641 .resource = uart0_resources,
642 .num_resources = ARRAY_SIZE(uart0_resources),
645 static inline void configure_usart0_pins(void)
647 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
648 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
649 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
650 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
653 static struct resource uart1_resources[] = {
655 .start = AT91SAM9261_BASE_US1,
656 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
657 .flags = IORESOURCE_MEM,
660 .start = AT91SAM9261_ID_US1,
661 .end = AT91SAM9261_ID_US1,
662 .flags = IORESOURCE_IRQ,
666 static struct atmel_uart_data uart1_data = {
671 static struct platform_device at91sam9261_uart1_device = {
672 .name = "atmel_usart",
675 .platform_data = &uart1_data,
676 .coherent_dma_mask = 0xffffffff,
678 .resource = uart1_resources,
679 .num_resources = ARRAY_SIZE(uart1_resources),
682 static inline void configure_usart1_pins(void)
684 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
685 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
688 static struct resource uart2_resources[] = {
690 .start = AT91SAM9261_BASE_US2,
691 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
692 .flags = IORESOURCE_MEM,
695 .start = AT91SAM9261_ID_US2,
696 .end = AT91SAM9261_ID_US2,
697 .flags = IORESOURCE_IRQ,
701 static struct atmel_uart_data uart2_data = {
706 static struct platform_device at91sam9261_uart2_device = {
707 .name = "atmel_usart",
710 .platform_data = &uart2_data,
711 .coherent_dma_mask = 0xffffffff,
713 .resource = uart2_resources,
714 .num_resources = ARRAY_SIZE(uart2_resources),
717 static inline void configure_usart2_pins(void)
719 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
720 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
723 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
724 struct platform_device *atmel_default_console_device; /* the serial console device */
726 void __init at91_init_serial(struct at91_uart_config *config)
730 /* Fill in list of supported UARTs */
731 for (i = 0; i < config->nr_tty; i++) {
732 switch (config->tty_map[i]) {
734 configure_usart0_pins();
735 at91_uarts[i] = &at91sam9261_uart0_device;
736 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
739 configure_usart1_pins();
740 at91_uarts[i] = &at91sam9261_uart1_device;
741 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
744 configure_usart2_pins();
745 at91_uarts[i] = &at91sam9261_uart2_device;
746 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
749 configure_dbgu_pins();
750 at91_uarts[i] = &at91sam9261_dbgu_device;
751 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
756 at91_uarts[i]->id = i; /* update ID number to mapped ID */
759 /* Set serial console device */
760 if (config->console_tty < ATMEL_MAX_UART)
761 atmel_default_console_device = at91_uarts[config->console_tty];
762 if (!atmel_default_console_device)
763 printk(KERN_INFO "AT91: No default serial console defined.\n");
766 void __init at91_add_device_serial(void)
770 for (i = 0; i < ATMEL_MAX_UART; i++) {
772 platform_device_register(at91_uarts[i]);
776 void __init at91_init_serial(struct at91_uart_config *config) {}
777 void __init at91_add_device_serial(void) {}
781 /* -------------------------------------------------------------------- */
784 * These devices are always present and don't need any board-specific
787 static int __init at91_add_standard_devices(void)
792 arch_initcall(at91_add_standard_devices);